Abstract: An embodiment sulfur dioxide-based inorganic electrolyte is provided in which the sulfur dioxide-based inorganic electrolyte is represented by a chemical formula M·(A1·Cl(4-x)Fx)z·ySO2. In this formula, M is a first element selected from the group consisting of Li, Na, K, Ca, and Mg, A1 is a second element selected from the group consisting of Al, Fe, Ga, and Cu, x satisfies a first equation 0?x?4, y satisfies a second equation 0?y?6, and z satisfies a third equation 1?z?2.

Abstract: The present invention relates to a heteroaryl derivative compound and a use thereof. Since the heteroaryl derivative of the present invention exhibits excellent inhibitory activity against EGFR, the heteroaryl derivative can be usefully used as a therapeutic agent for EGFR-associated diseases.

Abstract: An air conditioner for a vehicle including an air-conditioning case divided into a plurality of air passageways by a separation wall. A heating heat exchanger is disposed inside the air-conditioning case and exchanges heat with air to heat the interior of the vehicle. A perforated member is disposed at a downstream side of the heating heat exchanger and has a plurality of perforated holes through which the air passing the heating heat exchanger passes, and a partition wall is disposed between the heating heat exchanger and the perforated member to divide the air passageway of the air-conditioning case into a plurality of air passageways, wherein the partition wall is formed integrally with the perforated member.

Abstract: The present invention provides methods for treating or ameliorating metabolic diseases, cholestatic liver diseases, or organ fibrosis, which comprises administering to a subject a therapeutically effective amount of a pharmaceutical composition comprising an isoxazole derivative, a racemate, an enantiomer, or a diastereoisomer thereof, or a pharmaceutically acceptable salt of the derivative, the racemate, the enantiomer, or the diastereoisomer.

Abstract: The present disclosure provides a method of treating waste plastic pyrolysis oil. The method includes a first step of washing waste plastic pyrolysis oil with water and then removing moisture; a second step of mixing the waste plastic pyrolysis oil from which the moisture is removed and a sulfur source to prepare a mixed oil; a third step of hydrotreating the mixed oil with hydrogen gas in the presence of a hydrotreating catalyst; a fourth step of separating the hydrotreated mixed oil into a liquid stream and a gas stream to obtain liquid pyrolysis oil; and a fifth step of recovering hydrogen gas from the separated gas stream and recycling the recovered hydrogen gas to the third step.

Abstract: The present disclosure provides a method of treating waste plastic pyrolysis oil. The method includes a first step of washing waste plastic pyrolysis oil with water and then removing moisture; a second step of mixing the waste plastic pyrolysis oil from which the moisture is removed and a sulfur source to prepare a mixed oil; a third step of hydrotreating the mixed oil with hydrogen gas in the presence of a hydrotreating catalyst; a fourth step of separating the hydrotreated mixed oil into a liquid stream and a gas stream to obtain liquid pyrolysis oil; and a fifth step of recovering hydrogen gas from the separated gas stream and recycling the recovered hydrogen gas to the third step.

Abstract: A memory system is provided to include a storage device including memory cells for storing data, and a controller in communication with an external device and configured to control the storage device based on a request from the external device. The controller is configured to receive a request from the external device to perform a refresh operation of re-writing stored data in the memory cells, read data from the memory cells included in the storage device, set a refresh period based on a number of fail bits included in the read data and a temperature of the controller or the storage device, and perform the refresh operation of the storage device based on the refresh period.

Abstract: The disclosed method may include: generating, by using an object generator, a first feature map object class having a multi-layer feature map downsampled from a frame image into different sizes by processing a video; obtaining an upsampled, multi-layer feature map by upsampling a multi-layer feature map of the first feature map object class, and obtaining a second feature map object class by performing a convolution operation on the up-sampled multi-layer feature map; detecting a human object corresponding to the one or more real humans from the second feature map, and separating the human objects; detecting, motions of key points of the human objects and converting motions of the real humans into data and generating motion information; creating synthetic video content by synthesizing the human objects into a background image; and displaying the synthetic video content on a display and selectively displaying the motion information.

Abstract: A method and an apparatus for separating a human object from video and estimating a posture, the method including: obtaining video of one or more real people, using a camera; generating a first feature map object having multi-layer feature maps down-sampled to different sizes from a frame image, by processing the video in units of frames; obtaining an upsampled multi-layer feature map by upsampling the multi-layer feature maps of the first feature map object, and obtaining a second feature map object, by performing convolution on the upsampled multi-layer feature map with the first feature map; detecting and separating a human object corresponding to the one or more real people from the second feature map object; and detecting a keypoint of the human object.

Abstract: A semiconductor apparatus includes a temperature detecting circuit and a temperature raising circuit. The temperature detecting circuit detects a temperature to generate temperature detection information. The temperature raising circuit generates heat through a toggling operation based on the temperature detection information.

Abstract: There are provided a volatile memory device, and an operating method. The volatile memory device includes: a plurality of memory cells arranged in rows and columns and structured to store data; word lines; bit lines; a row decoder; a column decoder; and a control logic coupled to communicate with the row and column decoders and configured to, in an active period, provide the row decoder with a first command, and provide the column decoder with a second command, wherein the row decoder is further configured to: apply a first word line voltage higher than a ground voltage to a selected word line, from when the first command is provided; and for a duration over which the row decoder is activated, apply either a second word line voltage lower than the first word line voltage to the selected word line or no voltage to the selected word line.

Abstract: A semiconductor memory apparatus may include a memory bank, a global buffer array, and an input and output circuit. The memory bank includes a local data circuit, and the global buffer array includes a global data circuit. The local data circuit is operably coupled to the global data circuit. The global buffer array may be operably coupled to the input and output circuit. The memory bank is disposed in a core region, and the global buffer array and the input and output circuit may be disposed in a peripheral region separated from the core region.

Abstract: A semiconductor apparatus may include a repair circuit configured to activate a redundant line of a cell array region by comparing repair information and address information. The semiconductor apparatus may include a main decoder configured to perform a normal access to the cell array region by decoding the address information. The address information may include both column information and row information.

Abstract: A semiconductor apparatus may include a repair circuit configured to activate a redundant line of a cell array region by comparing repair information and address information. The semiconductor apparatus may include a main decoder configured to perform a normal access to the cell array region by decoding the address information. The address information may include both column information and row information.

Abstract: A memory module includes a module substrate, a plurality of memory devices, a first power line, and a second power line. The memory devices are mounted on the module substrate. Each of the memory devices includes a power management member. The first power line may be arranged in the module substrate to provide each of the memory devices with power. The second power line may be electrically connected between the power management members of adjacent memory devices to control and share the power provided to the adjacent memory devices.

Abstract: A semiconductor apparatus may include a repair circuit configured to activate a redundant line of a cell array region by comparing repair information and address information. The semiconductor apparatus may include a main decoder configured to perform a normal access to the cell array region by decoding the address information. The address information may include both column information and row information.

Abstract: A semiconductor apparatus includes a temperature detecting circuit and a temperature raising circuit. The temperature detecting circuit detects a temperature to generate temperature detection information. The temperature raising circuit generates heat through a toggling operation based on the temperature detection information.

Abstract: There are provided a volatile memory device, and an operating method. The volatile memory device includes: a plurality of memory cells arranged in rows and columns and structured to store data; word lines; bit lines; a row decoder; a column decoder; and a control logic coupled to communicate with the row and column decoders and configured to, in an active period, provide the row decoder with a first command, and provide the column decoder with a second command, wherein the row decoder is further configured to: apply a first word line voltage higher than a ground voltage to a selected word line, from when the first command is provided; and for a duration over which the row decoder is activated, apply either a second word line voltage lower than the first word line voltage to the selected word line or no voltage to the selected word line.

Abstract: A memory system is provided to include a storage device including memory cells for storing data, and a controller in communication with an external device and configured to control the storage device based on a request from the external device. The controller is configured to receive a request from the external device to perform a refresh operation of re-writing stored data in the memory cells, read data from the memory cells included in the storage device, set a refresh period based on a number of fail bits included in the read data and a temperature of the controller or the storage device, and perform the refresh operation of the storage device based on the refresh period.

Abstract: A memory device may include a bank layer and a control circuit layer. The bank layer may be arranged on a semiconductor substrate. The bank layer may include a plurality of mats. Each of the mats may include a plurality of stacked decks. Each of the decks may include a plurality of memory cells. The control circuit layer may be arranged between the semiconductor substrate and the bank layer. The control circuit layer may include a plurality of control circuit regions corresponding to the mats, respectively. The stacked decks may include a plurality of stacked word lines and a plurality of stacked bit lines intersected with the stacked word lines. A word line decoder, for controlling the word lines, and a bit line decoder, for controlling the bit lines, may be alternately and repeatedly arranged in the control circuit layer.