Patents by Inventor Dong-Kil Yim

Dong-Kil Yim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080087960
    Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.
    Type: Application
    Filed: November 27, 2007
    Publication date: April 17, 2008
    Inventors: Mark Hsiao, Dong-Kil Yim, Takako Takehara, Quanyuan Shang, William Harshbarger, Woong-Kwon Kim, Duk-Chul Yun, Youn-Gyung Chang
  • Publication number: 20080061793
    Abstract: Method and apparatus for detecting or suppressing electrical arcing or other abnormal change in the electrical impedance of a load connected to a power source. Preferably the load is a plasma chamber used for manufacturing electronic components such as semiconductors and flat panel displays. Arcing is detected by monitoring one or more sensors. Each sensor either responds to a characteristic of the electrical power being supplied by an electrical power source to the plasma or is coupled to the plasma chamber so as to respond to an electromagnetic condition within the chamber. Arcing is suppressed by reducing the power output for a brief period. Then the power source increases its power output, preferably to its original value. If the arcing resumes, the power source repeats the steps of reducing and then restoring the power output.
    Type: Application
    Filed: October 27, 2007
    Publication date: March 13, 2008
    Inventors: Suhail Anwar, Remegio Manacio, Chung-Hee Park, Dong-Kil Yim, Soo Choi
  • Publication number: 20080003358
    Abstract: A method for preventing particle contamination within a processing chamber is disclosed. Preheating the substrate within the processing chamber may cause a thermophoresis effect so that particles within the chamber that are not adhered to a surface may not come to rest on the substrate. One method to increase the substrate temperature is to plasma load the substrate. Plasma loading comprises providing an inert gas plasma to the substrate to heat the substrate. Another method to increase the substrate temperature is high pressure loading the substrate. High pressure loading comprises heating the substrate while increasing the chamber pressure to between about 1 Torr and about 10 Torr. By rapidly increasing the substrate temperature within the processing chamber prior to substrate processing, particle contamination is less likely to occur.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 3, 2008
    Inventors: Dong-Kil Yim, John M. White, Soo Young Choi, Han Byoul Kim, Beom Soo Park, Jin Man Ha
  • Patent number: 7300829
    Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: November 27, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Mark Hsiao, Dong-Kil Yim, Takako Takehara, Quanyuan Shang, William R. Harshbarger, Woong-Kwon Kim, Duk-Chul Yun, Youn-Gyung Chang
  • Patent number: 7292045
    Abstract: Method and apparatus for detecting or suppressing electrical arcing or other abnormal change in the electrical impedance of a load connected to a power source. Preferably the load is a plasma chamber used for manufacturing electronic components such as semiconductors and flat panel displays. Arcing is detected by monitoring one or more sensors. Each sensor either responds to a characteristic of the electrical power being supplied by an electrical power source to the plasma or is coupled to the plasma chamber so as to respond to an electromagnetic condition within the chamber. Arcing is suppressed by reducing the power output for a brief period. Then the power source increases its power output, preferably to its original value. If the arcing resumes, the power source repeats the steps of reducing and then restoring the power output.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: November 6, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Suhail Anwar, Remegio Manacio, Chung-Hee Park, Dong-Kil Yim, Soo Young Choi
  • Publication number: 20070178810
    Abstract: A method of reducing the amount of particulates generated from the surface of a processing component used during plasma enhanced chemical vapor deposition of thin films. The body of the processing component comprises an aluminum alloy, and an exterior surface of said processing component is texturized to increase the amount of surface area present on the exterior surface. The texturizing process includes at least one step in which the surface to be texturized is bead blasted or chemically grained, so that the surface roughness of the texturized surface ranges from about 50 ?-inch Ra to about 1,000 ?-inch Ra.
    Type: Application
    Filed: August 2, 2006
    Publication date: August 2, 2007
    Inventors: Soo Young Choi, John M. White, Beom Soo Park, Dong Kil Yim
  • Publication number: 20060185795
    Abstract: A substrate support and method for fabricating the same are provided. In one embodiment of the invention, a substrate support includes an electrically conductive body having a substrate support surface that is covered by an electrically insulative coating. At least a portion of the coating centered on the substrate support surface has a surface finish of between about 80 to about 200 micro-inches. In another embodiment, a substrate support includes an anodized aluminum body having a surface finish on the portion of the body adapted to support a substrate thereon of between about 80 to about 200 micro-inches.
    Type: Application
    Filed: April 18, 2006
    Publication date: August 24, 2006
    Inventors: Soo Choi, Beom Park, Quanyuan Shang, Robert Greene, John White, Dong-Kil Yim, Chung-Hee Park, Kam Law
  • Publication number: 20060049831
    Abstract: Method and apparatus for detecting or suppressing electrical arcing or other abnormal change in the electrical impedance of a load connected to a power source. Preferably the load is a plasma chamber used for manufacturing electronic components such as semiconductors and flat panel displays. Arcing is detected by monitoring one or more sensors. Each sensor either responds to a characteristic of the electrical power being supplied by an electrical power source to the plasma or is coupled to the plasma chamber so as to respond to an electromagnetic condition within the chamber. Arcing is suppressed by reducing the power output for a brief period. Then the power source increases its power output, preferably to its original value. If the arcing resumes, the power source repeats the steps of reducing and then restoring the power output.
    Type: Application
    Filed: June 10, 2005
    Publication date: March 9, 2006
    Inventors: Suhail Anwar, Remegio Manacio, Chung-Hee Park, Dong-Kil Yim, Soo Choi
  • Publication number: 20060032586
    Abstract: A substrate support and method for fabricating the same are provided. In one embodiment of the invention, a substrate support includes an electrically conductive body having a substrate support surface that is covered by an electrically insulative coating. At least a portion of the coating centered on the substrate support surface has a surface finish of between about 200 to about 2000 micro-inches. In another embodiment, a substrate support includes an anodized aluminum body having a surface finish on the portion of the body adapted to support a substrate thereon of between about 200 to about 2000 micro-inches. In one embodiment, a substrate support assembly includes an electrically conductive body having a substrate support surface, a substrate support structure that is adapted to support the conductive body and the conductive body is covered by an electrically insulative coating.
    Type: Application
    Filed: July 15, 2005
    Publication date: February 16, 2006
    Inventors: Soo Choi, Beom Park, Quanyuan Shang, John White, Dong-Kil Yim, Chung-Hee Park
  • Publication number: 20040241920
    Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.
    Type: Application
    Filed: June 2, 2003
    Publication date: December 2, 2004
    Applicants: Applied Materials, Inc., LG Philips Displays USA, Inc.
    Inventors: Mark Hsiao, Dong-Kil Yim, Takako Takehara, Quanyuan Shang, William R. Harshbarger, Woong-Kwon Kim, Duk-Chul Yun, Youn-Gyung Chang
  • Publication number: 20040221959
    Abstract: A substrate support and method for fabricating the same are provided. In one embodiment of the invention, a substrate support includes an electrically conductive body having a substrate support surface that is covered by an electrically insulative coating. At least a portion of the coating centered on the substrate support surface has a surface finish of between about 80 to about 200 micro-inches. In another embodiment, a substrate support includes an anodized aluminum body having a surface finish on the portion of the body adapted to support a substrate thereon of between about 80 to about 200 micro-inches.
    Type: Application
    Filed: May 9, 2003
    Publication date: November 11, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Soo Young Choi, Beom Soo Park, Quanyuan Shang, Robert I. Greene, John M. White, Dong-Kil Yim, Chung-Hee Park, Kam Law