Patents by Inventor Durgesh Srivastava
Durgesh Srivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11983408Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.Type: GrantFiled: May 3, 2023Date of Patent: May 14, 2024Assignee: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Publication number: 20240146979Abstract: The present disclosure relates to a system, a method and a computer-readable medium for recommending live streams. The method includes determining a user to be disengaged, determining a thumbnail of a live stream to be attractive for the user, determining the live stream to be attractive for the user, and displaying the thumbnail of the live stream to the user.Type: ApplicationFiled: July 6, 2023Publication date: May 2, 2024Inventors: Arun RAWAL, Sree LAKSHMI, Nitin SRIVASTAVA, Ajay Prakash MANGALE, Abinash SEN, Durgesh KUMAR
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Publication number: 20230333738Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.Type: ApplicationFiled: May 3, 2023Publication date: October 19, 2023Applicant: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Patent number: 11726565Abstract: Context aware backlighting techniques include determining a focal point of a display space based on a user display context. An example backlight controller for selective backlight control of a monitor includes interface circuitry, memory, machine-readable instructions, and processor circuitry to execute the machine readable instructions to obtain a user display context relative to the monitor, the user display context based on sensor data, the sensor data to include user proximity data; determine whether to enable or disable the selective backlighting for the monitor based on the user display context; cause first backlight sections of the monitor to output at a first light intensity based on the user display context; and cause second backlight sections of the monitor to output at least one of (a) the first light intensity or (b) a second light intensity that is different than the first light intensity based on the determination.Type: GrantFiled: July 25, 2022Date of Patent: August 15, 2023Assignee: Intel CorporationInventors: Dhaval V. Sharma, Nivruti Rai, Durgesh Srivastava, Shobhit Kumar
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Patent number: 11681439Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.Type: GrantFiled: June 26, 2020Date of Patent: June 20, 2023Assignee: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Publication number: 20230092541Abstract: Methods and apparatus to minimize hot/cold page detection overhead on running workloads. A page meta data structure is populated with meta data associated with memory pages in one or more far memory tier. In conjunction with one or more processes accessing memory pages to perform workloads, the page meta data structure is updated to reflect accesses to the memory pages. The page meta data, which reflects the current state of memory, is used to determine which pages are “hot” pages and which pages are “cold” pages, wherein hot pages are memory pages with relatively higher access frequencies and cold pages are memory pages with relatively lower access frequencies. Variations on the approach including filtering meta data updates on pages in memory regions of interest and applying a filter(s) to trigger meta data updates based on (a) condition(s). A callback function may also be triggered to be executed synchronously with memory page accesses.Type: ApplicationFiled: September 23, 2021Publication date: March 23, 2023Inventors: Francois DUGAST, Durgesh SRIVASTAVA, Sujoy SEN, Lidia WARNES, Thomas E. WILLIS, Bassam N. COURY
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Patent number: 11573722Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to provide an interface to a pooled memory that is configured as a combination of local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, allocate respective memory portions of the pooled memory to respective tenants, associate respective memory balloons with the respective tenants that correspond to the allocated respective memory portions, and manage the respective memory balloons based on the respective tenants and two or more memory tiers associated with the pooled memory. Other embodiments are disclosed and claimed.Type: GrantFiled: August 6, 2020Date of Patent: February 7, 2023Assignee: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Publication number: 20220357795Abstract: Context aware backlighting techniques include determining a focal point of a display space based on a user display context. An example backlight controller for dynamic backlight control of a monitor includes interface circuitry, memory, machine-readable instructions, and processor circuitry to execute the machine readable instructions to obtain a user display context relative to the monitor, the user display context based on sensor data, the sensor data to include user proximity data; determine whether to enable or disable the dynamic backlighting for the monitor based on the user display context; cause first backlight sections of the monitor to output at a first light intensity based on the user display context; and cause second backlight sections of the monitor to output at least one of (a) the first light intensity or (b) a second light intensity that is different than the first light intensity based on the determination.Type: ApplicationFiled: July 25, 2022Publication date: November 10, 2022Inventors: Dhaval V. Sharma, Nivruti Rai, Durgesh Srivastava, Shobhit Kumar
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Publication number: 20220283951Abstract: A method is described. The method includes determining that a memory page is in one of an active state and an idle state from meta data that is maintained for the memory page. The method includes recording a past history of active/idle state determinations that were previously made for the memory page. The method includes training a neural network on the past history of the memory page. The method includes using the neural network to predict one of a future active state and future idle state for the memory page. The method includes determining a location for the memory page based on the past history of the memory page and the predicted future state of the memory page, the location being one of a faster memory and a slower memory. The method includes moving the memory page to the location from the other one of the faster memory and the slower memory.Type: ApplicationFiled: May 23, 2022Publication date: September 8, 2022Inventors: Neha PATHAPATI, Lidia WARNES, Durgesh SRIVASTAVA, Francois DUGAST, Navneet SINGH, Rasika SUBRAMANIAN, Sidharth N. KASHYAP
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Patent number: 11397464Abstract: Context aware backlighting techniques include determining a focal point of a display space based on a user display context. The user display context represents an area of interest on the monitor. The user display context can be based on eye tracking data, ambient light data, motion sensing data, cursor location in the display space, an image content, proximity data, or the like and any combination thereof. A first set of one or more of a plurality of backlight sections corresponding to the determined focal point of the display space can be driven to output at a first intensity level, while a second set of one or more of the plurality of backlight sections can be driven to output at a second intensity level.Type: GrantFiled: March 11, 2021Date of Patent: July 26, 2022Assignee: Intel CorporationInventors: Dhaval V. Sharma, Nivruti Rai, Durgesh Srivastava, Shobhit Kumar
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Publication number: 20220050722Abstract: Examples described herein relate to providing an interface to an operating system (OS) to create different memory pool classes to allocate to one or more processes and allocate a memory pool class with a process of the one or more processes. In some examples, a memory pool class of the different memory pool classes defines a mixture of memory devices in at least one memory pool available for access by the one or more processes. In some examples, memory devices are associated with multiple memory pool classes to provide multiple different categories of memory resource capabilities.Type: ApplicationFiled: October 29, 2021Publication date: February 17, 2022Inventors: Francois DUGAST, Florent PIROU, Sujoy SEN, Lidia WARNES, Thomas E. WILLIS, Durgesh SRIVASTAVA
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Publication number: 20220012209Abstract: An apparatus of a computing system, the computing system, a method to be performed at the apparatus, and a machine-readable storage medium. The apparatus includes control circuitry to: perform a page walk operation on a page table structure of a pooled memory; based on the page walk operation, determine page table entries (PTEs) corresponding to a workload to be executed by the computing system; and during a time interval not including a page walk operation by the control circuitry, perform a plurality of sampling operations, individual ones of the sampling operations including determining PTE metadata corresponding to at least some of the PTEs.Type: ApplicationFiled: September 24, 2021Publication date: January 13, 2022Applicant: Intel CorporationInventors: Francois Dugast, Neha Pathapati, Durgesh Srivastava
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Publication number: 20220004500Abstract: An apparatus of a computing system, the computing system, a method to be performed at the apparatus, and a machine-readable storage medium. The apparatus includes control circuitry to: perform a page walk operation on a page table structure of a pooled memory; based on the page walk operation, determine page table entries (PTEs) corresponding to a workload to be executed by the computing system; and during a time interval not including a page walk operation by the control circuitry, perform a plurality of sampling operations, individual ones of the sampling operations including determining PTE metadata corresponding to at least some of the PTEs.Type: ApplicationFiled: September 20, 2021Publication date: January 6, 2022Applicant: Intel CorporationInventors: Francois Dugast, Neha Pathapati, Durgesh Srivastava
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Publication number: 20210377150Abstract: A system comprising a traffic handler comprising circuitry to determine that data of a memory request is stored remotely in a memory pool; generate a packet based on the memory request; and direct the packet to a path providing a guaranteed latency for completion of the memory request.Type: ApplicationFiled: August 17, 2021Publication date: December 2, 2021Applicant: Intel CorporationInventors: Francois Dugast, Francesc Guim Bernat, Durgesh Srivastava, Karthik Kumar
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Publication number: 20210200309Abstract: Context aware backlighting techniques include determining a focal point of a display space based on a user display context. The user display context represents an area of interest on the monitor. The user display context can be based on eye tracking data, ambient light data, motion sensing data, cursor location in the display space, an image content, proximity data, or the like and any combination thereof. A first set of one or more of a plurality of backlight sections corresponding to the determined focal point of the display space can be driven to output at a first intensity level, while a second set of one or more of the plurality of backlight sections can be driven to output at a second intensity level.Type: ApplicationFiled: March 11, 2021Publication date: July 1, 2021Inventors: Dhaval V. Sharma, Nivruti Rai, Durgesh Srivastava, Shobhit Kumar
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Publication number: 20210200667Abstract: Examples described herein relate to memory thin provisioning in a memory pool of one or more dual in-line memory modules or memory devices. At any instance, any central processing unit (CPU) can request and receive a full virtual allocation of memory in an amount that exceeds the physical memory attached to the CPU (near memory). A remote pool of additional memory can be dynamically utilized to fill the gap between allocated memory and near memory. This remote pool is shared between multiple CPUs, with dynamic assignment and address re-mapping provided for the remote pool. To improve performance, the near memory can be operated as a cache of the pool memory. Inclusive or exclusive content storage configurations can be applied. An inclusive cache configuration can include an entry in a near memory cache also being stored in a memory pool whereas an exclusive cache configuration can provide an entry in either a near memory cache or in a memory pool but not both.Type: ApplicationFiled: December 26, 2019Publication date: July 1, 2021Inventors: Debra BERNSTEIN, Hugh WILKINSON, Douglas CARRIGAN, Bassam N. COURY, Matthew J. ADILETTA, Durgesh SRIVASTAVA, Lidia WARNES, William WHEELER, Michael F. FALLON
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Publication number: 20210149812Abstract: Examples described herein includes an apparatus comprising: a network interface configured to: receive a request to copy data from a local memory to a remote memory; based on a configuration that the network interface is to manage a cache store the data into the cache and record that the data is stored in the cache. In some examples, store the data in the cache comprises store most recently evicted data from the local memory into the cache. In some examples, the network interface is to store data evicted from the local memory that is not stored into the cache into one or more remote memories.Type: ApplicationFiled: November 24, 2020Publication date: May 20, 2021Inventors: Sujoy SEN, Durgesh SRIVASTAVA, Thomas E. WILLIS, Bassam N. COURY, Marcelo CINTRA
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Patent number: 10976815Abstract: Context aware backlighting techniques include determining a focal point of a display space based on a user display context. The user display context represents an area of interest on the monitor. The user display context can be based on eye tracking data, ambient light data, motion sensing data, cursor location in the display space, an image content, proximity data, or the like and any combination thereof. A first set of one or more of a plurality of backlight sections corresponding to the determined focal point of the display space can be driven to output at a first intensity level, while a second set of one or more of the plurality of backlight sections can be driven to output at a second intensity level.Type: GrantFiled: June 17, 2019Date of Patent: April 13, 2021Assignee: Intel CorporationInventors: Dhaval V. Sharma, Nivruti Rai, Durgesh Srivastava, Shobhit Kumar
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Publication number: 20210105207Abstract: Examples described herein include one or more processors; a network interface; and a direct memory access (DMA) engine communicatively coupled to the one or more processors. In some examples, the DMA engine is to receive a DMA data access request and based on an address in the DMA data access request corresponding to a remote memory device, the DMA engine is to cause the network interface to generate at least one packet for transmission to the remote memory device. In some examples, the DMA data access request includes a source address, a destination address, and a length. In some examples, if the source address corresponds to a local memory device and the destination address corresponds to a remote memory device, the DMA engine is to cause the network interface to generate at least one packet for transmission to the remote memory device, wherein the at least one packet includes data stored at the source address.Type: ApplicationFiled: November 24, 2020Publication date: April 8, 2021Inventors: Sujoy SEN, Durgesh SRIVASTAVA, Thomas E. WILLIS, Bassam N. COURY, Marcelo CINTRA
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Publication number: 20210081312Abstract: Examples described herein includes a network interface controller comprising a memory interface and a network interface, the network interface controller configurable to provide access to local memory and remote memory to a requester, wherein the network interface controller is configured with an amount of memory of different memory access speeds for allocation to one or more requesters. In some examples, the network interface controller is to grant or deny a memory allocation request from a requester based on a configuration of an amount of memory for different memory access speeds for allocation to the requester. In some examples, the network interface controller is to grant or deny a memory access request from a requester based on a configuration of memory allocated to the requester. In some examples, the network interface controller is to regulate quality of service of memory access requests from requesters.Type: ApplicationFiled: November 24, 2020Publication date: March 18, 2021Inventors: Bassam N. COURY, Sujoy SEN, Thomas E. WILLIS, Durgesh SRIVASTAVA