Patents by Inventor F. Daniel Gealy

F. Daniel Gealy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8299462
    Abstract: The invention includes a dielectric mode from ALD-type methods in which two or more different precursors are utilized with one or more reactants to form the dielectric material. In particular aspects, the precursors are aluminum and hafnium and/or zirconium for materials made from a hafnium precursor, the hafnium oxide is predominantly in a tetragonal crystalline phase.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: October 30, 2012
    Assignee: Round Rock Research, LLC
    Inventors: Cancheepuram V. Srividya, Noel Rocklein, John Vernon, Jeff Nelson, F. Daniel Gealy, David Korn
  • Publication number: 20120098093
    Abstract: A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form conductive TiOxNy having resistivity no greater than 1 ohm·cm over the TiN-comprising material where x is greater than 0 and y is from 0 to 1.4. A capacitor dielectric is formed over the conductive TiOxNy. Conductive second capacitor electrode material is formed over the capacitor dielectric. Other aspects and implementations are contemplated, including capacitors independent of method of fabrication.
    Type: Application
    Filed: December 28, 2011
    Publication date: April 26, 2012
    Inventors: Vishwanath Bhat, Noel Rocklein, F. Daniel Gealy
  • Publication number: 20120037902
    Abstract: The invention includes a dielectric mode from ALD-type methods in which two or more different precursors are utilized with one or more reactants to form the dielectric material. In particular aspects, the precursors are aluminum and hafnium and/or zirconium for materials made from a hafnium precursor, the hafnium oxide is predominantly in a tetragonal crystalline phase.
    Type: Application
    Filed: October 25, 2011
    Publication date: February 16, 2012
    Applicant: Round Rock Research, LLC
    Inventors: Cancheepuram V. Srividya, Noel Rocklein, John Vernon, Jeff Nelson, F. Daniel Gealy, David Korn
  • Patent number: 8105896
    Abstract: A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form conductive TiOxNy having resistivity no greater than 1 ohm·cm over the TiN-comprising material where x is greater than 0 and y is from 0 to 1.4. A capacitor dielectric is formed over the conductive TiOxNy. Conductive second capacitor electrode material is formed over the capacitor dielectric. Other aspects and implementations are contemplated, including capacitors independent of method of fabrication.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: January 31, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Noel Rocklein, F. Daniel Gealy
  • Publication number: 20110318921
    Abstract: The invention includes methods of electrically interconnecting different elevation conductive structures, methods of forming capacitors, methods of forming an interconnect between a substrate bit line contact and a bit line in DRAM, and methods of forming DRAM memory cells. In one implementation, a method of electrically interconnecting different elevation conductive structures includes forming a first conductive structure comprising a first electrically conductive surface at a first elevation of a substrate. A nanowhisker is grown from the first electrically conductive surface, and is provided to be electrically conductive. Electrically insulative material is provided about the nanowhisker. An electrically conductive material is deposited over the electrically insulative material in electrical contact with the nanowhisker at a second elevation which is elevationally outward of the first elevation, and the electrically conductive material is provided into a second conductive structure.
    Type: Application
    Filed: September 7, 2011
    Publication date: December 29, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brett W. Busch, David K. Hwang, F. Daniel Gealy
  • Patent number: 8049304
    Abstract: The invention includes ALD-type methods in which two or more different precursors are utilized with one or more reactants to form a material. In particular aspects, the precursors are hafnium and aluminum, the only reactant is ozone, and the material is hafnium oxide predominantly in a tetragonal crystalline phase.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: November 1, 2011
    Assignee: Round Rock Research, LLC
    Inventors: Cancheepuram V. Srividya, Noel Rocklein, John Vernon, Jeff Nelson, F. Daniel Gealy, David Korn
  • Patent number: 8030168
    Abstract: The invention includes methods of electrically interconnecting different elevation conductive structures, methods of forming capacitors, methods of forming an interconnect between a substrate bit line contact and a bit line in DRAM, and methods of forming DRAM memory cells. In one implementation, a method of electrically interconnecting different elevation conductive structures includes forming a first conductive structure comprising a first electrically conductive surface at a first elevation of a substrate. A nanowhisker is grown from the first electrically conductive surface, and is provided to be electrically conductive. Electrically insulative material is provided about the nanowhisker. An electrically conductive material is deposited over the electrically insulative material in electrical contact with the nanowhisker at a second elevation which is elevationally outward of the first elevation, and the electrically conductive material is provided into a second conductive structure.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: October 4, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Brett W. Busch, David K. Hwang, F. Daniel Gealy
  • Publication number: 20110067629
    Abstract: Methods and devices for controlling a growth rate of films in semiconductor structures are shown. Chemical vapor deposition methods and devices include the use of a reaction inhibitor that selectively varies a deposition rate along a surface. One specific method includes atomic layer deposition. One method shown provides high step coverage over features such as trenches in trench plate capacitors. Also shown are methods and devices to provide uniform batch reactor layer thicknesses. Also shown are methods for forming alloy layers with high control over composition. Also shown are methods to selectively control growth rate to provide growth only on selected surfaces.
    Type: Application
    Filed: November 30, 2010
    Publication date: March 24, 2011
    Inventors: M. Noel Rocklein, F. Daniel Gealy
  • Patent number: 7863198
    Abstract: Methods and devices for controlling a growth rate of films in semiconductor structures are shown. Chemical vapor deposition methods and devices include the use of a reaction inhibitor that selectively varies a deposition rate along a surface. One specific method includes atomic layer deposition. One method shown provides high step coverage over features such as trenches in trench plate capacitors. Also shown are methods and devices to provide uniform batch reactor layer thicknesses. Also shown are methods for forming alloy layers with high control over composition. Also shown are methods to selectively control growth rate to provide growth only on selected surfaces.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: January 4, 2011
    Assignee: Micron Technology, Inc.
    Inventors: M. Noel Rocklein, F. Daniel Gealy
  • Patent number: 7807535
    Abstract: The invention includes methods of forming layers comprising epitaxial silicon. In one implementation, an opening is formed within a first material received over a monocrystalline material. Opposing walls, of a second material, are formed within the opening which are laterally displaced inwardly of the opposing sidewalls, a space being received between the opposing walls and the opposing sidewalls, with monocrystalline material being exposed between the opposing walls within the opening. A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: October 5, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Nirmal Ramaswamy, Gurtej S. Sandhu, Chris M. Carlson, F. Daniel Gealy
  • Patent number: 7759717
    Abstract: A capacitor includes a first capacitor electrode which includes conductive metal. A second capacitor electrode is spaced from the first capacitor electrode. A capacitor dielectric region is received between the first and second capacitor electrodes. Such region comprising a first portion oxide material of a first density over the first capacitor electrode, and a second portion oxide material of a second density received over the first portion. The oxide-comprising material of the first portion and the oxide-comprising material of the second portion are the same in chemical composition and the second density is greater than the first density.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: July 20, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Chris M. Carlson, F. Daniel Gealy
  • Patent number: 7709326
    Abstract: The invention includes methods of forming layers comprising epitaxial silicon. In one implementation, an opening is formed within a first material received over a monocrystalline material. Opposing sidewalls of the opening are lined with a second material, with monocrystalline material being exposed at a base of the second material-lined opening. A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening. At least a portion of the second material lining is in situ removed. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: May 4, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Nirmal Ramaswamy, Gurtej S. Sandhu, Chris M. Carlson, F. Daniel Gealy
  • Patent number: 7687844
    Abstract: The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the exposure, a layer containing the noble metal is selectively deposited onto the first region relative to the second region. In particular applications, the first region can comprise borophosphosilicate glass, and the second region can comprise either aluminum oxide or doped non-oxidized silicon. The invention also includes capacitor constructions and methods of forming capacitor constructions.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: March 30, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Cancheepuram V. Srividya, F. Daniel Gealy, Thomas M. Graettinger
  • Patent number: 7635623
    Abstract: A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form conductive TiOxNy having resistivity no greater than 1 ohm·cm over the TiN-comprising material where x is greater than 0 and y is from 0 to 1.4. A capacitor dielectric is formed over the conductive TiOxNy. Conductive second capacitor electrode material is formed over the capacitor dielectric. Other aspects and implementations are contemplated, including capacitors independent of method of fabrication.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: December 22, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Noel Rocklein, F. Daniel Gealy
  • Publication number: 20090244806
    Abstract: A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form conductive TiOxNy having resistivity no greater than 1 ohm·cm over the TiN-comprising material where x is greater than 0 and y is from 0 to 1.4. A capacitor dielectric is formed over the conductive TiOxNy. Conductive second capacitor electrode material is formed over the capacitor dielectric. Other aspects and implementations are contemplated, including capacitors independent of method of fabrication.
    Type: Application
    Filed: June 8, 2009
    Publication date: October 1, 2009
    Inventors: Vishwanath Bhat, Noel Rocklein, F. Daniel Gealy
  • Publication number: 20090195967
    Abstract: The invention includes ALD-type methods in which two or more different precursors are utilized with one or more reactants to form a material. In particular aspects, the precursors are hafnium and aluminum, the only reactant is ozone, and the material is hafnium oxide predominantly in a tetragonal crystalline phase.
    Type: Application
    Filed: April 13, 2009
    Publication date: August 6, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Cancheepuram V. Srividya, Noel Rocklein, John Vernon, Jeff Nelson, F. Daniel Gealy, David Korn
  • Publication number: 20090197386
    Abstract: The invention includes methods of electrically interconnecting different elevation conductive structures, methods of forming capacitors, methods of forming an interconnect between a substrate bit line contact and a bit line in DRAM, and methods of forming DRAM memory cells. In one implementation, a method of electrically interconnecting different elevation conductive structures includes forming a first conductive structure comprising a first electrically conductive surface at a first elevation of a substrate. A nanowhisker is grown from the first electrically conductive surface, and is provided to be electrically conductive. Electrically insulative material is provided about the nanowhisker. An electrically conductive material is deposited over the electrically insulative material in electrical contact with the nanowhisker at a second elevation which is elevationally outward of the first elevation, and the electrically conductive material is provided into a second conductive structure.
    Type: Application
    Filed: April 6, 2009
    Publication date: August 6, 2009
    Inventors: Brett W. Busch, David K. Hwang, F. Daniel Gealy
  • Patent number: 7550345
    Abstract: The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is provided, and first reaction conditions are utilized to form hafnium-containing seed material in a desired crystalline phase and orientation over the substrate. Subsequently, second reaction conditions are utilized to grow second hafnium-containing material over the seed material. The second hafnium-containing material is in a crystalline phase and/or orientation different from the crystalline phase and orientation of the hafnium-containing seed material. The second hafnium-containing material can be, for example, in an amorphous phase. The seed material is then utilized to induce a desired crystalline phase and orientation in the second hafnium-containing material. The invention also includes capacitor constructions utilizing hafnium-containing materials, and circuit assemblies comprising the capacitor constructions.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: June 23, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, F. Daniel Gealy, Gurtej S. Sandhu
  • Patent number: 7537804
    Abstract: In some embodiments, the invention may include utilization of at least one iteration of an ALD pulse sequence that has the pulse subsets M2-M1-R- and M1-(R-M2-)x: where x is at least 2; where M1 is a first metal-containing precursor comprising a first metal, M2 is a second metal-containing precursor comprising a second metal different from the first metal, and R is a reactant which reacts with one or both of the first and second metals. The ALD pulse sequence forms material over a substrate, and such material includes the first and second metals. The hyphen between pulses means that the second pulse directly follows the first pulse, with the term “directly follows” indicating that the second pulse either immediately follows the first pulse or that only a purge separates the first and second pulses.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: May 26, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Cancheepuram V. Srividya, Noel Rocklein, John Vernon, Jeff Nelson, F. Daniel Gealy, David Korn
  • Patent number: 7498057
    Abstract: A deposition method includes positioning a substrate within a deposition chamber defined at least in part by chamber walls. At least one of the chamber walls comprises a chamber surface having a plurality of purge gas inlets to the chamber therein. A process gas is provided over the substrate effective to deposit a layer onto the substrate. During such providing, a material adheres to the chamber surface. Reactive purge gas is emitted to the deposition chamber from the purge gas inlets effective to form a reactive gas curtain over the chamber surface and away from the substrate, with such reactive gas reacting with such adhering material. Further implementations are contemplated.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: March 3, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Demetrius Sarigiannis, Garo J. Derderian, Cem Basceri, Gurtej S. Sandhu, F. Daniel Gealy, Chris M. Carlson