Patents by Inventor F. Daniel Gealy
F. Daniel Gealy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7439564Abstract: The invention includes constructions having two dielectric layers over a conductively-doped semiconductive material. One of the dielectric layers contains aluminum oxide, and the other contains a metal oxide other than aluminum oxide (such metal oxide can be, for example, one or more of hafnium oxide, tantalum oxide, titanium oxide and zirconium oxide). The layer containing aluminum oxide is between the layer containing metal oxide and the conductively-doped semiconductive material. The invention includes capacitor devices having one electrode containing conductively-doped silicon and another electrode containing one or more metals and/or metal compounds. At least two dielectric layers are formed between the two capacitor electrodes, with one of the dielectric layers containing aluminum oxide and the other containing a metal oxide other than aluminum oxide. The invention also includes methods of forming capacitor constructions.Type: GrantFiled: May 5, 2005Date of Patent: October 21, 2008Assignee: Micron Technology, Inc.Inventors: Vishwanath Bhat, F. Daniel Gealy, Cancheepuram V. Srividya
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Publication number: 20080241386Abstract: The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.Type: ApplicationFiled: May 5, 2008Publication date: October 2, 2008Applicant: MICRON TECHNOLOGY, INC.Inventors: Demetrius Sarigiannis, Garo J. Derderian, Cem Basceri, Gurtej S. Sandhu, F. Daniel Gealy, Chris M. Carlson
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Publication number: 20080166572Abstract: The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the exposure, a layer containing the noble metal is selectively deposited onto the first region relative to the second region. In particular applications, the first region can comprise borophosphosilicate glass, and the second region can comprise either aluminum oxide or doped non-oxidized silicon. The invention also includes capacitor constructions and methods of forming capacitor constructions.Type: ApplicationFiled: March 20, 2008Publication date: July 10, 2008Inventors: Cancheepuram V. Srividya, F. Daniel Gealy, Thomas M. Graettinger
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Patent number: 7378354Abstract: The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.Type: GrantFiled: April 28, 2006Date of Patent: May 27, 2008Assignee: Micron Technology, Inc.Inventors: Demetrius Sarigiannis, Garo J. Derderian, Cem Basceri, Gurtej S. Sandhu, F. Daniel Gealy, Chris M. Carlson
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Patent number: 7372094Abstract: The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the exposure, a layer containing the noble metal is selectively deposited onto the first region relative to the second region. In particular applications, the first region can comprise borophosphosilicate glass, and the second region can comprise either aluminum oxide or doped non-oxidized silicon. The invention also includes capacitor constructions and methods of forming capacitor constructions.Type: GrantFiled: October 31, 2006Date of Patent: May 13, 2008Assignee: Micron Technology, Inc.Inventors: Cancheepuram V. Srividya, F. Daniel Gealy, Thomas M. Graettinger
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Patent number: 7368382Abstract: The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.Type: GrantFiled: April 28, 2006Date of Patent: May 6, 2008Assignee: Micron Technology, Inc.Inventors: Demetrius Sarigiannis, Garo J. Derderian, Cem Basceri, Gurtej S. Sandhu, F. Daniel Gealy, Chris M. Carlson
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Patent number: 7352023Abstract: The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is provided, and first reaction conditions are utilized to form hafnium-containing seed material in a desired crystalline phase and orientation over the substrate. Subsequently, second reaction conditions are utilized to grow second hafnium-containing material over the seed material. The second hafnium-containing material is in a crystalline phase and/or orientation different from the crystalline phase and orientation of the hafnium-containing seed material. The second hafnium-containing material can be, for example, in an amorphous phase. The seed material is then utilized to induce a desired crystalline phase and orientation in the second hafnium-containing material. The invention also includes capacitor constructions utilizing hafnium-containing materials, and circuit assemblies comprising the capacitor constructions.Type: GrantFiled: July 11, 2006Date of Patent: April 1, 2008Assignee: Micron Technology, Inc.Inventors: Cem Basceri, F. Daniel Gealy, Gurtej S. Sandhu
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Patent number: 7323737Abstract: The invention includes methods in which metal oxide dielectric materials are deposited over barrier layers. The barrier layers can comprise compositions of metal and one or more of carbon, boron and nitrogen, and the metal oxide of the dielectric material can comprise the same metal as the barrier layer. The dielectric material/barrier layer constructions can be incorporated into capacitors. The capacitors can be used in, for example, DRAM cells, which in turn can be used in electronic systems.Type: GrantFiled: September 6, 2006Date of Patent: January 29, 2008Assignee: Micron Technology, Inc.Inventors: Cem Basceri, F. Daniel Gealy, Gurtej S. Sandhu
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Publication number: 20080014694Abstract: A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form conductive TiOxNy having resistivity no greater than 1 ohm·cm over the TiN-comprising material where x is greater than 0 and y is from 0 to 1.4. A capacitor dielectric is formed over the conductive TiOxNy. Conductive second capacitor electrode material is formed over the capacitor dielectric. Other aspects and implementations are contemplated, including capacitors independent of method of fabrication.Type: ApplicationFiled: July 17, 2006Publication date: January 17, 2008Inventors: Vishwanath Bhat, Noel Rocklein, F. Daniel Gealy
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Patent number: 7303991Abstract: The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.Type: GrantFiled: June 7, 2004Date of Patent: December 4, 2007Assignee: Micron Technology, Inc.Inventors: Demetrius Sarigiannis, Garo J. Derderian, Cem Basceri, Gurtej S. Sandhu, F. Daniel Gealy, Chris M. Carlson
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Publication number: 20070269982Abstract: Methods and devices for controlling a growth rate of films in semiconductor structures are shown. Chemical vapor deposition methods and devices include the use of a reaction inhibitor that selectively varies a deposition rate along a surface. One specific method includes atomic layer deposition. One method shown provides high step coverage over features such as trenches in trench plate capacitors. Also shown are methods and devices to provide uniform batch reactor layer thicknesses. Also shown are methods for forming alloy layers with high control over composition. Also shown are methods to selectively control growth rate to provide growth only on selected surfaces.Type: ApplicationFiled: May 18, 2006Publication date: November 22, 2007Inventors: M. Noel Rocklein, F. Daniel Gealy
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Patent number: 7271053Abstract: A method of forming a capacitor includes forming a first conductive capacitor electrode layer over a substrate. The first electrode layer has an outer surface comprising a noble metal in at least one of elemental and alloy forms. A gaseous mixture comprising a metallorganic deposition precursor and an organic solvent is fed to the outer surface under conditions effective to deposit a capacitor dielectric layer onto the outer surface. A conductive capacitor electrode layer is formed over the capacitor dielectric layer. A method of forming an electronic device includes forming a conductive layer over a substrate. The conductive layer has an outer surface comprising a noble metal in at least one of elemental and alloy forms. A gaseous mixture comprising a metallorganic deposition precursor and an organic solvent is fed to the outer surface under conditions effective to deposit a dielectric layer onto the outer surface.Type: GrantFiled: February 3, 2005Date of Patent: September 18, 2007Assignee: Micron Technology, Inc.Inventors: F. Daniel Gealy, Garo J. Derderian, Chris M. Carlson
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Publication number: 20070114586Abstract: An electrical contact includes a non-conductive spacer surrounding conductive plug material along the full height of the contact. The spacer inhibits oxide and other diffusion through the contact. In the illustrated embodiment, the contact includes metals or metal oxides which are resistant to oxidation, and additional conductive barrier layers. The contact is particularly useful in integrated circuits which include high dielectric constant materials.Type: ApplicationFiled: January 23, 2007Publication date: May 24, 2007Inventors: Thomas Graettinger, F. Daniel Gealy
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Patent number: 7217630Abstract: The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is provided, and first reaction conditions are utilized to form hafnium-containing seed material in a desired crystalline phase and orientation over the substrate. Subsequently, second reaction conditions are utilized to grow second hafnium-containing material over the seed material. The second hafnium-containing material is in a crystalline phase and/or orientation different from the crystalline phase and orientation of the hafnium-containing seed material. The second hafnium-containing material can be, for example, in an amorphous phase. The seed material is then utilized to induce a desired crystalline phase and orientation in the second hafnium-containing material. The invention also includes capacitor constructions utilizing hafnium-containing materials, and circuit assemblies comprising the capacitor constructions.Type: GrantFiled: August 26, 2004Date of Patent: May 15, 2007Assignee: Micron Technology, Inc.Inventors: Cem Basceri, F. Daniel Gealy, Gurtej S. Sandhu
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Patent number: 7205600Abstract: A capacitor forming method can include forming an insulation layer over a substrate and forming a barrier layer to threshold voltage shift inducing material over the substrate. An opening can be formed at least into the insulation layer and a capacitor dielectric layer formed at least within the opening. Threshold voltage inducing material can be provided over the barrier layer but be retarded in movement into an electronic device comprised by the substrate. The dielectric layer can comprise a tantalum oxide and the barrier layer can include a silicon nitride. Providing threshold voltage shift inducing material can include oxide annealing dielectric layer such as with N2O. The barrier layer can be formed over the insulation layer, the insulation layer can be formed over the barrier layer, or the barrier layer can be formed over a first insulation layer with a second insulation layer formed over the barrier layer.Type: GrantFiled: August 19, 2002Date of Patent: April 17, 2007Assignee: Micron Technology, Inc.Inventors: Vishnu K. Agarwal, F. Daniel Gealy, Kunal R. Parekh, Randhir P. S. Thakur
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Patent number: 7141847Abstract: The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the exposure, a layer containing the noble metal is selectively deposited onto the first region relative to the second region. In particular applications, the first region can comprise borophosphosilicate glass, and the second region can comprise either aluminum oxide or doped non-oxidized silicon. The invention also includes capacitor constructions and methods of forming capacitor constructions.Type: GrantFiled: December 17, 2004Date of Patent: November 28, 2006Assignee: Micron Technology, Inc.Inventors: Cancheepuram V. Srividya, F. Daniel Gealy, Thomas M. Graettinger
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Patent number: 7129535Abstract: The invention includes methods in which metal oxide dielectric materials are deposited over barrier layers. The barrier layers can comprise compositions of metal and one or more of carbon, boron and nitrogen, and the metal oxide of the dielectric material can comprise the same metal as the barrier layer. The dielectric material/barrier layer constructions can be incorporated into capacitors. The capacitors can be used in, for example, DRAM cells, which in turn can be used in electronic systems.Type: GrantFiled: November 6, 2003Date of Patent: October 31, 2006Assignee: Micron Technology, Inc.Inventors: Cem Basceri, F. Daniel Gealy, Gurtej S. Sandhu
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Patent number: 7115929Abstract: The invention includes constructions having two dielectric layers over a conductively-doped semiconductive material. One of the dielectric layers contains aluminum oxide, and the other contains a metal oxide other than aluminum oxide (such metal oxide can be, for example, one or more of hafnium oxide, tantalum oxide, titanium oxide and zirconium oxide). The layer containing aluminum oxide is between the layer containing metal oxide and the conductively-doped semiconductive material. The invention includes capacitor devices having one electrode containing conductively-doped silicon and another electrode containing one or more metals and/or metal compounds. At least two dielectric layers are formed between the two capacitor electrodes, with one of the dielectric layers containing aluminum oxide and the other containing a metal oxide other than aluminum oxide. The invention also includes methods of forming capacitor constructions.Type: GrantFiled: April 8, 2004Date of Patent: October 3, 2006Assignee: Micron Technology, Inc.Inventors: Vishwanath Bhat, F. Daniel Gealy, Cancheepuram V. Srividya
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Patent number: 7091101Abstract: A method of forming a device is disclosed. The method includes forming a capacitor, and forming the capacitor includes forming a first electrode. The first electrode includes at least one non-smooth surface and is formed from a material selected from the group consisting of transition metals, conductive oxides, alloys thereof, and combinations thereof. Forming the capacitor also includes forming a dielectric on the first electrode, and forming a second electrode on the dielectric. The second electrode includes at least one non-smooth surface.Type: GrantFiled: November 19, 2002Date of Patent: August 15, 2006Assignee: Micron Technology, Inc.Inventors: F. Daniel Gealy, Thomas M. Graettinger
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Patent number: 7056784Abstract: A method of forming a capacitor includes forming a conductive metal first electrode layer over a substrate, with the conductive metal being oxidizable to a higher degree at and above an oxidation temperature as compared to any degree of oxidation below the oxidation temperature. At least one oxygen containing vapor precursor is fed to the conductive metal first electrode layer below the oxidation temperature under conditions effective to form a first portion oxide material of a capacitor dielectric region over the conductive metal first electrode layer. At least one vapor precursor is fed over the first portion at a temperature above the oxidation temperature effective to form a second portion oxide material of the capacitor dielectric region over the first portion. The oxide material of the first portion and the oxide material of the second portion are common in chemical composition. A conductive second electrode layer is formed over the second portion oxide material of the capacitor dielectric region.Type: GrantFiled: August 9, 2004Date of Patent: June 6, 2006Assignee: Micron Technology, Inc.Inventors: Vishwanath Bhat, Chris M. Carlson, F. Daniel Gealy