Abstract: A high density package on package electrical device is disclosed. The electrical device comprises a first integrated circuit package comprising a substrate, an integrated circuit component attached to the substrate, and a molding compound covering the component, wherein the top of the molding compound has a redistribution layer of metal covering at least part of the molding compound. The device further comprises a second integrated circuit package including a second substrate, a semiconductor component attached to the substrate, and a molding compound covering the electronic component, wherein the bottom of the substrate includes metal contacts for communication between the second integrated circuit package and other components. The device further comprises a solder layer that connects the top of the first integrated circuit package to the bottom of the second electric package by connecting the metal of the redistribution layer to the metal connections on the bottom of the second substrate.

Abstract: Embodiments are generally directed to non-planar on-package via capacitor. An embodiment of an embedded capacitor includes a first plate that is formed in a package via; a dielectric layer that is applied on the first plate; and a second plate that is formed in a cavity in the dielectric layer, wherein the first plate and the second plate are non-planar plates.

Abstract: Embodiments of the invention include a semiconductor device and methods of forming the semiconductor device. In an embodiment the semiconductor device comprises a semiconductor die with one or more die contacts. Embodiments include a reflown solder bump on one or more of the die contacts. In an embodiment, an intermetallic compound (IMC) barrier layer is formed at the interface between the solder bump and the die contact. In an embodiment, the IMC barrier layer is a CuZn IMC and/or a Cu5Zn8 IMC.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations to provide solder contacts for electrical connection in socket assemblies. In one embodiment, a solder contact may be disposed on the bottom surface of a die package such that the solder contact is conductively coupled to electrical contacts of the die package. The solder contacts may be disposed to be coupled to pins of a socket assembly, to provide conductive coupling of the electrical contacts of the die package and the pins of the socket assembly. The solder may be selected to be sufficiently soft to provide for better electrical conduction. The pins may also be configured to penetrate the solder contact to provide for better electrical conduction. Other embodiments may be described and/or claimed.

Abstract: Methods of forming microelectronic package structures are described. Those methods/structures may include forming a high density region on a board comprising a first plurality of conductive structures disposed on a dielectric material on the board, wherein the first plurality of conductive structures comprises a first pitch between individual ones of the first plurality of conductive structures. A low density region on the board comprises a second plurality of conductive structures disposed on the dielectric material, wherein the second plurality of conductive structures comprises a second pitch between individual ones of the second plurality of conductive structures, wherein the second pitch is more than about twice the magnitude of the first pitch.

Abstract: A method including activating an area of a polymer layer on a substrate with electromagnetic radiation; modifying the activated area; forming a self-assembled monolayer on the modified active area; reacting the self-assembled monolayer with the self-assembled monolayer; and reacting the self-assembled monolayer with a conductive material. A method including activating an area of a polymer dielectric layer on a substrate with electromagnetic radiation, the area selected for an electrically conductive line; modifying the activated area; forming a self-assembled monolayer on the modified active area; reacting the self-assembled monolayer with a catalyst; and electroless plating a conductive material on the self-assembled monolayer.

Abstract: Embodiments herein may relate to a patch on interposer (PoINT) architecture. In embodiments, the PoINT architecture may include a plurality of solder joints between a patch and an interposer. The solder joints may include a relatively high temperature solder ball and a relatively low temperature solder paste that at least partially surrounds the solder ball. Other embodiments may be described and/or claimed.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations to provide solder contacts for electrical connection in socket assemblies. In one embodiment, a solder contact may be disposed on the bottom surface of a die package such that the solder contact is conductively coupled to electrical contacts of the die package. The solder contacts may be disposed to be coupled to pins of a socket assembly, to provide conductive coupling of the electrical contacts of the die package and the pins of the socket assembly. The solder may be selected to be sufficiently soft to provide for better electrical conduction. The pins may also be configured to penetrate the solder contact to provide for better electrical conduction. Other embodiments may be described and/or claimed.

Abstract: A method and apparatus to minimize thermal impedance using copper on the die or chip backside. Some embodiments use deposited copper having a thickness chosen to complement a given chip thickness, in order to reduce or minimize wafer warpage. In some embodiments, the wafer, having a plurality of chips (e.g., silicon), is thinned (e.g., by chemical-mechanical polishing) before deposition of the copper layer, to reduce the thermal resistance of the chip. Some embodiments further deposit copper in a pattern of bumps, raised areas, or pads, e.g., in a checkerboard pattern, to thicken and add copper while reducing or minimizing wafer warpage and chip stress.

Abstract: A nano-sized metal particle composite includes a first metal that has a particle size of about 50 nanometer or smaller. A wire interconnect is in contact with a reflowed nanosolder and has the same metal or alloy composition as the reflowed nanosolder. A microelectronic package is also disclosed that uses the reflowed nanosolder composition. A method of assembling a microelectronic package includes preparing a wire interconnect template. A computing system includes a nanosolder composition coupled to a wire interconnect.

Abstract: A method includes providing a mixture of molten indium and molten aluminum, and agitating the mixture while reducing its temperature until the aluminum changes from liquid phase to solid phase, forming particles distributed within the molten indium. Agitation of the mixture sufficiently to maintain the aluminum substantially suspended in the molten aluminum continues while further reducing the temperature of the mixture until the indium changes from a liquid phase to a solid phase. A metallic composition is formed, including indium and particles of aluminum suspended within the indium, the aluminum particles being substantially free from oxidation. The metallic (solder) composition can be used to form an assembly, including an integrated circuit (IC) device, at least a first thermal component disposed adjacent to the IC device, and a solder TIM interposed between and thermally coupled with each of the IC device and the first thermal component.

Abstract: A ball-limiting metallurgy (BLM) stack is provided for an electrical device. The BLM stack resists tin migration toward the metallization of the device. A solder system is also provided that includes a eutectic-Pb solder on a substrate that is mated to a high-Pb solder, and that withstands higher temperature reflows and other higher temperature processes.

Abstract: A thermal interface material is provided using composite particles. Advantages include increased thermal conductivity and improved mechanical properties such as lower viscosity. In selected embodiments free particles such as metallic particles or carbon nanotubes, etc. are included in a thermal interface material along with composite particles. An advantage of including free particles along with composite particles includes improved packing density within selected embodiments of thermal interface materials.

Abstract: A method includes providing a mixture of molten indium and molten aluminum, and agitating the mixture while reducing its temperature until the aluminum changes from liquid phase to solid phase, forming particles distributed within the molten indium. Agitation of the mixture sufficiently to maintain the aluminum substantially suspended in the molten aluminum continues while further reducing the temperature of the mixture until the indium changes from a liquid phase to a solid phase. A metallic composition is formed, including indium and particles of aluminum suspended within the indium, the aluminum particles being substantially free from oxidation. The metallic (solder) composition can be used to form an assembly, including an integrated circuit (IC) device, at least a first thermal component disposed adjacent to the IC device, and a solder TIM interposed between and thermally coupled with each of the IC device and the first thermal component.

Abstract: A method includes providing a mixture of molten indium and molten aluminum, and agitating the mixture while reducing its temperature until the aluminum changes from liquid phase to solid phase, forming particles distributed within the molten indium. Agitation of the mixture sufficiently to maintain the aluminum substantially suspended in the molten aluminum continues while further reducing the temperature of the mixture until the indium changes from a liquid phase to a solid phase. A metallic composition is formed, including indium and particles of aluminum suspended within the indium, the aluminum particles being substantially free from oxidation. The metallic (solder) composition can be used to form an assembly, including an integrated circuit (IC) device, at least a first thermal component disposed adjacent to the IC device, and a solder TIM interposed between and thermally coupled with each of the IC device and the first thermal component.

Abstract: Lead-free solders comprising 85-96% tin (Sn) and 4-15% Indium (In) by weight percentage (wt. %) and exemplary uses of the same are disclosed. The Sn—In solder undergoes a martensitic phase change when it is cooled from a reflow temperature to room temperature. As a result, residual stresses that would normally occur due to solder strain caused by relative movement between joined components are substantially reduced. Typically, the relative movement results from a coefficient of thermal expansion (CTE) mismatch between the joined components. The disclosed exemplary uses include flip-chip assembly and IC package to circuit board mounting, such as ball grid array packages.

Abstract: A composite of two or more thermal interface materials (“TIMs”) is placed between a die and a heat spreader to improve cooling of the die in an integrated circuit package. The two or more TIMs vary in heat-dissipation capability depending upon the locations of die hot spots. In an embodiment, a more thermally conductive material may be positioned over one or more die hot spots, and a less thermally conductive material may be positioned abutting and/or surrounding the more thermally conductive material. The two or more TIMs may comprise a solder and a polymer. The composite TIM may be preformed as one unit or as a plurality of units. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.

Abstract: A nano-sized metal particle composite includes a first metal that has a particle size of about 50 nanometer or smaller. A wire interconnect is in contact with a reflowed nanosolder and has the same metal or alloy composition as the reflowed nanosolder. A microelectronic package is also disclosed that uses the reflowed nanosolder composition. A method of assembling a microelectronic package includes preparing a wire interconnect template. A computing system includes a nanosolder composition coupled to a wire interconnect.

Abstract: A nano-sized metal particle composite includes a first metal that has a particle size of about 50 nanometer or smaller. A wire interconnect is in contact with a reflowed nanosolder and has the same metal or alloy composition as the reflowed nanosolder. A microelectronic package is also disclosed that uses the reflowed nanosolder composition. A method of assembling a microelectronic package includes preparing a wire interconnect template. A computing system includes a nanosolder composition coupled to a wire interconnect.

Abstract: Methods of forming a microelectronic structure are described. Those methods include applying a solder paste to a portion of a board, wherein the solder paste is not applied to a ball grid array region, and placing a BGA package comprising at least one low temperature solder ball on the ball grid array region, wherein the at least one low temperature solder ball comprises a eutectic tin bismuth based solder doped with at least one of copper and nickel.