Patents by Inventor Fay Hua

Fay Hua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7223695
    Abstract: Metal alloy barrier layers formed of a group VIII metal alloyed with boron (B) and/or phosphorous (P) and an at least one element from glyoxylic acid, such as carbon (C), hydrogen (H), or carbon and hydrogen (CH) formed by electoless plating are described. These barrier layers may be used as a barrier layer over copper bumps that are soldered to a tin-based solder in a die package. Such barrier layers may also be used as barrier layer liners within trenches in which copper interconnects or vias are formed and as capping layers over copper interconnects or vias to prevent the electromigration of copper.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: May 29, 2007
    Assignee: Intel Corporation
    Inventors: Ting Zhong, Fay Hua, Valery M. Dubin
  • Patent number: 7208830
    Abstract: In one embodiment of the invention, an integrated circuit package includes an integrated circuit, a package substrate, a first bump, a second bump and a shunt to provide for current distribution and reliability redundancy. The first and second bumps provide a first and second electric current pathway between the integrated circuit and package substrate. The shunt provides a third electric current pathway between the first bump and the second bump.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: April 24, 2007
    Assignee: Intel Corporation
    Inventors: Mark Bohr, Jun He, Fay Hua, Dustin P. Wood
  • Publication number: 20070020813
    Abstract: A device and method for designing and manufacturing an integrated heat spreader so that the integrated heat spreader will have a flat surface on which to mount a heat sink after being assembled into a package and exposed to the heat of a die. This device and method for designing and manufacturing an integrated heat spreader would generate a heat spreader that would be built compensate for deformations resulting from (1) physical manipulation during assembly (2) thermal gradients during operation and (3) differing rates of expansion and contraction of the package materials coupled with multiple package assembly steps at elevated temperatures so that one surface of the integrated heat spreader would have a flat shape.
    Type: Application
    Filed: September 5, 2006
    Publication date: January 25, 2007
    Inventors: Thomas Fitzgerald, Carl Deppisch, Fay Hua
  • Patent number: 7164585
    Abstract: An apparatus and system, as well as fabrication methods therefor, may include a die having a surface and a primary material comprising tin, pure tin, or substantially pure tin coupled to the surface. A heat dissipating element may be coupled to the primary material.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: January 16, 2007
    Assignee: Intel Corporation
    Inventors: Susheel G. Jadhav, Carl Deppisch, Fay Hua
  • Publication number: 20070004086
    Abstract: A ball-limiting metallurgy (BLM) stack is provided for an electrical device. The BLM stack resists tin migration toward the metallization of the device. A solder system is also provided that includes a eutectic-Pb solder on a substrate that is mated to a high-Pb solder, and that withstands higher temperature reflows and other higher temperature processes.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventors: Fay Hua, Albert Wu, Kevin Jeng, Krishna Seshan
  • Publication number: 20070001280
    Abstract: A nano-sized metal particle composite includes a first metal that has a particle size of about 50 nanometer or smaller. A wire interconnect is in contact with a reflowed nanosolder and has the same metal or alloy composition as the reflowed nanosolder. A microelectronic package is also disclosed that uses the reflowed nanosolder composition. A method of assembling a microelectronic package includes preparing a wire interconnect template. A computing system includes a nanosolder composition coupled to a wire interconnect.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventor: Fay Hua
  • Publication number: 20070001310
    Abstract: A thermal interface material is provided using composite particles. Advantages include increased thermal conductivity and improved mechanical properties such as lower viscosity. In selected embodiments free particles such as metallic particles or carbon nanotubes, etc. are included in a thermal interface material along with composite particles. An advantage of including free particles along with composite particles includes improved packing density within selected embodiments of thermal interface materials.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 4, 2007
    Inventors: Fay Hua, James Maveety
  • Publication number: 20060276022
    Abstract: A structure including a substrate, a copper bump formed over the substrate, and a barrier layer comprising an alloy of at least one of iron and nickel, formed over the copper bump, and methods to make such a structure.
    Type: Application
    Filed: June 1, 2005
    Publication date: December 7, 2006
    Inventors: Jianxing Li, Ming Fang, Ting Zhong, Fay Hua, Kevin Lee
  • Patent number: 7122460
    Abstract: A microelectronic package is disclosed including a microelectronic device, a substrate, and a signaling path coupling the microelectronic device with the substrate. The signaling path includes a conductive material, a solder joint, and a barrier material disposed between the conductive material and the solder joint. The barrier material may include nickel, cobalt, iron, titanium, and combinations thereof.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: October 17, 2006
    Assignee: Intel Corporation
    Inventor: Fay Hua
  • Patent number: 7111771
    Abstract: A doped tin-indium solder composition is disclosed. The doped tin-indium solder exhibits a retained fine-grain structure and superplasticity after significant thermal cycling and thermal and mechanical stresses experienced in a microelectronic package. A process of forming the doped tin-indium solder is also disclosed. A microelectronic package is also disclosed that uses the doped tin-indium solder composition. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes the doped tin-indium solder.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: September 26, 2006
    Assignee: Intel Corporation
    Inventor: Fay Hua
  • Patent number: 7102226
    Abstract: A device and method for designing and manufacturing an integrated heat spreader so that the integrated heat spreader will have a flat surface on which to mount a heat sink after being assembled into a package and exposed to the heat of a die. This device and method for designing and manufacturing an integrated heat spreader would generate a heat spreader that would be built compensate for deformations resulting from (1) physical manipulation during assembly (2) thermal gradients during operation and (3) differing rates of expansion and contraction of the package materials coupled with multiple package assembly steps at elevated temperatures so that one surface of the integrated heat spreader would have a flat shape.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: September 5, 2006
    Assignee: Intel Corporation
    Inventors: Thomas J. Fitzgerald, Carl L. Deppisch, Fay Hua
  • Patent number: 7081669
    Abstract: Devices and systems including a heat spreader with possibly controlled thermal expansion. For example, an integral heat spreader may include an insert formed of a high thermal conductivity material with a first coefficient of thermal expansion, and a ring formed of a stiff material with a second coefficient of thermal expansion, wherein the second coefficient of thermal expansion is smaller or significantly smaller than the first coefficient of thermal expansion. An integral heat spreader may optionally include, for example, a plating, a coating, or a patch, and may be included, for example, in a semiconductor device.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: July 25, 2006
    Assignee: Intel Corporation
    Inventors: Thomas J. Fitzgerald, Carl Deppisch, Fay Hua
  • Publication number: 20060097375
    Abstract: In one embodiment of the invention, an integrated circuit package includes an integrated circuit, a package substrate, a first bump, a second bump and a shunt to provide for current distribution and reliability redundancy. The first and second bumps provide a first and second electric current pathway between the integrated circuit and package substrate. The shunt provides a third electric current pathway between the first bump and the second bump.
    Type: Application
    Filed: December 27, 2005
    Publication date: May 11, 2006
    Inventors: Mark Bohr, Jun He, Fay Hua, Dustin Wood
  • Patent number: 7036573
    Abstract: A thermal interface material made of a binder material and a fusible filler.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: May 2, 2006
    Assignee: Intel Corporation
    Inventors: Paul A. Koning, Fay Hua, Carl L. Deppisch
  • Publication number: 20060071340
    Abstract: Metal alloy barrier layers formed of a group VII metal alloyed with boron (B) and/or phosphorous (P) and an at least one element from glyoxylic acid, such as carbon (C), hydrogen (H), or carbon and hydrogen (CH) formed by electoless plating are described. These barrier layers may be used as a barrier layer over copper bumps that are soldered to a tin-based solder in a die package. Such barrier layers may also be used as barrier layer liners within trenches in which copper interconnects or vias are formed and as capping layers over copper interconnects or vias to prevent the electromigration of copper.
    Type: Application
    Filed: September 30, 2004
    Publication date: April 6, 2006
    Inventors: Ting Zhong, Fay Hua, Valery Dubin
  • Publication number: 20060068216
    Abstract: A nano-sized metal particle composition includes a first metal that has a particle size of about 20 nanometer or smaller. The nano-sized metal particle can include a second metal that forms a shell about the first metal. A microelectronic package is also disclosed that uses the nano-sized metal particle composition. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes the nano-sized metal particle composition.
    Type: Application
    Filed: September 30, 2004
    Publication date: March 30, 2006
    Inventors: Fay Hua, C. Garner
  • Publication number: 20060001178
    Abstract: In one embodiment of the invention, an integrated circuit package includes an integrated circuit, a package substrate, a first bump, a second bump and a shunt to provide for current distribution and reliability redundancy. The first and second bumps provide a first and second electric current pathway between the integrated circuit and package substrate. The shunt provides a third electric current pathway between the first bump and the second bump.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Mark Bohr, Jun He, Fay Hua, Dustin Wood
  • Publication number: 20050280142
    Abstract: Embodiments include electronic packages and methods for forming electronic packages. One method includes providing a die and a thermal interface material on the die. A metal body is adapted to fit over the die. A wetting layer of a material comprising indium is formed on the metal body. The thermal interface material on the die is brought into contact with the wetting layer of material comprising indium. The thermal interface material is heated to form a bond between the thermal interface material and the wetting layer so that the thermal interface material is coupled to the metal body, and to form a bond between the thermal interface material and the die so that the thermal interface material is coupled to the die.
    Type: Application
    Filed: June 18, 2004
    Publication date: December 22, 2005
    Inventors: Fay Hua, Thomas Fitzgerald, Carl Deppisch, Gregory Chrysler
  • Publication number: 20050157471
    Abstract: A system includes a thermal interface material (TIM) to transfer heat from a die to a heat spreader. The system includes a heat transfer subsystem disposed on the backside surface of the die. In one embodiment, the heat transfer subsystem comprises a first heat transfer material and a second heat transfer material discretely disposed within the first heat transfer material. A method of bonding a die to a heat spreader uses a die-referenced process as opposed to a substrate-referenced process.
    Type: Application
    Filed: March 15, 2005
    Publication date: July 21, 2005
    Inventors: Kris Whittenburg, Fay Hua, Carl Deppisch, Sabina Houle, Peter Brandenburger, Kim Phillippe
  • Publication number: 20050153523
    Abstract: Lead-free solders comprising 85-96% tin (Sn) and 4-15% Indium (In) by weight percentage (wt. %) and exemplary uses of the same are disclosed. The Sn—In solder undergoes a martensitic phase change when it is cooled from a reflow temperature to room temperature. As a result, residual stresses that would normally occur due to solder strain caused by relative movement between joined components are substantially reduced. Typically, the relative movement results from a coefficient of thermal expansion (CTE) mismatch between the joined components. The disclosed exemplary uses include flip-chip assembly and IC package to circuit board mounting, such as ball grid array packages.
    Type: Application
    Filed: March 4, 2005
    Publication date: July 14, 2005
    Inventor: Fay Hua