Abstract: The integrated memory has memory cells which are combined to form individually addressable standard units, and one or more redundant units for replacing one of the standard units on an address basis. The memory also has a self-test unit for performing a function test on the memory cells and for performing an analysis as to which of the standard units is to be replaced by a respective redundant unit. There is also a first memory unit for storing the address, determined by the self-test unit, of the standard unit which is to be replaced by the redundant unit, and a comparison unit connected to an address bus and to outputs of the first memory unit, for comparing an address present on the address bus with the address stored in the first memory unit. The comparison unit activates the redundant unit if a match is recognized. The first memory unit has at least one output which is connected to a corresponding output of the integrated circuit for outputting the respectively stored address.