Abstract: A frequency synthesizer (10) for providing a modulated output signal (fo) includes a reference frequency signal (fr) and a voltage controlled oscillator (14). For dividing the frequency of the output signal from the voltage controlled oscillator (14) by a divisor, a programmable divider (16) is coupled to the output of the voltage controlled oscillator (14). To produce a phase-locked loop in which the frequency of the output signal from the voltage controlled oscillator (14) is equal to the frequency of the reference frequency (fr) signal multiplied by the divisor, a phase detector (12 ) having a first input coupled to the reference frequency signal (fr), a second input coupled to the output of the programmable divider (16), and an output coupled to the input of the voltage controlled oscillator (14) is also provided. A first integrator (24) for integrating a modulating signal provides an integrated signal and a first control signal.

Abstract: A phase detector is provided for detecting the phase difference between a first input signal and a second input signal and providing an output corresponding thereto. The phase detector comprises a dual state phase detector, a tri-state phase detector, a control input for receiving a control signal, and a control circuit for selecting either the dual state phase detector or tri-state phase detector. The dual state phase detector compares the phase difference between the first input signal and the second input signal. The tri-state phase detector compares the phase difference between the second input signal and the inverse of the first input signal. The control circuit selects the output of the dual state phase detector or selects the output of the tri-state phase detector based upon the control signal.

Abstract: Operational characteristics of a crystal reference element (10) are measured during a testing and grading process. Once determined, information representing these operational characteristics are stored in a memory means (16) within the crystal reference element. In this way, the operational characteristics particular to each crystal reference element may be readily retrieved and used to compensate an oscillator circuit (32).

Abstract: A digital phase detector for providing an output characterized by the phase difference of a first input signals and a second input signal is provided. The phase detector comprises a first and a second dual state phase detector, each providing an output having a duty cycle corresponding to the phase difference of the input signals. The phase detectors operate linearly for a range of 360 degrees of phase difference, and provide a signal when the phase diference between the two input signals has exceeded the 360 degree range. The first phase detector provides the phase difference of the first and second input signals, while the second phase detector provides the phase difference between the second and the inverse of the first input signal. The output of the phase detector of the invention is provided by the phase detector having the phase difference within the 360 degree range.

Abstract: A synthesizer circuit with spur compensation utilizes fractional division in the synthesizer loop. Two accumulators are utilized for determining the divisor value N. The capacity of the two accumulators is selectable. An offset value is selectively introduced into the accumulators in order to produce a waveform having an acceptable spurious content.

Abstract: A synthesizer circuit with spur compensation utilizes fractional division in the synthesizer loop. Two accumulators are utilized for determining the divisor value N. The capacity of the two accumulators is selectable. An offset value is selectively introduced into the accumulators in order to produce a waveform having an acceptable spurious content.