Abstract: SOI (silicon-on-insulator) technology has been touted as a promising approach for fabricating advanced integrated circuits because of its advantage over bulk silicon circuits such as faster speed and improved radiation tolerance. One drawback to SOI is that parasitic bipolar induced latch-up/breakdown voltage levels severely limits the maximum supply voltage at which SOI circuits and devices can operate. When the parasitic device turns on, the SOI transistor cannot be switched off by changing the gate bias. What is described is a method whereby the operating voltage in which this effect occurs is significantly increased thus allowing circuit operation at reasonable power supply voltages. The method is to implant an electrically neutral in silicon impurity atom such as krypton, xenon or germanium into the device to form ion scattering centers. The size of the impurity atom must be much larger than the size of the silicon atom. The size difference generating a scattering center.

Abstract: A method of forming a radiation hardened SOI structure is disclosed. The buried oxide layer of an SOI structure is hardened prior to the bonding of a device wafer which forms the silicon portion of the silicon-on-insulator. The radiation hardening is done by implantation of recombination center-generating impurities. All the radiation hardening is done prior to the bonding of the device silicon layer and allows for radiation hardening of the buried oxide layer of an SOI structure without any damage to the silicon device layer.

Abstract: A process to form poly sidegate LDD structures on buried channel MOSFETs is described. A polysilicon spacer is formed on the gate after source/drain processing. The spacer is later shorted to the main gate by implantation of neutral impurities. The process is particularly suited for SOI technology.

Abstract: A method of having a frontside contact to a SOI wafer is described. Before any device processing steps a trench is etched through the SOI layers to the substrate. This trench is maintained during device processing and opened during source/drain implantation. At metallization an ohmic contact is made to the substrate.