Patents by Inventor Fumihiko Koga

Fumihiko Koga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11222912
    Abstract: Provided is an imaging element including a photoelectric conversion unit formed by stacking a first electrode, a photoelectric conversion layer and a second electrode. The photoelectric conversion unit further includes a charge storage electrode which is disposed to be spaced apart from the first electrode and disposed opposite to the photoelectric conversion layer via an insulating layer. The photoelectric conversion unit is formed of N number of photoelectric conversion unit segments, and the same applies to the photoelectric conversion layer, the insulating layer and the charge storage electrode. An nth photoelectric conversion unit segment is formed of an nth charge storage electrode segment, an nth insulating layer segment and an nth photoelectric conversion layer segment. As n increases, the nth photoelectric conversion unit segment is located farther from the first electrode. A thickness of the insulating layer segment gradually changes from a first to Nth photoelectric conversion unit segment.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: January 11, 2022
    Assignee: SONY CORPORATION
    Inventors: Akira Furukawa, Yoshihiro Ando, Hideaki Togashi, Fumihiko Koga
  • Patent number: 11223758
    Abstract: The present disclosure relates to a solid-state imaging device, a method for driving the solid-state imaging device, and an electronic device capable of improving auto-focusing accuracy by using a phase difference signal obtained by using a photoelectric conversion film. The solid-state imaging device includes a pixel including a photoelectric conversion portion having a structure where a photoelectric conversion film is interposed by an upper electrode on the photoelectric conversion film and a lower electrode under the photoelectric conversion film. The upper electrode is divided into a first upper electrode and a second upper electrode. The present disclosure can be applied to, for example, a solid-state imaging device or the like.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: January 11, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Keisuke Hatano, Fumihiko Koga, Tetsuji Yamaguchi, Shinichiro Izawa
  • Patent number: 11218656
    Abstract: A solid-state imaging device that is one aspect of the present disclosure has a first photoelectric conversion portion, an upper electrode, and a lower electrode formed outside a substrate, the first photoelectric conversion portion performing photoelectric conversion in accordance with incident light, the upper electrode and the lower electrode being formed to sandwich the first photoelectric conversion portion. The solid-state imaging device includes an aperture pixel that is disposed on a pixel array, and generates a normal pixel signal; an OPB pixel that is disposed at an end portion on the pixel array, and generates a pixel signal indicating a dark current component; and a charge releasing portion that is disposed between the aperture pixel and the OPB pixel, and releases electric charge flowing out from the aperture pixel.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: January 4, 2022
    Assignee: SONY CORPORATION
    Inventors: Taiichiro Watanabe, Fumihiko Koga
  • Patent number: 11211411
    Abstract: The present technology relates to a solid-state image sensing device capable of restricting a deterioration in photoelectric conversion characteristic of a photoelectric conversion unit, and an electronic device. A solid-state image sensing device includes: a photoelectric conversion unit formed outside a semiconductor substrate; a charge holding unit for holding signal charges generated by the photoelectric conversion unit; a reset transistor for resetting the potential of the charge holding unit; a capacitance switching transistor connected to the charge holding unit and directed for switching the capacitance of the charge holding unit; and an additional capacitance device connected to the capacitance switching transistor. The present technology is applicable to solid-state image sensing devices and the like, for example.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: December 28, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Fumihiko Koga
  • Publication number: 20210351213
    Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
    Type: Application
    Filed: July 22, 2021
    Publication date: November 11, 2021
    Applicant: Sony Group Corporation
    Inventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
  • Publication number: 20210335874
    Abstract: The present disclosure relates to a solid-state imaging device, a method for driving the solid-state imaging device, and an electronic device capable of improving auto-focusing accuracy by using a phase difference signal obtained by using a photoelectric conversion film. The solid-state imaging device includes a pixel including a photoelectric conversion portion having a structure where a photoelectric conversion film is interposed by an upper electrode on the photoelectric conversion film and a lower electrode under the photoelectric conversion film. The upper electrode is divided into a first upper electrode and a second upper electrode. The present disclosure can be applied to, for example, a solid-state imaging device or the like.
    Type: Application
    Filed: July 8, 2021
    Publication date: October 28, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Keisuke HATANO, Fumihiko KOGA, Tetsuji YAMAGUCHI, Shinichiro IZAWA
  • Publication number: 20210313381
    Abstract: Provided is a solid-state image capturing element including a semiconductor substrate and first and second photoelectric conversion parts configured to convert light into electric charge. The first and the second photoelectric conversion parts each have a laminated structure including an upper electrode, a lower electrode, a photoelectric conversion film sandwiched between the upper electrode and the lower electrode, and an accumulation electrode facing the upper electrode through the photoelectric conversion film and an insulating film.
    Type: Application
    Filed: July 25, 2019
    Publication date: October 7, 2021
    Applicants: SONY CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenichi MURATA, Masahiro JOEI, Fumihiko KOGA, Iwao YAGI, Shintarou HIRATA, Hideaki TOGASHI, Yosuke SAITO, Shingo TAKAHASHI
  • Publication number: 20210288092
    Abstract: An imaging element includes a photoelectric conversion unit including a first electrode 11, a photoelectric conversion layer 13, and a second electrode 12 that are stacked, in which the photoelectric conversion unit further includes a charge storage electrode 14 arranged apart from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through an insulating layer 82, and when photoelectric conversion occurs in the photoelectric conversion layer 13 after light enters the photoelectric conversion layer 13, an absolute value of a potential applied to a part 13C of the photoelectric conversion layer 13 facing the charge storage electrode 14 is a value larger than an absolute value of a potential applied to a region 13B of the photoelectric conversion layer 13 positioned between the imaging element and an adjacent imaging element.
    Type: Application
    Filed: June 21, 2018
    Publication date: September 16, 2021
    Inventors: Taiichiro WATANABE, Fumihiko KOGA, Kyosuke ITO, Hideaki TOGASHI, Yusaku SUGIMORI
  • Publication number: 20210280629
    Abstract: [Subject] An imaging element has at least a photoelectric conversion section, a first transistor TR1, and a second transistor TR2, the photoelectric conversion section includes a photoelectric conversion layer 13, a first electrode 11, and a second electrode 12, the imaging element further has a first photoelectric conversion layer extension section 13A, a third electrode 51, and a fourth electrode 51C, the first transistor TR1 includes the second electrode 12 that functions as one source/drain section, the third electrode that functions as a gate section 51, and the first photoelectric conversion layer extension section 13A that functions as the other source/drain section, and the first transistor TR1 (TRrst) is provided adjacent to the photoelectric conversion section.
    Type: Application
    Filed: May 5, 2021
    Publication date: September 9, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Fumihiko KOGA
  • Publication number: 20210257415
    Abstract: An imaging device includes a first electrode, a charge accumulating electrode arranged with a space from the first electrode, an isolation electrode arranged with a space from the first electrode and the charge accumulating electrode and surrounding the charge accumulating electrode, a photoelectric conversion layer formed in contact with the first electrode and above the charge accumulating electrode with an insulating layer interposed therebetween, and a second electrode formed on the photoelectric conversion layer. The isolation electrode includes a first isolation electrode and a second isolation electrode arranged with a space from the first isolation electrode, and the first isolation electrode is positioned between the first electrode and the second isolation electrode.
    Type: Application
    Filed: June 7, 2019
    Publication date: August 19, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yukio KANEDA, Fumihiko KOGA
  • Publication number: 20210249474
    Abstract: There is provided a solid-state image sensor, a solid-state imaging device, an electronic apparatus, and a method of manufacturing a solid-state image sensor capable of improving characteristics. There is provided a solid-state image sensor including a stacked structure that includes a semiconductor substrate, a first photoelectric converter provided above the semiconductor substrate and converting light into charges, and a second photoelectric converter provided above the first photoelectric converter and converting light into charges, where the first photoelectric converter and the second photoelectric converter include a photoelectric conversion stacked structure in which a common electrode, a photoelectric conversion film, and a readout electrode are stacked so that the first photoelectric converter and the second photoelectric converter are in a line-symmetrical relationship with each other with a vertical plane perpendicular to a stacking direction of the stacked structure as an axis of symmetry.
    Type: Application
    Filed: June 11, 2019
    Publication date: August 12, 2021
    Applicants: SONY CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideaki TOGASHI, Iwao YAGI, Masahiro JOEI, Fumihiko KOGA, Kenichi MURATA, Shintarou HIRATA, Yosuke SAITO, Akira FURUKAWA
  • Patent number: 11088187
    Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: August 10, 2021
    Inventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
  • Publication number: 20210233948
    Abstract: A solid-state imaging element with pixel transistors and wires capable of efficiently outputting and transferring a pixel signal from a stacked photoelectric conversion film while suppressing an increase in manufacturing cost, and a manufacturing method thereof are provided.
    Type: Application
    Filed: April 19, 2019
    Publication date: July 29, 2021
    Applicant: SONY CORPORATION
    Inventors: Masahiro JOEI, Kenichi MURATA, Fumihiko KOGA, Iwao YAGI, Shintarou HIRATA, Hideaki TOGASHI, Yosuke SAITO
  • Publication number: 20210203866
    Abstract: The present technology relates to a solid-state imaging device that can improve imaging quality by reducing variation in the voltage of a charge retention unit, a method of driving the solid-state imaging device, and an electronic apparatus. A first photoelectric conversion unit generates and accumulates signal charge by receiving light that has entered a pixel, and photoelectrically converting the light. A first charge retention unit retains the generated signal charge. A first output transistor outputs the signal charge in the first charge retention unit as a pixel signal, when the pixel is selected by the first select transistor. A first voltage control transistor controls the voltage of the output end of the first output transistor. The present technology can be applied to pixels in solid-state imaging devices, for example.
    Type: Application
    Filed: February 25, 2021
    Publication date: July 1, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Fumihiko KOGA
  • Patent number: 11037979
    Abstract: An imaging element has at least a photoelectric conversion section, a first transistor TR1, and a second transistor TR2, the photoelectric conversion section includes a photoelectric conversion layer, a first electrode, and a second electrode, the imaging element further has a first photoelectric conversion layer extension section, a third electrode, and a fourth electrode, the first transistor TR1 includes the second electrode that functions as one source/drain section, the third electrode that functions as a gate section, and the first photoelectric conversion layer extension section that functions as the other source/drain section, and the first transistor TR1 (TRrst) is provided adjacent to the photoelectric conversion section.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: June 15, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Fumihiko Koga
  • Publication number: 20210136309
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a photoelectric conversion layer; a first electrode that collects a negative signal charge generated in the photoelectric conversion layer; and a second electrode that collects a positive signal charge generated in the photoelectric conversion layer. Each of the first electrode and the second electrode is provided on side opposite to a light incident surface of the photoelectric conversion layer.
    Type: Application
    Filed: February 13, 2018
    Publication date: May 6, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Fumihiko KOGA
  • Patent number: 10965893
    Abstract: The present technology relates to a solid-state imaging device that can improve imaging quality by reducing variation in the voltage of a charge retention unit, a method of driving the solid-state imaging device, and an electronic apparatus. A first photoelectric conversion unit generates and accumulates signal charge by receiving light that has entered a pixel, and photoelectrically converting the light. A first charge retention unit retains the generated signal charge. A first output transistor outputs the signal charge in the first charge retention unit as a pixel signal, when the pixel is selected by the first select transistor. A first voltage control transistor controls the voltage of the output end of the first output transistor. The present technology can be applied to pixels in solid-state imaging devices, for example.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: March 30, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Fumihiko Koga
  • Publication number: 20210082987
    Abstract: A solid-state imaging element includes a pixel including a first imaging element, a second imaging element, a third imaging element, and an on-chip micro lens 90. The first imaging element includes a first electrode 11, a third electrode 12, and a second electrode 16. The pixel further includes a third electrode control line VOA connected to the third electrode 12 and a plurality of control lines 62B connected to various transistors included in the second and third imaging elements and different from the third electrode control line VOA. In the pixel, a distance between the center of the on-chip micro lens 90 included in the pixel and any one of the plurality of control lines 62B included in the pixel is shorter than a distance between the center of the on-chip micro lens 90 included in the pixel and the third electrode control line VOA included in the pixel.
    Type: Application
    Filed: June 8, 2018
    Publication date: March 18, 2021
    Inventors: Nobuhiro KAWAI, Hideaki TOGASHI, Fumihiko KOGA, Tetsuji YAMAGUCHI, Shintarou HIRATA, Taiichiro WATANABE, Yoshihiro ANDO
  • Publication number: 20210029331
    Abstract: An image processor according to the present disclosure includes: an image segmentation processing section to generate a plurality of first map data on the basis of first image map data including a plurality of pixel values, the plurality of first map data having arrangement patterns of pixel values different from each other and including pixel values located at positions different from each other; an interpolation processing section to generate a plurality of second map by determining a pixel value at a position where no pixel value is present in each of the plurality of first map data with use of interpolation processing; and a synthesis processing section to generate third map data by generating, on the basis of pixel values at positions corresponding to each other in the plurality of second map data, a pixel value at a position corresponding to the positions.
    Type: Application
    Filed: January 29, 2019
    Publication date: January 28, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Fumihiko KOGA, Tetsuji YAMAGUCHI
  • Patent number: 10903279
    Abstract: Provided is a solid state image sensor capable of reducing signal mixture due to electric capacitive coupling between adjacent pixels, a method for manufacturing the same, and an electronic device. A first pixel and a second pixel are adjacently arranged in the solid state image sensor. Each of the first pixel and the second pixel has a photoelectric conversion film for photoelectrically converting an incident light, and a lower electrode arranged below the photoelectric conversion film, and another electrode different from the lower electrodes is provided between the lower electrodes of the first pixel and the second pixel. The present disclosure is applicable to solid state image sensors and the like, for example.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: January 26, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shintarou Hirata, Tetsuji Yamaguchi, Fumihiko Koga, Shinpei Fukuoka, Shuji Manda