Patents by Inventor Ge Lee

Ge Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984408
    Abstract: A semiconductor package comprises a lead frame, a die pad, bond pads, and leads. A die may be arranged on the die pad, the die comprising an integrated circuit. In an example, the die and at least a portion of the lead frame are encapsulated with a molding compound (MC). A first thickness of the MC over a first portion of the die is less than a second thickness over a second portion of the die to form a cavity in the MC and the MC directly contacts the first portion and the second portion of the die.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: May 14, 2024
    Assignee: NXP USA, Inc.
    Inventors: You Ge, Zhijie Wang, Yit Meng Lee, Mariano Layson Ching, Jr.
  • Publication number: 20240139156
    Abstract: Disclosed are a combination treating prostate cancer, a pharmaceutical composition and a treatment method. The combination includes one of a benzoheterocyclic compound as shown in formula (I), a pharmaceutically acceptable salt thereof, a solvate thereof, a crystalline form thereof, a co-crystal thereof, a stereoisomer thereof, an isotope compound thereof, a metabolite thereof and a prodrug thereof, and an androgen receptor pathway modulator. The combination, the pharmaceutical composition thereof and the treatment method inhibit prostate cancer in a more effective manner.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Chuansheng GE, Baisong LIAO, Wen-Cherng LEE
  • Patent number: 11972888
    Abstract: An inductor for a converter of an electric machine includes a core defining a channel configured to receive transmission fluid on an outer surface of the core. Coils made of windings are wrapped on the core. The windings enclose an open side of the channel to define an oil flow passage, wherein oil flowing through the oil flow passage is in direct contact with both the windings and the core to absorb heat from the windings and the core.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: April 30, 2024
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Moon Young Lee, Baoming Ge, Fan Wang, Lihua Chen
  • Publication number: 20240074121
    Abstract: An electrified vehicle includes an inductor having an associated arcuate deflector to redirect fluid toward inductor coils to facilitate heat transfer. The inductor may be disposed within a transmission proximate to at least one gear that distributes fluid during rotation to proximate components to provide splash lubrication. The arcuate deflector may redirect splashed fluid from between the inductor and the transmission housing toward the inductor coils. The deflector may be secured to the inductor via terminal connectors that electrically couple the inductor coils to a bus bar connected to a variable voltage converter.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Applicant: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: John CASCI, Baoming GE, Fan WANG, Moon Young LEE
  • Patent number: 11776866
    Abstract: A semiconductor module includes a substrate having a central region, an outer region that surrounds the central region, and a middle region disposed between the central and the outer region, a first semiconductor package mounted on the central region of the substrate, a plurality of second semiconductor packages mounted on the middle region of the substrate, and a heat radiation structure disposed on the first semiconductor package and second semiconductor packages. The heat radiation structure includes a first part that is disposed on top surfaces of the first and second semiconductor packages, a second part that surrounds the middle region, a third part that is spaced apart from the second part and surrounds the first semiconductor package, and a fourth part that connects the second part to the third part.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: October 3, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shle-Ge Lee, Youngbae Kim, Ae-Nee Jang
  • Patent number: 11527470
    Abstract: Disclosed are film packages and methods of fabricating package modules. The film package includes a film substrate that includes a chip region and a peripheral region facing each other in a first direction, a plurality of output pads that are arranged in the first direction on the chip region and on the peripheral region, and a semiconductor chip on the chip region and electrically connected to the output pads. The output pads on the chip region are arranged at regular first intervals along the first direction. The output pads include a plurality of first output pads that are arranged at a first pitch along the first direction on the chip region and a plurality of second output pads on the peripheral region. The second output pads are arranged at a second pitch greater than the first pitch of the first output pads.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: December 13, 2022
    Inventors: Shle-Ge Lee, Youngbae Kim, Ji-Yong Park
  • Patent number: 11140772
    Abstract: A printed circuit board can include a base layer, a first surface and a second surface opposite to each other. A first routing layer can be on the first surface and a second routing layer can be on the second surface, the first routing layer can be provided at an upper part of each of the first and second regions and the second routing layer can be provided at a lower part of each of the first and second regions. The upper part of the first region can have a first line-area ratio, the upper part of the second region can have a second line-area ratio, the lower part of the first region can have a third line-area ratio, the lower part of the second region can have a fourth line-area ratio, the second and third line-area ratios can be greater than each of the first and fourth line-area ratios.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: October 5, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shle-Ge Lee, Youngbae Kim
  • Publication number: 20210183724
    Abstract: A semiconductor module includes a substrate having a central region, an outer region that surrounds the central region, and a middle region disposed between the central and the outer region, a first semiconductor package mounted on the central region of the substrate, a plurality of second semiconductor packages mounted on the middle region of the substrate, and a heat radiation structure disposed on the first semiconductor package and second semiconductor packages. The heat radiation structure includes a first part that is disposed on top surfaces of the first and second semiconductor packages, a second part that surrounds the middle region, a third part that is spaced apart from the second part and surrounds the first semiconductor package, and a fourth part that connects the second part to the third part.
    Type: Application
    Filed: August 17, 2020
    Publication date: June 17, 2021
    Inventors: SHLE-GE LEE, Youngbae Kim, AE-NEE JANG
  • Patent number: 11024568
    Abstract: A semiconductor package is provided. The semiconductor package includes a first substrate, a first semiconductor chip arranged on the first substrate, a first group of at least one solder ball arranged on a side surface of the first semiconductor chip, an interposer arranged on the first semiconductor chip and the first substrate and being in contact with the first group of at least one solder ball, and an adhesive layer arranged between the first semiconductor chip and the interposer and configured to expose at least a portion of un upper surface of the first semiconductor chip, wherein a first height from an upper surface of the first substrate to the upper surface of the first semiconductor chip is greater than a second height of the first group of at least one solder ball.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: June 1, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shle Ge Lee, Young Bae Kim
  • Publication number: 20210104452
    Abstract: Disclosed are film packages and methods of fabricating package modules. The film package includes a film substrate that includes a chip region and a peripheral region facing each other in a first direction, a plurality of output pads that are arranged in the first direction on the chip region and on the peripheral region, and a semiconductor chip on the chip region and electrically connected to the output pads. The output pads on the chip region are arranged at regular first intervals along the first direction. The output pads include a plurality of first output pads that are arranged at a first pitch along the first direction on the chip region and a plurality of second output pads on the peripheral region. The second output pads are arranged at a second pitch greater than the first pitch of the first output pads.
    Type: Application
    Filed: May 12, 2020
    Publication date: April 8, 2021
    Inventors: SHLE-GE LEE, YOUNGBAE KIM, JI-YONG PARK
  • Patent number: 10672694
    Abstract: A printed circuit board (PCB) reducing a thickness of a semiconductor package and improving reliability of the semiconductor package, a semiconductor package including the PCB, and a method of manufacturing the PCB may be provided. The PCB may include a substrate base having at least one base layer, and a plurality of wiring layers disposed on a top surface and a bottom surface of the at least one base layer, the plurality of wiring layers defining a plurality of wiring patterns, respectively may be provided. An elastic modulus of a conductive material of one wiring pattern of at least one wiring layer from among the plurality of wiring layers may be less than a conductive material of another wiring pattern.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: June 2, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-suk Kim, Kyong-soon Cho, Shle-ge Lee, Yu-duk Kim
  • Publication number: 20200126899
    Abstract: A printed circuit board is provided that includes a base substrate including a pair of first edges extending in a first direction and a pair of second edges extending in a second direction, perpendicular to the first direction. A circuit region including a plurality of circuit patterns is disposed on at least one of a first surface and a second surface of the base substrate. A dummy region including a conductive dummy pattern is disposed on at least one of the first surface and the second surface. The conductive dummy pattern is separated from a boundary of the dummy region, and a maximum length of the conductive dummy pattern in the first or second direction passes through a center of the conductive dummy pattern.
    Type: Application
    Filed: April 24, 2019
    Publication date: April 23, 2020
    Inventors: SHLE GE LEE, YOUNG BAE KIM
  • Publication number: 20200092989
    Abstract: A printed circuit board can include a base layer, a first surface and a second surface opposite to each other. A first routing layer can be on the first surface and a second routing layer can be on the second surface, the first routing layer can be provided at an upper part of each of the first and second regions and the second routing layer can be provided at a lower part of each of the first and second regions. The upper part of the first region can have a first line-area ratio, the upper part of the second region can have a second line-area ratio, the lower part of the first region can have a third line-area ratio, the lower part of the second region can have a fourth line-area ratio, the second and third line-area ratios can be greater than each of the first and fourth line-area ratios.
    Type: Application
    Filed: November 20, 2019
    Publication date: March 19, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shle-Ge LEE, Youngbae KIM
  • Publication number: 20200043837
    Abstract: A semiconductor package is provided. The semiconductor package includes a first substrate, a first semiconductor chip arranged on the first substrate, a first group of at least one solder ball arranged on a side surface of the first semiconductor chip, an interposer arranged on the first semiconductor chip and the first substrate and being in contact with the first group of at least one solder ball, and an adhesive layer arranged between the first semiconductor chip and the interposer and configured to expose at least a portion of un upper surface of the first semiconductor chip, wherein a first height from an upper surface of the first substrate to the upper surface of the first semiconductor chip is greater than a second height of the first group of at least one solder ball.
    Type: Application
    Filed: April 23, 2019
    Publication date: February 6, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Shle Ge LEE, Young Bae KIM
  • Patent number: 10506706
    Abstract: A printed circuit board can include a base layer, a first surface and a second surface opposite to each other. A first routing layer can be on the first surface and a second routing layer can be on the second surface, the first routing layer can be provided at an upper part of each of the first and second regions and the second routing layer can be provided at a lower part of each of the first and second regions. The upper part of the first region can have a first line-area ratio, the upper part of the second region can have a second line-area ratio, the lower part of the first region can have a third line-area ratio, the lower part of the second region can have a fourth line-area ratio, the second and third line-area ratios can be greater than each of the first and fourth line-area ratios.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: December 10, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shle-Ge Lee, Youngbae Kim
  • Publication number: 20190124761
    Abstract: A printed circuit board can include a base layer, a first surface and a second surface opposite to each other. A first routing layer can be on the first surface and a second routing layer can be on the second surface, the first routing layer can be provided at an upper part of each of the first and second regions and the second routing layer can be provided at a lower part of each of the first and second regions. The upper part of the first region can have a first line-area ratio, the upper part of the second region can have a second line-area ratio, the lower part of the first region can have a third line-area ratio, the lower part of the second region can have a fourth line-area ratio, the second and third line-area ratios can be greater than each of the first and fourth line-area ratios.
    Type: Application
    Filed: April 30, 2018
    Publication date: April 25, 2019
    Inventors: Shle-Ge Lee, Youngbae Kim
  • Publication number: 20190082084
    Abstract: Image sensor modules are provided including a lower structure, and an upper structure on the lower structure. The image sensor module further includes a semiconductor substrate in which an image sensor is formed. The lower structure includes a semiconductor chip on a region of a lower surface of the upper structure and connected to the image sensor; a reinforcing frame along an edge of the lower surface of the upper structure; and a resin molding portion between the reinforcing frame and the semiconductor chip. The reinforcing frame has a Young's modulus higher than a Young's modulus of the resin molding portion.
    Type: Application
    Filed: April 20, 2018
    Publication date: March 14, 2019
    Inventor: Shle Ge Lee
  • Patent number: 9728497
    Abstract: A substrate structure may include a base substrate, a plurality of unit substrate regions arranged on the base substrate in one or more rows and one or more columns and spaced apart from one another, and dummy substrate regions between the unit substrate regions. In a row direction or a column direction, a first pitch between central points of two adjacent unit substrate regions among the unit substrate regions and a second pitch between central points of two adjacent second unit substrate regions among the unit substrate regions are different from each other.
    Type: Grant
    Filed: June 12, 2016
    Date of Patent: August 8, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yu-duk Kim, Kyong-soon Cho, Shle-ge Lee, Da-hee Park
  • Publication number: 20170207155
    Abstract: A printed circuit board (PCB) reducing a thickness of a semiconductor package and improving reliability of the semiconductor package, a semiconductor package including the PCB, and a method of manufacturing the PCB may be provided. The PCB may include a substrate base having at least one base layer, and a plurality of wiring layers disposed on a top surface and a bottom surface of the at least one base layer, the plurality of wiring layers defining a plurality of wiring patterns, respectively may be provided. An elastic modulus of a conductive material of one wiring pattern of at least one wiring layer from among the plurality of wiring layers may be less than a conductive material of another wiring pattern.
    Type: Application
    Filed: January 4, 2017
    Publication date: July 20, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong-suk KIM, Kyong-soon CHO, Shle-ge LEE, Yu-duk KIM
  • Publication number: 20170011992
    Abstract: A substrate structure may include a base substrate, a plurality of unit substrate regions arranged on the base substrate in one or more rows and one or more columns and spaced apart from one another, and dummy substrate regions between the unit substrate regions. In a row direction or a column direction, a first pitch between central points of two adjacent unit substrate regions among the unit substrate regions and a second pitch between central points of two adjacent second unit substrate regions among the unit substrate regions are different from each other.
    Type: Application
    Filed: June 12, 2016
    Publication date: January 12, 2017
    Inventors: Yu-duk KIM, Kyong-soon CHO, Shle-ge LEE, Da-hee PARK