Patents by Inventor Gerd Dirscherl

Gerd Dirscherl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9471793
    Abstract: An embedded security module includes a security processor, volatile and non-volatile memory, and an interface. The security processor includes transistors formed in one or more semiconductor layers of a semiconductor die, and implements one or more security-related functions on data and/or code accessed by the security processor. The volatile memory is fabricated on the same semiconductor die as the security processor and stores the data and/or code accessed by the security processor. The non-volatile memory includes non-volatile storage cells disposed above each semiconductor layer of the semiconductor die, and securely stores at least one of the data and/or code accessed by the security processor and security information relating to the data and/or code accessed by the security processor. The interface is fabricated on the same semiconductor die as the security processor and provides a communication interface for the security processor.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: October 18, 2016
    Assignee: Infineon Technologies AG
    Inventors: Markus Gail, Gerd Dirscherl, Marcus Janke
  • Patent number: 9356622
    Abstract: A method for reconstructing a physically uncloneable function (PUF) A for use in an electronic device is provided. The method includes generating a potentially erroneous PUF At and performing a preliminary correction of the potentially erroneous PUF At by means of a stored correction vector Deltat-1, to obtain a preliminarily corrected PUF Bt. The PUF A is reconstructed from the preliminarily corrected PUF Bt by means of an error correction algorithm. A corresponding apparatus is also provided.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 31, 2016
    Assignee: Infineon Technologies AG
    Inventors: Rainer Goettfert, Gerd Dirscherl, Berndt Gammel, Thomas Kuenemund
  • Patent number: 9356604
    Abstract: An integrated circuit has one or more logic gates and a control circuit. The control circuit has one or more control elements coupled to the logic gates. The control circuit controls the states of the one or more logic gates.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: May 31, 2016
    Assignee: Infineon Technologies AG
    Inventors: Berndt Gammel, Thomas Nirschl, Gerd Dirscherl, Philip Schlazer, Stefan Rueping
  • Publication number: 20160042160
    Abstract: An apparatus and corresponding method for preventing cloning of code. The apparatus includes a memory, an authentication module, and a device. The memory is configured to store the code, which includes unencrypted code and a fragment of encrypted code. The authentication module is configured to receive and decrypt the fragment of encrypted code from the memory into a fragment of decrypted code, and to store the fragment of decrypted code in an authentication module buffer. The device configured to execute the unencrypted code from the memory and to execute the fragment of decrypted code from the authentication module buffer, wherein the fragment of encrypted code is personalized to the device.
    Type: Application
    Filed: August 6, 2014
    Publication date: February 11, 2016
    Inventors: Witold Gora, Andreas Geiler, Gerd Dirscherl, Albrecht Mayer
  • Publication number: 20150350241
    Abstract: A method for generating a data frame is disclosed which contains a user data block with the message and a code block. To generate the code block, a first data record is initially coded by means of a first coding algorithm in order to calculate a first code word. Subsequently, the message is transformed. By using the first code words thus generated and the transformed message, a second code word is subsequently calculated by using a second coding algorithm. The data frame comprises the second code word but not the first code word.
    Type: Application
    Filed: June 2, 2015
    Publication date: December 3, 2015
    Inventors: Albrecht Mayer, Gerd Dirscherl, Wieland Fischer
  • Publication number: 20150347758
    Abstract: The invention relates to methods and systems for securely transferring embedded code or data to a customer, in particular to methods and systems for securely transferring embedded code, data files or program files designed for a device to a customer in order to prevent the embedded code, data files or program files from being used on unauthorized devices.
    Type: Application
    Filed: July 15, 2015
    Publication date: December 3, 2015
    Inventors: Min Wei Ang, Gerd Dirscherl, Arno Rabenstein
  • Publication number: 20150332756
    Abstract: In accordance with one embodiment, a method for accessing a memory is provided, including carrying out a first access to the memory and charging, for a memory cell, a bit line coupled to the memory cell to a value which is stored or to be stored in the memory cell, holding the state of the bit line until a second access, which follows the first access, and outputting the held state if the second access is a read access to the memory cell.
    Type: Application
    Filed: May 13, 2015
    Publication date: November 19, 2015
    Inventors: Thomas KUENEMUND, Gerd DIRSCHERL, Gunther FENZL, Joel HATSCH, Nikolai SEFZIK
  • Patent number: 9116841
    Abstract: The invention relates to methods and systems for securely transferring embedded code or data to a customer, in particular to methods and systems for securely transferring embedded code, data files or program files designed for a device to a customer in order to prevent the embedded code, data files or program files from being used on unauthorized devices.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: August 25, 2015
    Assignee: Infineon Technologies AG
    Inventors: Min Wei Ang, Gerd Dirscherl, Arno Rabenstein
  • Patent number: 9070439
    Abstract: One or more embodiments relate to an electronic device comprising a circuitry and a programmable resistive element. The programmable resistive element comprises a first and a second state, wherein the programmable resistive element is configured to allow switching from the second state into the first state in response to a signal comprising at least a predefined level. The circuitry is configured to provide signals up the predefined level, wherein the circuitry is configured to provide a switch signal to the programmable resistive element, wherein the switch signal causes switching from the first into the second state.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: June 30, 2015
    Assignee: Infineon Technologies AG
    Inventors: Berndt Gammel, Thomas Nirschl, Gerd Dirscherl, Philip Schlazer
  • Publication number: 20150032992
    Abstract: A processing arrangement having a first processing component and a second processing component is provided. The first component has a first output memory and a second output memory and a control device using the first memory storing a value to be output and the second memory stores a value that is based according to a prescribed function on the value. The control device stores a new value in the first memory whenever the second component has read a value stored in the first memory. The second component has a reading device reading the values stored in the first and second memories, and a processing device that checks whether the value read from the second memory is based according to the prescribed function on the value read from the first memory and, depending on the result, to process the value read from the first memory.
    Type: Application
    Filed: July 28, 2014
    Publication date: January 29, 2015
    Inventors: Rainer Goettfert, Berndt Gammel, Gerd Dirscherl
  • Publication number: 20140223569
    Abstract: An embedded security module includes a security processor, volatile and non-volatile memory, and an interface. The security processor includes transistors formed in one or more semiconductor layers of a semiconductor die, and implements one or more security-related functions on data and/or code accessed by the security processor. The volatile memory is fabricated on the same semiconductor die as the security processor and stores the data and/or code accessed by the security processor. The non-volatile memory includes non-volatile storage cells disposed above each semiconductor layer of the semiconductor die, and securely stores at least one of the data and/or code accessed by the security processor and security information relating to the data and/or code accessed by the security processor. The interface is fabricated on the same semiconductor die as the security processor and provides a communication interface for the security processor.
    Type: Application
    Filed: December 20, 2013
    Publication date: August 7, 2014
    Applicant: Infineon Technologies AG
    Inventors: Markus Gail, Gerd Dirscherl, Marcus Janke
  • Publication number: 20140149748
    Abstract: The invention relates to methods and systems for securely transferring embedded code or data to a customer, in particular to methods and systems for securely transferring embedded code, data files or program files designed for a device to a customer in order to prevent the embedded code, data files or program files from being used on unauthorized devices.
    Type: Application
    Filed: November 28, 2012
    Publication date: May 29, 2014
    Applicant: Infineon Technologies AG
    Inventors: Min Wei Ang, Gerd Dirscherl, Arno Rabenstein
  • Publication number: 20130246881
    Abstract: A method for reconstructing a physically uncloneable function (PUF) A for use in an electronic device is provided. The method includes generating a potentially erroneous PUF At and performing a preliminary correction of the potentially erroneous PUF At by means of a stored correction vector Deltat-1, to obtain a preliminarily corrected PUF Bt. The PUF A is reconstructed from the preliminarily corrected PUF Bt by means of an error correction algorithm. A corresponding apparatus is also provided.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 19, 2013
    Inventors: Rainer Goettfert, Gerd Dirscherl, Berndt Gammel, Thomas Kuenemund
  • Patent number: 8384429
    Abstract: An integrated circuit has one or more logic gates and a control circuit. The control circuit has one or more control elements coupled to the logic gates. The control circuit controls the states of the one or more logic gates. The one or more control elements have one or more programmable resistance elements and/or one or more threshold switching elements.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: February 26, 2013
    Assignee: Infineon Technologies AG
    Inventors: Berndt Gammel, Thomas Nirschl, Gerd Dirscherl, Philip Schlazer, Stefan Rueping
  • Publication number: 20120176833
    Abstract: One or more embodiments relate to an electronic device comprising a circuitry and a programmable resistive element. The programmable resistive element comprises a first and a second state, wherein the programmable resistive element is configured to allow switching from the second state into the first state in response to a signal comprising at least a predefined level. The circuitry is configured to provide signals up the predefined level, wherein the circuitry is configured to provide a switch signal to the programmable resistive element, wherein the switch signal causes switching from the first into the second state.
    Type: Application
    Filed: March 21, 2012
    Publication date: July 12, 2012
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Berndt Gammel, Thomas Nirschl, Gerd Dirscherl, Philip Schlazer
  • Patent number: 8159857
    Abstract: One or more embodiments relate to an electronic device comprising a circuitry and a programmable resistive element. The programmable resistive element comprises a first and a second state, wherein the programmable resistive element is configured to allow switching from the second state into the first state in response to a signal comprising at least a predefined level. The circuitry is configured to provide signals up the predefined level, wherein the circuitry is configured to provide a switch signal to the programmable resistive element, wherein the switch signal causes switching from the first into the second state.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: April 17, 2012
    Assignee: Infineon Technologies AG
    Inventors: Berndt Gammel, Thomas Nirschl, Gerd Dirscherl, Philip Schlazer
  • Publication number: 20110254589
    Abstract: An integrated circuit has one or more logic gates and a control circuit. The control circuit has one or more control elements coupled to the logic gates. The control circuit controls the states of the one or more logic gates. The one or more control elements have one or more programmable resistance elements and/or one or more threshold switching elements.
    Type: Application
    Filed: April 16, 2010
    Publication date: October 20, 2011
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: BERNDT GAMMEL, Thomas Nirschl, Gerd Dirscherl, Philip Schlazer, Stefan Rueping
  • Patent number: 7982488
    Abstract: A semiconductor chip having a subcircuit formed in a substrate; and a phase-change memory cell located on the subcircuit, and configured to directly detect an attack on the subcircuit, or to form a shield to prevent physical access to the subcircuit.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: July 19, 2011
    Assignee: Infineon Technologies AG
    Inventors: Thomas Nirschl, Berndt Gammel, Stefan Rueping, Ronald Kakoschke, Gerd Dirscherl, Philip Schlazer
  • Publication number: 20110069528
    Abstract: One or more embodiments relate to an electronic device comprising a circuitry and a programmable resistive element. The programmable resistive element comprises a first and a second state, wherein the programmable resistive element is configured to allow switching from the second state into the first state in response to a signal comprising at least a predefined level. The circuitry is configured to provide signals up the predefined level, wherein the circuitry is configured to provide a switch signal to the programmable resistive element, wherein the switch signal causes switching from the first into the second state.
    Type: Application
    Filed: September 21, 2009
    Publication date: March 24, 2011
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Berndt Gammel, Thomas Nirschl, Gerd Dirscherl, Philip Schlazer
  • Publication number: 20100301896
    Abstract: A semiconductor chip having a subcircuit formed in a substrate; and a phase-change memory cell located on the subcircuit, and configured to directly detect an attack on the subcircuit, or to form a shield to prevent physical access to the subcircuit.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 2, 2010
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Nirschl, Berndt Gammel, Stefan Rueping, Ronald Kakoschke, Gerd Dirscherl, Philip Schlazer