Abstract: The display control device has a register for holding mode data for giving: a direction about which of a first display mode for performing display control of display data supplied together with a display timing signal from outside, and a second display mode for performing display control of display data written in RAM without accepting supply of a display timing signal from outside to select; and a direction about whether or not to select a scale-up mode for scaling up the display data, so that the mode data can be rewritten from the outside. The display mode is controlled based on the setting values on the register. The control register can be rewritten according to the type of data to be displayed, the system working situation, user settings, etc. Therefore, the low power consumption allowable in terms of system, and a required display performance can be obtained timely and readily.

Abstract: The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register.

Abstract: A display control device and technique for controlling displays on a display unit, in which a plurality of display segments are two-dimensionally arranged (e.g. a dot matrix type display unit), is provided. The technique is effectively applicable to a write data latch circuit of a memory for storing display data in the display control device, such as, for example, a liquid crystal display control device, a mobile electronic apparatus, etc. A display drive control technique for controlling a moving picture display mode of a display device is also provided. The display drive control circuit controls a picture display mode of a display device for displaying still pictures and moving pictures to a liquid crystal display device, such as, for example, a dot matrix type display devices, an organic EL display device, etc.

Abstract: The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register.

Abstract: A display device includes a boosting power supply circuit, a logic circuit and a charge transport path. The boosting power supply circuit generates a boosted power supply voltage by boosting an analog power supply voltage. The logic circuit is responsive to a decrease in a voltage level on at least one of power supply lines to which analog and logic power supply voltages are supplied for controlling a source line drive circuitry and a gate line drive circuitry to discharge charges accumulated in the display panel. The charge transport path is configured to transport charges from a power supply line on which the boosted power supply voltage is generated to a power supply line which supplies an internal logic power supply voltage to the logic circuit in response to the decrease in the voltage level on the at least one of the first and second power supply lines.

Abstract: A liquid crystal display device includes a liquid crystal display panel; and a driver driving the liquid crystal display panel. The liquid crystal display panel includes: a first substrate on which subpixels each including a pixel electrode are integrated; and a second substrate opposed to the first substrate, a plurality of common electrodes being formed on the second substrate. The display region of the liquid crystal display panel is divided into a plurality of sections respectively corresponding to the common electrodes. When a partial display in which an image is selectively displayed in a selected section is performed, the liquid crystal driver drives the common electrode corresponding to the selected section to a predetermined common voltage level, sets the common electrodes corresponding to the non-selected sections to a predetermined reference level, and sets pixel electrodes of subpixels in the non-selected sections to the reference voltage level.

Abstract: The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register.

Abstract: The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register.

Abstract: The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register.

Abstract: A liquid crystal display device includes a liquid crystal display panel; and a driver driving the liquid crystal display panel. The liquid crystal display panel includes: a first substrate on which subpixels each including a pixel electrode are integrated; and a second substrate opposed to the first substrate, a plurality of common electrodes being formed on the second substrate. The display region of the liquid crystal display panel is divided into a plurality of sections respectively corresponding to the common electrodes. When a partial display in which an image is selectively displayed in a selected section is performed, the liquid crystal driver drives the common electrode corresponding to the selected section to a predetermined common voltage level, sets the common electrodes corresponding to the non-selected sections to a predetermined reference level, and sets pixel electrodes of subpixels in the non-selected sections to the reference voltage level.

Abstract: The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register.

Abstract: The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register.

Abstract: No flicker is displayed on the display screen during display of moving pictures and power consumption can be reduced by adding a high quality moving picture display function. Moreover, the number of times of transfer of moving pictures by comprising a still-picture • text • system • I/O bus • interface and a moving picture interface (external display interface), providing a display operation change register (DM) and a RAM access change register (RM) which are changed selectively depending on display content (display mode) displayed on a display device and displaying the display data on the display device via a picture memory even in the moving picture display mode.

Abstract: A display device includes a boosting power supply circuit, a logic circuit and a charge transport path. The boosting power supply circuit generates a boosted power supply voltage by boosting an analog power supply voltage. The logic circuit is responsive to a decrease in a voltage level on at least one of power supply lines to which analog and logic power supply voltages are supplied for controlling a source line drive circuitry and a gate line drive circuitry to discharge charges accumulated in the display panel. The charge transport path is configured to transport charges from a power supply line on which the boosted power supply voltage is generated to a power supply line which supplies an internal logic power supply voltage to the logic circuit in response to the decrease in the voltage level on the at least one of the first and second power supply lines.

Abstract: In a display driver, a first backlight control unit using a histogram and a second backlight control unit using an optical sensor can be used in combination. The display driver includes a PWM generating unit setting a control signal value consisting of a product of a luminance rate of X % and a luminance rate of Y % as a luminance rate of a control signal for controlling a backlight with respect to maximum backlight luminance when a luminance rate of a control signal obtained by first backlight control with respect to the maximum backlight luminance is X % and a luminance rate of a control signal obtained by second backlight control with respect to the maximum backlight luminance is Y %.

Abstract: The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register.

Abstract: In a display driver, a first backlight control unit using a histogram and a second backlight control unit using an optical sensor can be used in combination. The display driver includes a PWM generating unit setting a control signal value consisting of a product of a luminance rate of X % and a luminance rate of Y % as a luminance rate of a control signal for controlling a backlight with respect to maximum backlight luminance when a luminance rate of a control signal obtained by first backlight control with respect to the maximum backlight luminance is X % and a luminance rate of a control signal obtained by second backlight control with respect to the maximum backlight luminance is Y %.

Abstract: The display control device has a register for holding mode data for giving: a direction about which of a first display mode for performing display control of display data supplied together with a display timing signal from outside, and a second display mode for performing display control of display data written in RAM without accepting supply of a display timing signal from outside to select; and a direction about whether or not to select a scale-up mode for scaling up the display data, so that the mode data can be rewritten from the outside. The display mode is controlled based on the setting values on the register. The control register can be rewritten according to the type of data to be displayed, the system working situation, user settings, etc. Therefore, the low power consumption allowable in terms of system, and a required display performance can be obtained timely and readily.

Abstract: A semiconductor device correctly switches endian modes regardless of the current endian mode of an interface. The semiconductor device includes a switching circuit and a first register. The switching circuit switches an interface to be used in big endian or little endian mode. The first register holds control data of the switching circuit. The switching circuit sets the interface in little endian mode when first predetermined control information is supplied to the first register, and sets the interface in big endian mode when second predetermined control information is supplied to the first register. The control information can be correctly inputted without being influenced by the endian setting status.

Abstract: A display control device and technique for controlling displays on a display unit, in which a plurality of display segments are two-dimensionally arranged (e.g. a dot matrix type display unit), is provided. The technique is effectively applicable to a write data latch circuit of a memory for storing display data in the display control device, such as, for example, a liquid crystal display control device, a mobile electronic apparatus, etc. A display drive control technique for controlling a moving picture display mode of a display device is also provided. The display drive control circuit controls a picture display mode of a display device for displaying still pictures and moving pictures to a liquid crystal display device, such as, for example, a dot matrix type display devices, an organic EL display device, etc.