Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, having a plurality of fins on a surface of the substrate; a gate structure across the plurality of fins. The gate structure is located on a portion of a top surface and sidewall surfaces of the plurality of fins. The gate structure includes a first region and a second region on the first region. A bottom boundary of the second region is higher than the top surface of the plurality of fins. A size of the first region in an extending direction of the plurality of fins is smaller than a size of the second region in the extending direction of the plurality of fins.

Abstract: Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate having a first region; forming a plurality of first initial fin structures on the first region of the semiconductor substrate; forming a dummy gate structure across the first initial fin structures by covering portions of top and sidewall surfaces of the first initial fin structures; forming a dielectric layer covering sidewall surfaces of the dummy gate structure and exposing a top surface of the dummy gate structure; removing the dummy gate structure to form a first opening in the dielectric layer and expose portions of top and sidewall surfaces of the first initial fin structures; and performing at least one trimming process on the first initial fin structures to form fin first structures. A width of each first fin structure is smaller than a width of each first initial fin structure.

Abstract: The present application relates to a multi fluid path selector valve, including a valve body, and several fluid outlet pipes. The valve body is provided with several layers of branch channels therein, the branch channel includes a fluid inlet hole and several branch holes. The valve body is provided with communication holes therein for one-to-one communicating the branch holes with the fluid outlet pipes. The valve body is provided with a control mechanism to control the on or off state between the branch hole and communication hole, and the valve body is provided with fluid inlet pipes in communication with the fluid inlet holes respectively.

Abstract: The present application relates to a cleaning device, including an inverted U-shaped frame body, which includes a horizontal beam, and both ends of the beam are respectively connected with vertical beams perpendicular to the beam; a horizontal bearing plate for bearing a cleaning mechanism and a first driving mechanism for driving the bearing plate to move up and down are provided in the frame body; the cleaning mechanism comprises a magnetic sleeve assembly and a magnetic rod in a sleeve connection with it, and the magnetic rod is connected with a second driving mechanism for driving it to move up and down relative to the magnetic sleeve assembly; and movements between the first driving mechanism and the second driving mechanism are coordinated by a PLC.

Abstract: Disclosed is a bamboo strip shaping method, which includes the following steps: S01: cutting a bamboo tube, and removing inner joints, outer joints and bamboo outer skin; S02: trisecting or quartering the bamboo tube in a longitudinal direction to obtain curved bamboo strips; S03: placing the curved bamboo strips in a bamboo strip shaping device for processing; S04: subjecting the curved bamboo strips to steam treatment and heating softening treatment; S05: pressing and shaping the curved bamboo strips to obtain flattened bamboo strips, and drying for a first time under a maintained pressure; S06: wetting bamboo outer skin surfaces and bamboo inner skin surfaces of the flattened bamboo strips, and drying for a second time; and S07: wetting the bamboo outer skin surfaces and the bamboo inner skin surfaces of the flattened bamboo strips, and drying for a third time.

Abstract: A photographic apparatus has an anti jitter optical lens for jitter-reduction. The anti jitter optical lens is disposed between an optical lens group and a photosensitive device of the photographic apparatus, and has no focusing power. The photographic apparatus includes an adjustment component connecting the anti jitter optical lens to an inner wall of a lens barrel of the photographic apparatus, and a control component for actuating the adjustment component to adjust an orientation of the anti jitter optical lens or a position of the anti jitter optical lens along an optical axis to compensate for jitter of the photographic apparatus.

Abstract: The present application relates to a photon measuring and reading device, which belongs to the field of detection equipment, including a mounting seat and a photon counter. The photon counter can move up and down on the mounting seat. The mounting seat is provided with a vertically arranged sliding trough, and the photon counter is provided with a sliding rod slidably connected with the sliding trough. A double head motor is arranged on the mounting base, and a linkage mechanism is arranged between the output shaft at the tail end of the double head motor and the sliding rod. The bottom end of the photon counter is fixed with a box body.

Abstract: The present disclosure provides a semiconductor device and a fabrication method. The method includes: providing a substrate having fins and forming an initial gate structure across the fins, which covers a portion of a top surface and sidewall surfaces of the fins, and includes an initial first region and an initial second region on the initial first region. A bottom boundary of the initial second region is higher than the top surface of the fins, and a size of the initial first region is larger than a size of the initial second region. A first etching process is performed on sidewalls of the initial gate structure to form a gate structure, which includes a first region formed by etching the initial first region, and a second region formed by etching the initial second region. A size of the first region is smaller than a size of the second region.

Abstract: Semiconductor structure and fabrication method are provided. The method includes providing a substrate including a first region and a second region; forming a plurality of fins on the first region of the substrate; forming a first isolation structure on the first region and the second region of the substrate; forming a gate structure and a dummy gate structure each across fins and the first isolation structure at the first region; forming an epitaxial layer in each fin on two sides of the gate structure; forming a first opening by etching a portion of each of the first isolation structure and the substrate that are at the second region; filling the first opening with a conductive material layer; removing the dummy gate structure and a portion of the conductive material layer in the first opening to form a power rail; and forming a second isolation structure in a second opening.

Abstract: A flash memory device and its manufacturing method, which is related to semiconductor techniques. The flash memory device comprises: a substrate; and a memory unit on the substrate, comprising: a channel structure on the substrate, wherein the channel structure comprise, in an order from inner to outer of the channel structure, a channel layer, an insulation layer wrapped around the channel layer, and a charge capture layer wrapped around the insulation layer; a plurality of gate structures wrapped around the channel structure and arranged along a symmetry axis of the channel structure, wherein there exist cavities between neighboring gate structures; a support structure supporting the gate structures; and a plurality of gate contact components each contacting a gate structure. The cavities between neighboring gate structures lower the parasitic capacitance, reduce inter-gate interference, and suppress the influence from writing or erasing operations of nearby memory units.

Abstract: Disclosed is a bamboo strip shaping method, which includes the following steps: S01: cutting a bamboo tube, and removing inner joints, outer joints and bamboo outer skin; S02: trisecting or quartering the bamboo tube in a longitudinal direction to obtain curved bamboo strips; S03: placing the curved bamboo strips in a bamboo strip shaping device for processing; S04: subjecting the curved bamboo strips to steam treatment and heating softening treatment; S05: pressing and shaping the curved bamboo strips to obtain flattened bamboo strips, and drying for a first time under a maintained pressure; S06: wetting bamboo outer skin surfaces and bamboo inner skin surfaces of the flattened bamboo strips, and drying for a second time; and S07: wetting the bamboo outer skin surfaces and the bamboo inner skin surfaces of the flattened bamboo strips, and drying for a third time.

Abstract: A foldable scooter comprises a front wheel unit, a frame unit, a rear wheel unit, and a. seat unit. The frame unit comprises a connecting rod, a linking rod, and a stand, wherein the stand comprises a footboard, a chassis, and two side cover plates located on two sides of the footboard, the linking rod is located in a space between the footboard and the chassis, the connecting rod has an end fixedly connected with the front wheel unit and an end stretching into the middle of the footboard from front to be fixedly connected with the front end of the linking rod, and the rear end of the linking rod is fixedly connected with the rear wheel unit. The foldable scooter is simple in structure, convenient to operate, and capable of being folded to he stored and transported easily.

Abstract: A method and a device for transaction clearing are used to increase clearing flexibility and reduce server load pressure. The method includes receiving first clearing requests transmitted by a quantity N of terminals, where N>1 (201); according to the first clearing requests, acquiring transaction data of the quantity N of terminals from a database (202); initializing a cache queue, and loading the transaction data into the cache queue (203); reading the transaction data in the cache queue, and performing a clearing process on the transaction data (204); and writing a clearing result into the database and feeding back the terminals with an execution result of the first clearing requests (205).

Abstract: One form of a method for manufacturing a semiconductor structure includes: providing a base, where the base includes a substrate and a plurality of discrete fins located on the substrate, a device region and an isolation region that are adjacent to each other, a metal gate structure formed on the substrate, where the metal gate structure spans the fins and covers parts of the tops and parts of side walls of the fins, an interlayer dielectric layer that is formed on the substrate exposed by the metal gate structure, where the interlayer dielectric layer covers a side wall of the metal gate structure; performing dry etching, where the metal gate structure in the isolation region and the fins located below the metal gate structure are sequentially etched to form an isolation trench surrounded by the interlayer dielectric layer and the remaining base; and forming an isolation structure in the isolation trench to simplify process steps of forming an isolation structure.

Abstract: Semiconductor structure and method of forming semiconductor structure are provided. The semiconductor structure includes a substrate, a first isolation structure, and a first nanostructure and a second nanostructure on two sides of the first isolation structure. The semiconductor structure also includes a second isolation structure, and a third nanostructure and a fourth nanostructure on two sides of the second isolation structure. A top of the second isolation structure is lower than a top of the first isolation structure. The semiconductor structure also includes a first gate structure and a second gate structure. The first gate structure and the second gate structure expose a top surface of the first isolation structure. The semiconductor structure also includes a third gate structure and a fourth gate structure. The third gate structure and the fourth gate structure are in contact with each other on a top surface of the second isolation structure.

Abstract: Semiconductor structure and method of forming a semiconductor structure are provided. A substrate is provided, including a first region and a second region that are adjacent to each other and arranged in a first direction. Fins are disposed on a surface of the substrate at the first region, and first openings are located between adjacent fins. The fins include fins to-be-removed. A first dielectric layer is formed on sidewalls of the fins. The first dielectric layer fills the first openings. A first groove is formed in the substrate at the second region by etching the substrate at the second region using the first dielectric layer as a mask. After forming the first groove, a second groove is formed in the substrate at the first region by removing the fins to-be-removed and a portion of the substrate located at bottoms of the fins to-be-removed.

Abstract: A method of forming a method of forming a semiconductor device includes providing a semiconductor structure, etching back each gate structure of a plurality of gate structures to form an opening, forming a barrier layer over the dielectric layer, forming a sacrificial layer over the barrier layer, planarizing the sacrificial layer till a surface of the sacrificial layer is substantially flat, and using a gas cluster ion beam (GCIB) process to planarize the sacrificial layer and the barrier layer, and to remove the sacrificial layer and to provide a planarized barrier layer. The semiconductor structure includes a semiconductor substrate, a fin, the plurality of gate structures, and a dielectric layer over the semiconductor substrate between adjacent gate structures. A top of the dielectric layer is coplanar with a top of each of the plurality of gate structures.

Abstract: Semiconductor structures and fabrication methods thereof are provided. The method includes providing a substrate; forming a stacked material structure on the substrate; and forming trenches in the stacked material structure. Bottoms of the trenches are in the first material layer, the trenches are arranged along a first direction and form an initial stacked structure sequentially including an initial first layer, an initial second layer and an initial third layer. The method also includes etching the initial third layer to form transitional third layers arranged along a second direction perpendicular to the first direction; removing a portion of the initial first layer and a portion of the initial second layer of the initial stacked structure at two sides along the second direction to form a stacked structure including a first layer, a second layer and the transitional third layers; and forming a gate structure.

Abstract: Semiconductor structures and fabrication methods thereof are provided. The semiconductor includes a substrate; a gate structure on the substrate; and a dielectric layer on the substrate and covering sidewall surfaces of the gate structure. The dielectric layer includes an opening passing through the gate structure along a direction perpendicular to an extending direction of the gate structure. The semiconductor structure also includes a first isolation layer in the opening and with a top surface lower than a top surface of the gate structure.