Patents by Inventor Han Chang
Han Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11985297Abstract: A system for generating a centrally located floating three-dimensional image display for a plurality of passengers positioned within a vehicle includes a plurality of autostereoscopic three-dimensional displays, one autostereoscopic three-dimensional display individually associated with each one of the plurality of passengers, and a controller in communication with each of the plurality of autostereoscopic three-dimensional displays and adapted to cause each one of the plurality of autostereoscopic three-dimensional displays to display a three-dimensional image to the associated one of the plurality of passengers, wherein, each of the plurality of passengers perceives the three-dimensional image floating at a central location within the vehicle.Type: GrantFiled: August 16, 2022Date of Patent: May 14, 2024Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLCInventors: Manoj Sharma, Kai-Han Chang, Thomas A. Seder, Joseph F. Szczerba
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Patent number: 11985906Abstract: A magnetic tunnel junction (MTJ) memory cell and a metallic etch mask portion are formed over a substrate. At least one dielectric etch stop layer is deposited over the metallic etch mask portion, and a via-level dielectric layer is deposited over the at least one dielectric etch stop layer. A via cavity may be etched through the via-level dielectric layer, and a top surface of the at least one dielectric etch stop layer is physically exposed. The via cavity may be vertically extended by removing portions of the at least one dielectric etch stop layer and the metallic etch mask portion. A contact via structure is formed directly on a top surface of the top electrode in the via cavity to provide a low-resistance contact to the top electrode.Type: GrantFiled: March 12, 2021Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yu-Feng Yin, Tai-Yen Peng, An-Shen Chang, Han-Ting Tsai, Qiang Fu, Chung-Te Lin
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Patent number: 11984516Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.Type: GrantFiled: February 16, 2023Date of Patent: May 14, 2024Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.Inventors: Fu-Chou Liu, Jui-Hung Hsu, Yu-Chiang Peng, Chien-Chen Lee, Ya-Han Chang, Li-Chun Hung
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Publication number: 20240154025Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate electrode over the fin; removing lower portions of the dummy gate electrode proximate to the isolation regions, where after removing the lower portions, there is a gap between the isolation regions and a lower surface of the dummy gate electrode facing the isolation regions; filling the gap with a gate fill material; after filling the gap, forming gate spacers along sidewalls of the dummy gate electrode and along sidewalls of the gate fill material; and replacing the dummy gate electrode and the gate fill material with a metalType: ApplicationFiled: January 10, 2024Publication date: May 9, 2024Inventors: Shih-Yao Lin, Kuei-Yu Kao, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
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Publication number: 20240154027Abstract: A high voltage semiconductor device includes a semiconductor substrate, a first drift region, a gate structure, a first sub gate structure, a first spacer structure, a second spacer structure, and a first insulation structure. The first drift region is disposed in the semiconductor substrate. The gate structure is disposed on the semiconductor substrate and separated from the first sub gate structure. The first sub gate structure and the first insulation structure are disposed on the first drift region. The first spacer structure is disposed on a sidewall of the gate structure. The second spacer structure is disposed on a sidewall of the first sub gate structure. At least a part of the first insulation structure is located between the first spacer structure and the second spacer structure. The first insulation structure is directly connected with the first drift region located between the first spacer structure and the second spacer structure.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Hsin-Han Wu, Kai-Kuen Chang, Ping-Hung Chiang
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Publication number: 20240153655Abstract: According to an embodiment of the present invention, an emergency core cooling system (ECCS) valve provided between a reactor vessel of a system-integrated modular advanced reactor (SMART) and a small containment vessel formed to surround the reactor vessel so that a coolant is filled in a space between the reactor vessel and the small containment vessel in the event of a loss of coolant accident (LOCA) includes an outer shell connected to the reactor vessel and formed to protrude toward the small containment vessel and having a connector formed therein so as to communicatively connect an inside of the reactor vessel to an inside of the small containment vessel, an inner shell provided inside the outer shell at a preset distance from an inner wall of the outer shell, a piston movably constrained and inserted through a piston opening formed in the inner shell at a position facing the connector of the outer shell to open and close the connector, and a spring provided on an outer circumferential surface of the pType: ApplicationFiled: November 1, 2021Publication date: May 9, 2024Inventors: Soo Jai SHIN, Cheongbong CHANG, Seungyeob RYU, Han-Ok KANG, Young-In KIM, Ji Han CHUN, Sung Won LIM, Joo Hyung MOON, Hun Sik HAN, Seok KIM, Hyunjun CHO
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Publication number: 20240153786Abstract: A method includes bonding a package component to a composite carrier. The composite carrier includes a base carrier and an absorption layer, and the absorption layer is between the base carrier and the package component. A laser beam is projected onto the composite carrier. The laser beam penetrates through the base carrier to ablate the absorption layer. The base carrier may then be separated from the package component.Type: ApplicationFiled: January 11, 2024Publication date: May 9, 2024Inventors: Huicheng Chang, Jyh-Cherng Sheu, Chen-Fong Tsai, Yun Chen Teng, Han-De Chen, Yee-Chia Yeo
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Patent number: 11978265Abstract: A method for displaying lane information on an augmented reality display includes receiving roadway data. The roadway data includes information about a roadway along a route of a vehicle. The roadway includes a plurality of lanes. The roadway data includes lane information about at least one of the plurality of lanes along the route of the vehicle. The method further includes receiving vehicle-location data. The vehicle-location data indicates a location of the vehicle. The method further includes determining that that the vehicle is approaching a road junction using the vehicle-location data and the roadway data. The method further includes, in response to determining that the vehicle is approaching the road junction, transmitting a command signal to a dual-focal plane augmented reality display to display at least one virtual image that is indicative of the lane information.Type: GrantFiled: March 11, 2022Date of Patent: May 7, 2024Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLCInventors: Joseph F. Szczerba, John P. Weiss, Kai-Han Chang, Thomas A. Seder
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Patent number: 11979479Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.Type: GrantFiled: January 16, 2023Date of Patent: May 7, 2024Assignees: Chung Yuan Christian University, KGI Securities Co. Ltd.Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
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Publication number: 20240142776Abstract: A pupil replicator for a head up display system includes a waveguide adapted to receive an incoming image beam, and including a transparent body having a partially transmissive top surface and a reflective bottom surface, a Dammann grating adapted to create a plurality of duplicate image beams having equal intensity, and reflect each of the plurality of duplicate image beams within the waveguide, and a beam aligning device adapted to receive each of the plurality of duplicate image beams and to reflect each of the plurality of duplicate image beams at a common angle relative to the waveguide, wherein, after being reflected by the beam aligning device, each of the plurality of duplicate image beams are parallel to one another.Type: ApplicationFiled: October 26, 2022Publication date: May 2, 2024Inventors: Manoj Sharma, Thomas A. Seder, Kai-Han Chang
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Publication number: 20240145304Abstract: An interconnect structure is provided. The interconnect structure includes a transistor on a substrate, a first dielectric layer over the transistor, a first metal line through the first dielectric layer, a second dielectric layer over the first dielectric layer, and a via through the second dielectric layer and on the first metal line. A first side surface of the first dielectric layer includes a first portion in direct contact with the first metal line and a second portion in direct contact with the via, and the first portion of the first side surface of the first dielectric layer is aligned with the second portion of the first side surface of the first dielectric layer.Type: ApplicationFiled: December 22, 2023Publication date: May 2, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Han LIN, Che-Cheng CHANG
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Patent number: 11973127Abstract: Semiconductor structures and method for forming the same are provide. The semiconductor structure includes a fin structure protruding from a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes an Arsenic-doped region formed in the fin structure and a source/drain structure formed over the Arsenic-doped region. In addition, a bottommost portion of the Arsenic-doped region is lower than a bottommost portion of the source/drain structure.Type: GrantFiled: November 4, 2020Date of Patent: April 30, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shahaji B. More, Shih-Chieh Chang, Cheng-Han Lee, Huai-Tei Yang
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Patent number: 11973048Abstract: A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.Type: GrantFiled: November 8, 2021Date of Patent: April 30, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: An-Nong Wen, Ching-Han Huang, Ching-Ho Chang
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Patent number: 11971544Abstract: A hybrid augmented reality head-up display system for displaying graphics upon a windscreen of a vehicle includes a windscreen having a transparent substrate including light emitting particles dispersed within, a primary graphic projection device for generating a first set of images upon the windscreen of the vehicle based on visible light, and a secondary graphic projection device for generating a second set of images upon a secondary area the windscreen of the vehicle based on an excitation light. The first set of images are displayed upon a primary area of the windscreen. The light emitting particles in the windscreen emit visible light in response to absorbing the excitation light. The first set of images displayed upon the primary area of the windscreen cooperate with the second set of images displayed upon the secondary area of the windscreen to create an edge-to-edge augmented reality view.Type: GrantFiled: May 20, 2022Date of Patent: April 30, 2024Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLCInventors: Thomas A. Seder, Kai-Han Chang, Joseph F. Szczerba, John P. Weiss
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Publication number: 20240134239Abstract: A display device including a substrate, a cholesteric liquid crystal layer, and a transparent electrode layer that are sequentially stacked is provided. The cholesteric liquid crystal layer includes cholesteric liquid crystal molecules and a plurality of transparent photoresist structures. Each of the transparent photoresist structures is a closed structure, and the cholesteric liquid crystal molecules are respectively accommodated in a plurality of patterned areas respectively surrounded by the transparent photoresist structures, so as to form a plurality of cholesteric liquid crystal patterns. The transparent electrode layer includes a plurality of sub-electrodes. The cholesteric liquid crystal patterns are respectively driven by the sub-electrodes. An orthogonal projection of each of the transparent photoresist structures on the substrate falls in an orthogonal projection of a corresponding sub-electrode of the sub-electrodes on the substrate.Type: ApplicationFiled: October 22, 2023Publication date: April 25, 2024Applicant: AUO CorporationInventors: Chun-Han Lee, Chien-Chuan Chen, Ju-Wen Chang, Hsin Chiang Chiang, Peng-Yu Chen
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Publication number: 20240134279Abstract: A photoresist includes a solvent, a polymer and an additive. The polymer is dissolved in the solvent, and the additive is dispersed in the solvent. The additive includes a double bond or includes an epoxy group. The additive has a surface tension different from a surface tension of the polymer.Type: ApplicationFiled: March 27, 2023Publication date: April 25, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chieh-Hsin HSIEH, Wei-Han LAI, Ching-Yu CHANG
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Publication number: 20240137431Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.Type: ApplicationFiled: January 16, 2023Publication date: April 25, 2024Applicants: Chung Yuan Christian University, KGI Securities Co. Ltd.Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
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Publication number: 20240134410Abstract: The present disclosure discloses a memory access interface device. A clock generation circuit generates reference signals. A transmitter transmits an output command and address signal to a memory device according to the reference signals. A signal training circuit executes a training process in a training mode that includes steps outlined below. A training signal is generated such that the training signal is transmitted as the output command and address signal. The training signal and the data signal generated by the memory device are compared to generate a comparison result indicating whether the data signal matches the training signal. The comparison result is stored. The clock generation circuit is controlled to modify a phase of at least one of the reference signals to be one of a plurality of under-test phases to execute a new loop of the training process until all the under-test phases are trained.Type: ApplicationFiled: October 24, 2022Publication date: April 25, 2024Inventors: FU-CHIN TSAI, GER-CHIH CHOU, CHUN-CHI YU, CHIH-WEI CHANG, MIN-HAN TSAI
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Publication number: 20240137592Abstract: An information processing method of the present disclosure includes: via one or more computer processors, receiving data relating to live sales performed by a livestreamer via live video streaming; inputting the data into a machine learning model; and based on a result generated by the machine learning model, obtaining promotional information that is useful for the livestreamer to perform the live sales.Type: ApplicationFiled: October 10, 2023Publication date: April 25, 2024Inventors: Yung-Chi HSU, Chia-Han CHANG, Chen-Hai TENG
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Patent number: 11964298Abstract: A slot die coating device according to one embodiment of the present disclosure includes a slot die coater forming an internal space for housing an electrode slurry and a discharge passage in communication with the internal space to discharge the electrode slurry; and a block positioned in the internal space, wherein a first distance defined between a first inside portion and a second inside portion forming the internal space is greater than a second distance defined between a first discharge inside portion and a second discharge inside portion forming the discharge passage, and wherein the block comprises a first block facing the first inside portion and a second block facing the second inside portion.Type: GrantFiled: May 4, 2021Date of Patent: April 23, 2024Assignee: LG Energy Solution, Ltd.Inventors: Jeong Soo Seol, Hwan Han Kim, Seok Ju Chang