Patents by Inventor Han Chang

Han Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967652
    Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: April 23, 2024
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventors: Fu-Chou Liu, Jui-Hung Hsu, Yu-Chiang Peng, Chien-Chen Lee, Ya-Han Chang, Li-Chun Hung
  • Patent number: 11968908
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Publication number: 20240120314
    Abstract: Methods of ion implantation combined with annealing using a pulsed laser or a furnace for cutting substrate in forming semiconductor devices and semiconductor devices including the same are disclosed. In an embodiment, a method includes forming a transistor structure of a device on a first semiconductor substrate; forming a front-side interconnect structure over a front side of the transistor structure; bonding a carrier substrate to the front-side interconnect structure; implanting ions into the first semiconductor substrate to form an implantation region of the first semiconductor substrate; and removing the first semiconductor substrate. Removing the first semiconductor substrate includes applying an annealing process to separate the implantation region from a remainder region of the first semiconductor substrate. The method also includes forming a back-side interconnect structure over a back side of the transistor structure.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 11, 2024
    Inventors: Huicheng Chang, Jyh-Cherng Sheu, Chen-Fong Tsai, Yun Chen Teng, Han-De Chen, Yee-Chia Yeo
  • Publication number: 20240115616
    Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Publication number: 20240120277
    Abstract: A chip structure is provided. The chip structure includes a substrate, a redistribution layer over the substrate, a bonding pad over the redistribution layer, a shielding pad over the redistribution layer and surrounding the bonding pad, an insulating layer over the redistribution layer and the shielding pad, and a bump over the bonding pad and the insulating layer. The insulating layer includes a first part and a second part surrounded by the first part, the first part has first thickness, the second part has a second thickness, and the first thickness and the second thickness are different.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Hong-Seng SHUE, Sheng-Han TSAI, Kuo-Chin CHANG, Mirng-Ji LII, Kuo-Ching HSU
  • Patent number: 11955336
    Abstract: Method of manufacturing a semiconductor device, includes forming a protective layer over substrate having a plurality of protrusions and recesses. The protective layer includes polymer composition including polymer having repeating units of one or more of: Wherein a, b, c, d, e, f, g, h, and i are each independently H, —OH, —ROH, —R(OH)2, —NH2, —NHR, —NR2, —SH, —RSH, or —R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each repeating unit is not H. R, R1, and R2 are each independently a C1-C10 alkyl group, a C3-C10 cycloalkyl group, a C1-C10 hydroxyalkyl group, a C2-C10 alkoxy group, a C2-C10 alkoxy alkyl group, a C2-C10 acetyl group, a C3-C10 acetylalkyl group, a C1-C10 carboxyl group, a C2-C10 alkyl carboxyl group, or a C4-C10 cycloalkyl carboxyl group, and n is 2-1000. A resist layer is formed over the protective layer, and the resist layer is patterned.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jing Hong Huang, Wei-Han Lai, Ching-Yu Chang
  • Patent number: 11955397
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 9, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
  • Publication number: 20240113154
    Abstract: A semiconductor device may include a compound substrate and a 3-dimensional inductor structure. The compound substrate may include a front surface and a back surface. The 3-dimensional inductor structure may include a front conductive stack, a back conductive layer, and at least one through-hole structure. At least one portion of the front conductive stack may include a first conductive layer disposed on the front surface of the compound substrate, and a second conductive layer disposed on the first conductive layer. The second conductive layer has a thickness ranging between 30 micrometers and 400 micrometers. The back conductive layer is disposed on the back surface of the compound substrate. The at least one through-hole structure penetrates through the compound substrate, and electrically connects the front conductive stack to the back conductive layer.
    Type: Application
    Filed: November 20, 2022
    Publication date: April 4, 2024
    Applicant: RichWave Technology Corp.
    Inventors: Chia-Wei Chang, Yan-Han Huang, Chin-Chia Chang
  • Publication number: 20240114693
    Abstract: In one embodiment, an apparatus includes a first metal layer, a second metal layer above the first metal layer, a first metal via generally perpendicular with and connected to the first metal layer, a second metal via generally perpendicular with and connected to the second metal layer, a third metal via generally perpendicular with and extending through the first metal layer and the second metal layer, a ferroelectric material between the third metal via and the first metal layer and between the third metal via and the second metal layer, and a hard mask material around a portion of the first metal via above the first metal layer and the second metal layer, around a portion of the second metal via above the first metal layer and the second metal layer, and around a portion of the ferroelectric material above the first metal layer and the second metal layer.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Christopher M. Neumann, Brian Doyle, Nazila Haratipour, Shriram Shivaraman, Sou-Chi Chang, Uygar E. Avci, Eungnak Han, Manish Chandhok, Nafees Aminul Kabir, Gurpreet Singh
  • Patent number: 11946300
    Abstract: A lever-operated latch device includes an assembly of a case body, an actuation body mounted on the case body, a linking member and a slide body. The actuation body has a free end and a pivoted end pivotally connected with the case body in cooperation with elastic members. The free end of the actuation body is formed with two protruding arms and an opening section positioned between the protruding arms. An operation section is disposed in the opening section. The linking member has a first end pivotally connected with the free end of the actuation body (or the operation section) and a second end connected with the slide body. When an operator presses the operation section, the actuation body is permitted to move from a closed position to an opened position so as to drive the linking member and the slide body to move.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: April 2, 2024
    Assignee: Fositek Corporation
    Inventors: An Szu Hsu, Chun Han Lin, Che Wei Chang
  • Patent number: 11948835
    Abstract: A device comprises a first metal structure, a dielectric structure, a dielectric residue, and a second metal structure. The dielectric structure is over the first metal structure. The dielectric structure has a stepped sidewall structure. The stepped sidewall structure comprises a lower sidewall and an upper sidewall laterally set back from the lower sidewall. The dielectric residue is embedded in a recessed region in the lower sidewall of the stepped sidewall structure of the dielectric structure. The second metal structure extends through the dielectric structure to the first metal structure.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Che-Cheng Chang, Chih-Han Lin
  • Patent number: 11947315
    Abstract: A holographic projection system includes a SLM that receives a light beam and generates a modulated beam projected at an eyebox, where: the modulated beam includes multiple versions of a test image; and the test image includes bright objects and transparent regions, which are selected dark areas of interest for measuring luminance. A control module runs a test to characterize contrast in each of multiple virtual image planes including: controlling the SLM to generate the modulated beam; measuring luminance levels of each of the versions of the test image displayed in the virtual image planes; calculating contrast ratios based on the luminance levels of each of the versions of the test image; determining whether the contrast ratios are within predetermined ranges of predetermined contrast ratios; and adjusting operation of the SLM in response to one of the contrast ratios not being within a corresponding one of the predetermined ranges.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: April 2, 2024
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Thomas A. Seder, Kai-Han Chang
  • Publication number: 20240107002
    Abstract: A method for coding image information includes generating prediction information by predicting information on a current coding unit, and determining whether the information on the current coding unit is the same as the prediction information. When the information on the current coding unit is the same as the prediction information, a flag indicating that the information on the current coding unit is the same as the prediction information is coded and transmitted. When the information on the current coding unit is not the same as the prediction information, a flag indicating that the information on the current coding unit is not the same as the prediction information and the information on the current coding unit are coded and transmitted.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Applicants: Electronics and Telecommunications Research Institute, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Se Yoon JEONG, Hui Yong KIM, Sung Chang LIM, Jin Ho LEE, Ha Hyun LEE, Jong Ho KIM, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN, Gwang Hoon PARK, Kyung Yong KIM, Tae Ryong KIM, Han Soo LEE
  • Patent number: 11938272
    Abstract: The present invention discloses a respiratory mask to connect a user and a breathing tube for receiving a first gas and releasing a second gas, so as to provide an user's respiratory system to exchange gas. It comprises a main part, an air chamber exchange part, an insert and a clamping part. The main part provides a first, second, and third openings that are communicated each other. The first opening connects to the breathing tube to receive the first gas from the breathing tube. The air chamber exchange part provides an exhaust assembly to relieve pressure according to an internal air pressure of the air chamber exchange part. The insert connects to the user's nose so as to direct the first gas to the user or direct the second gas from the user to the air chamber exchange part. The clamping part connects to the user's mouth.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: March 26, 2024
    Assignee: MACKAY MEMORIAL HOSPITAL
    Inventors: Wen-Han Chang, Shih-Yi Lee, Ren-Jei Chung, Ching-Yu Kuo
  • Patent number: 11938821
    Abstract: A method and a system for user interaction with a hologram includes displaying the hologram inside a passenger compartment of the vehicle, after displaying the hologram inside the passenger compartment of the vehicle, monitoring a vehicle user inside the passenger compartment of the vehicle to determine whether the vehicle user provided a user command, determining that the vehicle user provided the user command, and in response to determining that the vehicle user provided the user command, manipulating the hologram in accordance with the user command.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: March 26, 2024
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Joseph F. Szczerba, Kai-Han Chang, Manoj Sharma, Thomas A. Seder
  • Publication number: 20240096623
    Abstract: A method of manufacturing a semiconductor device includes forming a first layer comprising an organic material over a substrate. A second layer is formed over the first layer, wherein the second layer includes a silicon-containing material and one or more selected from the group consisting of a photoacid generator, an actinic radiation absorbing additive including an iodine substituent, and a silicon-containing monomer having iodine or phenol group substituents. A photosensitive layer is formed over the second layer, and the photosensitive layer is patterned.
    Type: Application
    Filed: March 17, 2023
    Publication date: March 21, 2024
    Inventors: Chieh-Hsin HSIEH, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Publication number: 20240093024
    Abstract: A polymer is formed by capping a copolymer-graft-polylactone with an alcohol, wherein the copolymer is copolymerized from an anhydride monomer with a double bond, a monomer with a double bond, and an initiator. The polymer can be mixed with an organic solvent and pigment powder to form a dispersion. The dispersion can be mixed with a binder to form a paint.
    Type: Application
    Filed: November 23, 2022
    Publication date: March 21, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cha-Wen CHANG, Jen-Yu CHEN, Wan-Jung TENG, Wen-Pin CHUANG, Ruo-Han YU
  • Publication number: 20240099154
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Publication number: 20240096893
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Ming-Ching Chang, Wei-Liang Lu, Kuei-Yu Kao