Abstract: A method for fabricating a semiconductor device includes following steps: A patterned mask layer including a plurality of standing walls and a covering part is formed on a surface of a semiconductor substrate, wherein two adjacent standing walls define a first opening exposing a part of the surface, and the covering part blankets the surface. A first patterned photoresist layer is formed to partially cover the covering part. A first etching process is performed to form a first trench in the substrate, passing through the surface and aligning with the first opening. A portion of the patterned mask layer is removed to form a second opening exposing another portion of the surface. A second etching process is performed to form a second trench in the substrate and define an active area on the surface. The depth of the first trench is greater than that of the second trench.

Abstract: A semiconductor structure is provided. The semiconductor structure includes an interconnection structure, a first conductive pad, a second conductive pad, a conductive material and a conductive coil. The first and second conductive pads are disposed over and electrically connected to the interconnection structure individually. The conductive material is electrically isolated from the interconnection structure, wherein bottom surfaces of the conductive material, the first conductive pad and the second conductive pad are substantially aligned. The conductive coil is disposed in the interconnection structure and overlapped by the conductive material. A manufacturing method of a semiconductor structure is also provided.

Abstract: Methods, computer program products, and systems are presented. The method computer program products, and systems can include, for instance: establishing a relationship graph for a certain user, the relationship graph having a primary node that specifies the certain user and a plurality of lower order nodes, wherein the primary node and at least one lower order node of the plurality of lower order nodes is connected to at least one other node by an edge so that there are defined a plurality of edges; generating a prioritized list of individuals to provide assistance to the certain user in respect to the certain task based on populated edge weight scores for edges of the relationship graph; and providing one or more output based on the prioritized list.

Abstract: A semiconductor structure and a method are provided. The method includes patterning a substrate to form a first fin structure in a first region and a second fin structure in a second region, wherein a first width of the first fin structure is greater than a second width of the second fin structure; forming a protecting layer on the second fin structure; and forming a first oxide layer over the first fin structure and forming a second oxide layer over the protecting layer, wherein a width of the first oxide layer is greater than a width of the second oxide layer.

Abstract: The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, the flash memory module includes a plurality of planes, and each plane includes a plurality of blocks; and the control method includes the steps of: after the flash memory controller is powered on, reading a first code bank from a specific block of the plurality of blocks; storing the first code bank into a buffer memory; executing the first code bank to manage the flash memory module; when the flash memory controller starts a code bank swapping operation, trying to read a second code bank from a super block; if the second code bank is read successfully, storing the second code bank into the buffer memory to replace the first code bank; and executing the second code bank to manage the flash memory module.

Abstract: A method of a flash memory controller includes: providing an input/output (I/O) circuit coupled to a flash memory device through a specific communication interface; and, controlling a processor sending a specific read command or a data toggle command through the I/O circuit and the specific communication interface into the flash memory device, to make the flash memory device perform a data toggle operation to control the flash memory device’s data register selecting and transferring a first data unit and a second data unit to the flash memory device’s I/O control circuit to make the I/O control circuit sequentially transmit the first data unit and the second data unit to the flash memory controller through the specific communication interface in response to the specific read command or the data toggle command.

Abstract: A method of manufacturing a semiconductor structure is provided. A conductive layer is formed on a precursor memory structure. A target layer is formed on the conductive layer. A first photoresist with a first opening is formed on the target layer. A spacer is formed on sidewalls of the first opening. A second photoresist with a second opening is formed on the target layer and the spacer. The target layer is patterned by the second photoresist and the spacer to form a first patterned target layer. A third photoresist with a third opening is formed on the first patterned target layer. The first patterned target layer is patterned by the third photoresist to form a second patterned target layer. The conductive layer is patterned by the second patterned target layer to form a patterned conductive layer including a ring structure aligned with a source/drain region.

Abstract: A flash memory scheme simplifies the command sequences transmitted between a flash memory device and a flash memory controller into a simplified command sequence so as to reduce the waiting time period of the command transmission and improve the performance of flash memory.

Abstract: A transformer-transducer model for unifying streaming and non-streaming speech recognition includes an audio encoder, a label encoder, and a joint network. The audio encoder receives a sequence of acoustic frames, and generates, at each of a plurality of time steps, a higher order feature representation for a corresponding acoustic frame. The label encoder receives a sequence of non-blank symbols output by a final softmax layer, and generates, at each of the plurality of time steps, a dense representation. The joint network receives the higher order feature representation and the dense representation at each of the plurality of time steps, and generates a probability distribution over possible speech recognition hypothesis. The audio encoder of the model further includes a neural network having an initial stack of transformer layers trained with zero look ahead audio context, and a final stack of transformer layers trained with a variable look ahead audio context.

Abstract: A flash memory scheme simplifies the command sequences transmitted between a flash memory device and a flash memory controller into a simplified command sequence so as to reduce the waiting time period of the command transmission and improve the performance of flash memory.

Abstract: A flash memory device is disclosed. The memory cell array has a first plane and a second plane and stores a first data unit and a second data unit. The data register buffers the first data unit and the second data unit transmitted from the memory cell array when a read command or a data toggle command is received and stored by the command register. The control circuit performs a data toggle operation to control the data register selecting and transferring the first data unit and the second data unit to the I/O control circuit to make the I/O control circuit sequentially transmit the first data unit and the second data unit to the flash memory controller through a specific communication interface in response to the read command or the data toggle command. The transmission of the first data unit is followed by the transmission of the second data unit.

Abstract: A method of a flash memory controller includes: providing an input/output (I/O) circuit coupled to the flash memory device; and sending a data toggle set-feature signal to the flash memory device to enable, disable, or configure a data toggle operation of the flash memory device; the data toggle operation of the flash memory device is arranged to make the flash memory device control the flash memory device's data register selecting and transferring a first data unit and a second data unit to the flash memory device's I/O control circuit to make the I/O control circuit sequentially transmit the first data unit and the second data unit to the flash memory controller through the specific communication interface in response to a specific read command or a data toggle command transmitted by the flash memory controller.

Abstract: A flash memory scheme simplifies the command sequences transmitted between a flash memory device and a flash memory controller into a simplified command sequence so as to reduce the waiting time period of the command transmission and improve the performance of flash memory.

Abstract: A method for preparing a semiconductor device structure includes forming a target layer over a semiconductor substrate, and forming a plurality of first mask patterns over the target layer. The method also includes forming a plurality of energy removable spacers on opposite sidewalls of each of the first mask patterns, and forming a second mask pattern over the target layer and between the energy removable spacers. The method further includes removing the energy removable spacers, and etching the target layer using the first mask patterns and the second mask pattern as a mask.

Abstract: A semiconductor device includes a first source/drain region and a second source/drain region disposed in a semiconductor substrate. The semiconductor device also includes a word line structure disposed in the semiconductor substrate and between the first source/drain region and the second source/drain region. The word line structure includes a composite gate dielectric, and a lower electrode layer disposed over the composite gate dielectric. The word line structure also includes an upper electrode layer disposed over the lower electrode layer, and a graphene layer disposed between the lower electrode layer and the upper electrode layer. The composite gate dielectric includes a gate dielectric layer and a protection liner.

Abstract: The present disclosure is related to a system for monitoring microcirculation is provided. The system may include a detector, the detector being inserted under a tongue of a user along a sagittal axis direction of the user; a light source, the light source being disposed on a surface of the detector in contact with a bottom surface of the tongue of the user and being configured to emit a light source signal to a target region under the tongue; and a lens set, the lens set being disposed within the detector for receiving a detection signal from the target region, wherein the detection signal is emitted into the detector along a vertical axis direction of the user and emitted out from the detector along the sagittal axis direction of the user.

Abstract: A rectifying arrangement for an LED driver comprising a rectifying circuit and a clamping arrangement provides a low-impedance path between input terminals of the rectifying circuit in response to an abnormal operation of the rectifying arrangement, such as an open circuit of one rectifying branch of the rectifying arrangement. The low-impedance path is maintained for a plurality of cycles of an AC power supply provided to the rectifying circuit, and can be maintained on a (semi-)permanent basis.

Abstract: A semiconductor device includes a first interlayer dielectric (ILD) layer disposed over a substrate, a control layer disposed over the first ILD layer and containing silicon and oxygen, and a resistor wire disposed over the control layer. An oxygen concentration of the control layer is greater than an oxygen concentration of the first ILD layer.

Abstract: A peer-to-peer decentralized software configuration manager is described. The peer-to-peer system provides a crowdsourced mechanism to determine and recommend the efficient software configurations. A computer system may subscribe to a ring or group of network connected computers. Once subscribed, the computer system receives a ring data structure that may include one or more software configuration entries. The ring data structure is accessible to each subscribed computer system to the currently installed software configurations and document the relative success or failure of those configurations. The ring data structure may be utilized to identify a more efficient or user friendly software configuration that is currently installed and utilized by a subscribed computer system.