Abstract: A transistor device may include a semiconductor body, a plurality of cell regions each comprising a plurality of transistor cells that are at least partially integrated in the semiconductor body and that each comprise a respective gate electrode, a plurality of routing channels each arranged between two or more of the cell regions, a gate pad arranged above a first surface of the semiconductor body, and a plurality of gate runners each coupled to the gate pad and each arranged in one of the plurality of routing channels. Each of the plurality of gate runners may be associated with one of the plurality of cell regions such that the gate electrodes in each of the plurality of cell regions are connected to an associated gate runner, and each of the plurality of routing channels comprises two or more gate runners that are routed in parallel and spaced apart.

Abstract: A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.

Abstract: A transistor device may include a semiconductor body, a plurality of cell regions each comprising a plurality of transistor cells that are at least partially integrated in the semiconductor body and that each comprise a respective gate electrode, a plurality of routing channels each arranged between two or more of the cell regions, a gate pad arranged above a first surface of the semiconductor body, and a plurality of gate runners each coupled to the gate pad and each arranged in one of the plurality of routing channels. Each of the plurality of gate runners may be associated with one of the plurality of cell regions such that the gate electrodes in each of the plurality of cell regions are connected to an associated gate runner, and each of the plurality of routing channels comprises two or more gate runners that are routed in parallel and spaced apart.

Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted. At least one embodiment provides a semiconductor substrate comprising a photo-conversion region to convert light into photo-generated charge carriers; a region to accumulate the photo-generated charge carriers; a control electrode structure including a plurality of control electrodes to generate a potential distribution such that the photo-generated carriers are guided towards the region to accumulate the photo-generated charge carriers based on signals applied to the control electrode structure; a non-uniform doping profile in the semiconductor substrate to generate an electric field with vertical field vector components in at least a part of the photo-conversion region.

Abstract: A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.

Abstract: A membrane structure is provided. The membrane structure may include: a membrane; at least one hole extending into the membrane configured to receive a fluid. The membrane may include a plurality of electrodes arranged to provide one or more electric fields to control a movement of the fluid within the at least one hole.

Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted. At least one embodiment provides a semiconductor substrate comprising a photo-conversion region to convert light into photo-generated charge carriers; a region to accumulate the photo-generated charge carriers; a control electrode structure including a plurality of control electrodes to generate a potential distribution such that the photo-generated carriers are guided towards the region to accumulate the photo-generated charge carriers based on signals applied to the control electrode structure; a non-uniform doping profile in the semiconductor substrate to generate an electric field with vertical field vector components in at least a part of the photo-conversion region.

Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted.

Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted. At least one embodiment provides a semiconductor substrate comprising a photo-conversion region to convert light into photo-generated charge carriers; a region to accumulate the photo-generated charge carriers; a control electrode structure including a plurality of control electrodes to generate a potential distribution such that the photo-generated carriers are guided towards the region to accumulate the photo-generated charge carriers based on signals applied to the control electrode structure; a non-uniform doping profile in the semiconductor substrate to generate an electric field with vertical field vector components in at least a part of the photo-conversion region.

Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted.

Abstract: In accordance with an embodiment of the present invention, a semiconductor device includes a first metal line in a first insulating layer, and a via having a portion surrounding a portion of a first sidewall of the first metal line.

Abstract: In accordance with an embodiment of the present invention, a semiconductor device includes a first metal line in a first insulating layer, and a via having a portion surrounding a portion of a first sidewall of the first metal line.

Abstract: In accordance with an embodiment of the present invention, a semiconductor device includes a first metal line disposed in a first insulating layer, and a via having a portion surrounding a portion of a first sidewall of the first metal line.

Abstract: A method provides a layout defining a structure to be patterned onto a substrate. The structure is registered with a predefined grid of the layout. The method includes locally stretching the grid in a first portion of a layout causing a problematic spot on the substrate.

Abstract: In accordance with an embodiment of the present invention, a semiconductor device includes a first metal line disposed in a first insulating layer, and a via having a portion surrounding a portion of a first sidewall of the first metal line.

Abstract: A membrane structure is provided. The membrane structure may include: a membrane; at least one hole extending into the membrane configured to receive a fluid. The membrane may include a plurality of electrodes arranged to provide one or more electric fields to control a movement of the fluid within the at least one hole.

Abstract: A method provides a layout defining a structure to be patterned onto a substrate. The structure is registered with a predefined grid of the layout. The method includes locally stretching the grid in a first portion of a layout causing a problematic spot on the substrate.

Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted.

Abstract: A method provides a layout defining a structure to be patterned onto a substrate. The structure is registered with a predefined grid of the layout. The method includes locally stretching the grid in a first portion of a layout causing a problematic spot on the substrate.

Abstract: A method for simplifying metal shapes in an integrated circuit including receiving an incoming wire layout for at least one metal layer of an integrated circuit, the incoming wire layout for the at least one layer including a plurality of wires running in a preferred direction and a plurality of vias connected thereto.