Abstract: A programmable system includes a programmable analog system that is reconfigurable to perform various analog operations, and includes a programmable digital system that is reconfigurable to perform various digital operations. The programmable system also includes a microcontroller capable of reconfiguring and controlling the programmable analog system and the programmable digital system. The programmable digital system is configured to control the programmable analog system autonomously of the microcontroller.

Abstract: Embodiments of the invention relate to a method and apparatus to reduce power consumption in a passive matrix LCD driver circuit by using a plurality of drive buffers and active power management of sub-blocks in the passive matrix LCD drive circuit. Each drive buffer may operate in a first phase, which may include a high-drive mode to drive an LCD voltage to a threshold voltage level and a low-drive mode to modify the LCD voltage to approximate an input voltage of the drive buffer, and to maintain a constant LCD voltage level. The low-drive buffer consumes less current than the high-drive buffer, thus reducing power consumption. The drive buffer may also operate in a second phase, also a no-drive mode, in which the drive buffer and the bias voltage generator may be completely turned off, to further reduce power consumption. The drive buffer may be used to drive capacitive loads, as well as partially-resistive loads and inductive loads.

Abstract: A first portion of a programmable switched capacitor block includes a first plurality of switched capacitors and a second portion of the programmable switched capacitor block includes a second plurality of switched capacitors. A first switch associated with the first plurality of switched capacitors as well as a second switch associated with the second plurality of switched capacitors may be configured based on a type of analog function that is to be provided.

Abstract: A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions.

Abstract: A configurable bus includes a plurality of bus segments. The configurable bus also includes two or more pluralities of input/output (I/O) ports. Each bus segment is coupled to at least one of the pluralities of I/O ports. Also coupled to the bus segments is a cross-couple unit that is configurable to selectively couple any of the bus segments together.

Abstract: A processing system measures an input voltage received at an input of an analog circuit, such as an analog-to-digital converter (ADC), where the input voltage is measured by comparing the input voltage to a reference voltage. The reference voltage is determined by the difference between a first voltage and a ground voltage. The processing system includes a programmable reference signal selection circuit to maintain the reference voltage at a constant level.

Abstract: Buffer circuit embodiments are described. A buffer circuit includes an input configured to receive an input signal and a buffer configured to generate an output signal based on the input signal. In one embodiment, the buffer circuit includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based on the selected configuration. In another embodiment, the buffer circuit further includes a programmable output filter coupled with the buffer, wherein the programmable output filter is programmable with a selected configuration form a plurality of configurations, and wherein the programmable output filter filters a frequency band of the output signal based on the selected configuration.

Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of IO pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the IO pads to each other.

Abstract: Apparatuses and methods of signal-flow aware supply routing are described. A programmable routing system is configured to route supply signals from a supply generator circuit to one or more functional blocks based on signal channels of the functional blocks.

Abstract: An integrated circuit device can include a plurality of analog circuit blocks, each comprising an input section configured to receive an analog input signal, and an output section configured to drive a plurality of output signals corresponding to the input signal, each output signal having a different maximum drive strength; and a signal network comprising a plurality of switches, and providing a configurable connection between at least outputs of the analog circuit blocks and a plurality of N connections to the integrated circuit device, including less than N direct signal paths between each analog circuit block and the N connections.

Abstract: A liquid crystal display (LCD) driving system includes a reference voltage generator to generate a plurality of reference voltages. The LCD driving system also includes a plurality of drive buffers to generate drive voltages according to at least one of the reference voltages, and to drive at least a portion of a liquid crystal display to present data according to the drive voltages.

Abstract: Apparatuses and methods of configuring a programmable analog routing system to make connections between analog functional blocks of an integrated circuit are described. A programmable analog routing system includes a first set of wires and switch sets of programmable connections coupled to a second set of wires. The programmable connections are configured to make at least one of a direct connection between two of the analog functional blocks using the second set of wires or a connection between one of the second set of wires and one of the first set of wires.

Abstract: A system for the calibration of a programmable system-on-a-chip is described. More specifically, embodiments of the present invention relate to a system that calibrates a programmable analog block in a system-on-a-chip without the use of external components.

Abstract: A programmable system includes an input/output (I/O) pin that is configurable into multiple operational states. The programmable system further includes a memory device to store configuration data that, when provided to the I/O pin, causes the I/O pin to reconfigure into one of the operational states. When power is supplied to the system, the memory device is configured to provide the configuration data to the I/O pin prior to a system microcontroller becoming operational responsive to the power.

Abstract: Apparatuses and methods of signal-flow aware supply routing are described. A programmable routing system is configured to route supply signals from a supply generator circuit to one or more functional blocks based on signal channels of the functional blocks.

Abstract: A system and apparatus are described for providing greater flexibility and performance in a mixed-signal array through improved and highly configurable routing, control elements and signal processing capabilities.

Abstract: A method and a system for supplying power to a microcontroller with a single cell. One embodiment of the present invention discloses incorporation of a power supply pump circuit with the microcontroller and their dynamic interaction. The microcontroller sends its power requirements to the power supply pump circuit and in response, the power supply pump circuit controls the operating voltage with optimal efficiency. The dynamic update of power supply pump circuit results in an efficient use of the power supply pump circuit and thus results in a reduction of the number of dry cell batteries to only a single cell. Incorporation of the microcontroller and power supply pump circuit onto a single chip reduces the pin number requirements as well as the space required on the printed circuit board.

Abstract: A system includes a voltage pump to generate a first pump voltage from an analog voltage signal. The system further includes switching pad to receive an analog signal from an external source and route the analog signal to analog processing circuitry over one or more analog signal busses based on the first pump voltage and the analog voltage signal.

Abstract: In one example, a chip includes an integrated analog component configured to communicate over an internal analog bus of the chip. A plurality of I/O pads located on the chip is configured to provide a connected device access to the integrated analog component. A plurality of transmission gates configured to selectively connect the I/O pads to a bus line of the analog bus.

Abstract: A configurable switched capacitor block includes a switched-capacitor (SC) sampling circuit, a fully differential amplifier, an SC feedback circuit, and a comparator. The SC sampling circuit is coupled to receive an input signal and to selectively generate a sampled signal to a differential input of the amplifier. The SC feedback circuit is coupled between the differential inputs and the differential outputs of the amplifier to selectively control a feedback of the amplifier. The comparator is coupled to the differential outputs of the amplifier to generate an output signal. The configurable switched capacitor block has multiple modes of operation which are selectable by programming the SC sampling circuit and the SC feedback circuit.