Abstract: An integrated circuit device can include a plurality of analog blocks, at least a first analog block comprising a data converter circuit, each analog block including a programmable switch path coupled to a plurality of external connections to the integrated circuit device; and a plurality of programmable digital blocks, at least one programmable digital block configurable to control the programmable switch paths to couple external connections to the data converter circuit via an analog block other than the first analog block.

Abstract: A system includes power saving circuitry to revive a system controller from a sleep mode for performance of operations in an active mode. The system also includes a regulator including a floating gate reference device to generate output voltage and current capable of powering the power saving circuitry during the sleep mode. A method includes generating a reference voltage and current with a float gate device, and powering wake-up circuitry with the reference voltage and current while in a power saving mode. The wake-up circuitry is configured to activate a main system controller from the power saving mode.

Abstract: A variable reference voltage circuit for performing memory operation on non-volatile memory includes a multi-level voltage source and a selector circuit. The multi-level voltage source generates multiple voltages. The selector circuit includes a selector input and a selector output. The selector input is coupled to the multi-level voltage source to selectively couple any of the multiple voltages to the selector output. The selector output of the selector circuit is coupled to a non-volatile memory array to provide the NV memory array with a selectable program voltage for programming the NV memory array and a selectable erase voltage for erasing the NV memory array.

Abstract: A system and method are provided for operating first and second components in first and second domains. In one embodiment, the method includes: generating a plurality of clock signals shifted relative to one another; operating a first component in a first domain using a first one of the plurality of clock signals; operating a second component in a second domain using a second one of the plurality of clock signals selected using a selection component; and comparing a present output of the second component to a stored value, determining whether a variation between the present output and the stored value is greater than a threshold, and, if the variation is greater than the threshold, using a controller to cause the selection component to select a third clock signal from the plurality of clock signals that is shifted relative to the second clock signal to drive the second component.

Abstract: A programmable device includes an operational amplifier and circuitry. The operational amplifier is configured to generate an output voltage based on input voltages at input terminals thereof. The circuitry is configured to provide the input voltages to the operational amplifier. The configuration of the circuitry allows the programmable device to implement discrete-time or continuous-time functions. The circuitry includes a resistor network and a capacitor network configured to be selectively coupled to the operational amplifier.

Abstract: A programmable processing device having a control system and a programmable reference block. The control system sends digital control signals to the programmable reference block, which in turn generates analog variable signals used as reference signals for the programming of the one or more reconfigurable data converters.

Abstract: A system comprises a temperature sensor generate multiple base-emitter voltage signals by sequentially providing various currents to a transistor, and a system controller to determine a differential voltage signal according to the multiple base-emitter voltage signals, the differential voltage signal proportional to an environmental temperature associated with the transistor.

Abstract: A configurable switched capacitor block includes a switched-capacitor (SC) sampling circuit, a fully differential amplifier, an SC feedback circuit, and a comparator. The SC sampling circuit is coupled to receive an input signal and to selectively generate a sampled signal to a differential input of the amplifier. The SC feedback circuit is coupled between the differential inputs and the differential outputs of the amplifier to selectively control a feedback of the amplifier. The comparator is coupled to the differential outputs of the amplifier to generate an output signal. The configurable switched capacitor block has multiple modes of operation which are selectable by programming the SC sampling circuit and the SC feedback circuit.

Abstract: In one example, a chip includes integrated components configured to operate in the digital domain and the analog domain. An I/O pad located on the chip is configured to provide an external device access to the integrated components. A multifunction I/O interface cell between the I/O pad and the integrated components is configured to selectively connect different combinations of the components to the same I/O pad at different times. The multifunction I/O interface cell may include a first switching device connected to ground, a second switching device connected to a reference voltage, an analog input/output buffer, and a digital input/output buffer.

Abstract: A system includes a voltage pump to generate a first pump voltage from an analog voltage signal. The system further includes switching pad to receive an analog signal from an external source and route the analog signal to analog processing circuitry over one or more analog signal busses based on the first pump voltage and the analog voltage signal.

Abstract: A system includes a bandgap temperature sensor to generate multiple base-emitter voltages. The system also include a controller to detect the base-emitter voltages generated by the bandgap temperature sensor and to generate a bandgap reference voltage according to the multiple base-emitter voltage signals, the bandgap reference voltage having a voltage level that remains substantially constant relative to environmental temperature variations.

Abstract: A system for the calibration of a programmable system-on-a-chip is described. More specifically, embodiments of the present invention relate to a system that calibrates a programmable analog block in a system-on-a-chip without the use of external components.

Abstract: A programmable system includes a programmable analog device including an operational amplifier to generate an output voltage based on input voltages at terminals of the operational amplifier. The programmable system also includes a system controller to direct the programmable analog device to reconfigure analog circuitry providing the input voltages to the operational amplifier. The reconfiguration of the analog circuitry allows the programmable analog device to implement discrete-time or continuous-time functions.

Abstract: A system includes a controllable voltage generator to generate a power supply voltage. The system also includes a system controller to determine a voltage level associated with the power supply voltage, and prompt the controllable voltage generator to generate the power supply voltage. The system includes a floating gate reference device to generate an absolute voltage reference based, at least in part, on the voltage level associated with the power supply voltage. The system can also include analog circuitry to perform one or more electrical operations responsive to the absolute voltage reference from the floating gate reference device.

Abstract: A system comprises a temperature sensor generate multiple base-emitter voltage signals by sequentially providing various currents to a transistor, and a system controller to determine a differential voltage signal according to the multiple base-emitter voltage signals, the differential voltage signal proportional to an environmental temperature associated with the transistor.

Abstract: A buffer circuit includes an input configured to receive an input signal; and a buffer configured to generate an output signal based on the input signal. In an embodiment, the output signal has a linear relationship with the input signal when the input signal is within the input voltage range; and the buffer circuit further includes a level-shifting circuit coupled with the input, wherein the level shifting circuit determines an input voltage range, and wherein one of an upper limit and a lower limit of the input voltage range is within 50 millivolts from a supply rail voltage. In another embodiment, the buffer circuit further includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based on the selected configuration.

Abstract: A system includes an analog-to-digital modulator to convert at least one analog input signal into at least one digital output signal. The system also includes a processing device to set an operational order and a quantization level of the analog-to-digital modulator. The analog-to-digital modulator converts the analog input signal into the digital output signal according to the operational order and the quantization level.

Abstract: A configurable switched capacitor block includes a switched-capacitor (SC) sampling circuit, a fully differential amplifier, an SC feedback circuit, and a comparator. The SC sampling circuit is coupled to receive an input signal and to selectively generate a sampled signal to a differential input of the amplifier. The SC feedback circuit is coupled between the differential inputs and the differential outputs of the amplifier to selectively control a feedback of the amplifier. The comparator is coupled to the differential outputs of the amplifier to generate an output signal. The configurable switched capacitor block has multiple modes of operation which are selectable by programming the SC sampling circuit and the SC feedback circuit.

Abstract: A configurable switched capacitor block includes a switched-capacitor (SC) sampling circuit, a fully differential amplifier, an SC feedback circuit, and a comparator. The SC sampling circuit is coupled to receive an input signal and to selectively generate a sampled signal to a differential input of the amplifier. The SC feedback circuit is coupled between the differential inputs and the differential outputs of the amplifier to selectively control a feedback of the amplifier. The comparator is coupled to the differential outputs of the amplifier to generate an output signal. The configurable switched capacitor block has multiple modes of operation which are selectable by programming the SC sampling circuit and the SC feedback circuit.

Abstract: A variable reference voltage circuit for performing memory operation on non-volatile memory includes a multi-level voltage source and a selector circuit. The multi-level voltage source generates multiple voltages. The selector circuit includes a selector input and a selector output. The selector input is coupled to the multi-level voltage source to selectively couple any of the multiple voltages to the selector output. The selector output of the selector circuit is coupled to a non-volatile memory array to provide the NV memory array with a selectable program voltage for programming the NV memory array and a selectable erase voltage for erasing the NV memory array.