Abstract: The present invention employs a mixture of digital signal processing and analog circuitry to reduce spurious noise in continuous time delta sigma analog-to-digital converters (CT??ADCs). Specifically, a small amount of random additive noise, also referred to as dither, is introduced into the CT??ADC to improve linear behavior by randomizing and de-correlating the quantization noise from the input signal without significantly degrading the SNR performance. In each of the embodiments, digital circuitry is used to generate the desired randomness, de-correlation, and spectral shape of the dither and simple analog circuit blocks are used to appropriately scale and inject the dither into the CT??ADC loop. In one embodiment of the invention, random noise is added to the quantizer input.

Abstract: The present invention provides an efficient method for near-unity sampling rate alteration in high performance applications, such as CD to DAT conversion. Specifically, the input digital signal is first interpolated by a factor of eight and lowpass filtered to form an intermediate signal. A clamped cubic spline interpolator (CCSI) algorithm is then employed to accurately interpolate the intermediate signal to points in-between adjacent samples of the intermediate signal as required by the 48 kHz output sampling rate. The CCSI is highly accurate due to highly accurate derivative estimates arrived at by repeated Richardson extrapolation. In the example CD to DAT converter covered in detail, fourth order Richardson extrapolation is employed. It is shown by this example that the proposed method yields the desired performance, is computationally efficient and requires little storage.

Abstract: A radio includes a self-calibrating transmitter that uses a portion of a receiver section to perform self-calibration. Accordingly, the radio includes a transmitter section, mixer, analog receiver section, calibration switch module, digital receiver section, calibration determination module, and calibration execution module. The transmitter section produces a modulated RF signal from base-band signal and a transmitter local oscillation. The mixer mixes the modulated RF signal with the transmitter local oscillation to produce a base-band representation of the modulated RF signal. In calibration mode, the calibration switch module provides the base-band representation to the receiver section, which processes the representation to produce a 2nd base-band digital signal. The calibration determination module interprets frequency components of the 2nd base-band digital signal to produce a calibration signal that compensates for imbalances within the transmitter.

Abstract: A delta-sigma modulator has a first node at which is produced a difference signal equal to the difference in magnitude between a continuous time analog signal and an analog feedback signal generated from a digital output signal; an integrator, coupled to the first node, to integrate the difference signal, thereby producing a first integrated signal; a photonic sampler, coupled to the integrator, to sample the first integrated signal, thereby producing a sampled integral signal; a quantizer, coupled to the sampler, to quantize the sampled integral signal, thereby producing the digital output signal; wherein an output of the quantizer is coupled to the first node through a digital to analog converter.

Abstract: Digital calculation of an RSSI value begins by digitally calculating a magnitude of a signal (e.g., a received RF signal or representation thereof). The process then continues by filtering the magnitude of the signal to produce a filtered magnitude signal. The process then continues by determining a coarse RSSI value of the filtered magnitude signal, wherein the coarse RSSI value indicates a sliding window of RSSI values. Once the coarse RSSI value is obtained, the process continues by determining a fine RSSI value within the sliding window of RSSI values. The process concludes by summing the fine RSSI value with the coarse RSSI value to produce a digital RSSI value.

Abstract: A differential linear fractional N-synthesizer includes a phase and frequency detection module, a linearized charge pump, a low pass filter, a voltage controlled oscillator, and a fractional N divider feedback. The phase and frequency detection module is operably coupled to produce a differential charge-up signal, a differential charge-down signal, or a differential off signal based on phase and/or frequency differences between a reference oscillation and a feedback oscillation. The feedback oscillation is generated by the fractional N divider feedback, which divides an output oscillation by a divider value to produce the feedback oscillation. The linearized charge pump includes a 1st current source, a 2nd current source and a modulation module. In response to the differential off signal, the modulation module produces a modulated differential off signal that causes the 1st and 2nd current sources to produce a zero current signal in an alternating fashion.

Abstract: A direct conversion or VLIF receiver corrects DC offset by, prior to receiving a burst of data, the receiver determines a coarse DC offset with the antenna of the receiver switched off. The receiver then adjusts an analog portion of the receiver (e.g., the output of the mixers) based on the coarse DC offset. The receiver then determines a gain setting of the receiver (e.g., for the low noise amplifier and/or programmable gain amplifiers) with the antenna on. The receiver then sets the gain of at least one gain stage of the receiver based on the gain setting. The receiver then determines a fine DC offset with the antenna off. The receiver then, while receiving a burst of data, subtracts the fine DC offset from the digital baseband or low IF signal prior to data recovery.

Abstract: An FM radio receiver includes a low noise amplifier, down conversion mixing module, local oscillation module, bandpass filter, demodulation module, and a DC offset estimation module. The low noise amplifier, the down conversion mixing module, the bandpass filter, and the demodulation module are operably coupled to recapture data from a received a radio frequency (RF) signal. The local oscillation module is operably coupled to generate the local oscillation based on a reference oscillation and a DC offset correction signal. The DC offset estimation module is operably coupled to generate the DC offset correction signal based on a determined a DC offset. The DC offset estimation module determines the DC offset prior to compensation of the local oscillation, such as during a test sequence and/or during a preamble.

Abstract: A method and apparatus for trimming of a local oscillation within a radio frequency integrated circuit (RFIC) includes processing that begins when an RFIC receives a radio frequency (RF) signal having a known frequency. The processing then continues when the RFIC mixes the RF signal with a receiver local oscillation to produce a low intermediate frequency (IF) signal, which may have a carrier frequency of zero (i.e., a baseband signal) or up to a few mega Hertz). The processing then continues when the RFIC demodulates the low IF signal to produce demodulated data. The processing then continues as the RFIC determines a DC offset from the demodulated data, where the DC offset is reflective of the difference between the known frequency and the frequency of the receiver local oscillation. The processing then continues as the RFIC adjusts the receiver local oscillation to reduce the DC offset when the DC offset compares unfavorably with an allowable offset threshold.

Abstract: A radio receiver includes a low noise amplifier, intermediate frequency mixing stage, complex bandpass filter, a single analog to digital converter, a 1st digital mixing module, and a 2nd digital mixing module. The low noise amplifier is operably coupled to amplify a modulated radio frequency (RF) signal to produce an amplified modulated RF signal. The intermediate frequency mixing stage is operably coupled to mix the amplified modulated RF signal with a local oscillation to produce a modulated IF signal. The complex bandpass filter filters an I and Q component of the modulated IF signal to produce a filtered IF signal. The single analog to digital converter is operably coupled to convert the filtered IF signal into a digital IF signal. The 1st and 2nd mixing modules each receive the digital IF signal and mix the digital IF signal with an in-phase and quadrature digital local oscillation to produce a 1st baseband signal component and a 2nd baseband signal component.

Abstract: A radio includes a self-calibrating transmitter that uses a portion of a receiver section to perform self-calibration. Accordingly, the radio includes a transmitter section, mixer, analog receiver section, calibration switch module, digital receiver section, calibration determination module, and calibration execution module. The transmitter section produces a modulated RF signal from base-band signal and a transmitter local oscillation. The mixer mixes the modulated RF signal with the transmitter local oscillation to produce a base-band representation of the modulated RF signal. In calibration mode, the calibration switch module provides the base-band representation to the receiver section, which processes the representation to produce a 2nd base-band digital signal. The calibration determination module interprets frequency components of the 2nd base-band digital signal to produce a calibration signal that compensates for imbalances within the transmitter.

Abstract: A self-calibrating transmitter includes an up-conversion mixing module, summing module, calibration determination module, and a calibration execution module. The up-conversion mixing module is operably coupled to mix an I component of a base-band signal with an I component of a local oscillation to produce a mixed I signal and is also operably coupled to mix a Q component of the base-band signal with a Q component of the local oscillation to produce a mixed Q signal. The summing module sums the mixed I signal with the mixed Q signal to produce a modulated radio frequency (RF) signal. The calibration determination module is operably coupled to produce a calibration signal, which it generates by interpreting the local oscillation and the modulated RF signal. The calibration execution module is operably coupled to calibrate the DC level of the I and/or Q component of the base-band signal, and/or the gain of the I and/or Q component of the base-band signal based on the calibration signal.

Abstract: A delta-sigma modulator has a first node at which is produced a difference signal equal to the difference in magnitude between a continuous time analog signal and an analog feedback signal generated from a digital output signal; an integrator, coupled to the first node, to integrate the difference signal, thereby producing a first integrated signal; a photonic sampler, coupled to the integrator, to sample the first integrated signal, thereby producing a sampled integral signal; a quantizer, coupled to the sampler, to quantize the sampled integral signal, thereby producing the digital output signal; wherein an output of the quantizer is coupled to the first node through a digital to analog converter.

Abstract: A method and apparatus for digital-to-analog conversion utilizing randomized dynamic element matching for the attenuation of harmonic distortion during the conversion process due to non-ideal circuit behavior is presented. The present invention introduces a new DEM approach that results in a simplified DAC architecture relative to previous DACs, while preserving optimal spurious-free dynamic range (SFDR). The particular topology utilized involves the use of a bank of DAC-elements, preferably 1-bit DAC elements, the outputs of which are summed to yield a single multiple-level DAC. During each conversion cycle, random selection is used to determine the addresses of the DAC-elements used in order to “scramble” the DAC noise arising from each individual 1-bit DAC.

Abstract: An apparatus and method of improving linearity of a multi bit &Dgr;&Sgr; modulator in which the output of a multi-bit quantizer of a &Dgr;&Sgr; modulator is connected in a feedback loop to a converter where output is a higher frequency single bit data stream which is supplied to a 1-bit digital to analog converter whose output is fed back to the quantizer to provide linearity of the output of the &Dgr;&Sgr; modulator.

Abstract: Several delta-sigma modulator circuits and a single quantizer provide analog-to-digital conversion for multiple frequency bands. A wideband mode is provided by coupling an analog signal to be digitized directly to a quantizer. Narrowband modes are provided by switching the analog signal to be digitized into one of several delta-sigma modulator circuits. Noise shaping and filtering by the delta-sigma modulator circuits result in improved signal-to-noise-and-distortion performance and increased resolution. Performance is further enhanced by feeding back multiple bits output by the quantizer to the delta-sigma modulator circuits. The delta-sigma modulator circuits can be either continuous time or discrete time delta sigma modulators.