Patents by Inventor Hidekuni Yomo

Hidekuni Yomo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10222453
    Abstract: In a radar device mounted in a host vehicle, a radar transmitting unit transmits a radar signal; a light detection unit detects ON or OFF of a light of another vehicle in which the radar device is mounted; and a timing control unit sets a transmission timing of the radar signal and a light ON timing of a light of the host vehicle, the light ON timing is synchronized with the transmission timing on basis of detected ON or OFF of the light of the other vehicle. The set transmission timing is different from a transmission timing of a radar signal of the radar device mounted in the other vehicle.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: March 5, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Hidekuni Yomo, Hirohito Mukai, Tomohiro Yui, Yoshito Hirai
  • Publication number: 20180088221
    Abstract: A multi-radar system is configured such that radars A and B perform synchronization so that their transmission timings and frequency bands are substantially the same. For this reason, in a case where the radars A and B operate as bistatic radars, the radars A and B yield the same detection results from reflected waves from a place on a surface of a target T where the detection object regions of the radars A and B overlap. Therefore, the signal-to-noise ratio can be improved by synthesizing the target detection results obtained by the radars A and B operating as bistatic radars. This results in improved target detection performance.
    Type: Application
    Filed: August 21, 2017
    Publication date: March 29, 2018
    Inventors: HIDEKUNI YOMO, AKIHIKO MATSUOKA, KENTA IWASA
  • Publication number: 20180052230
    Abstract: A road information detector acquires road information by emitting a beam via a variable directivity transmission antenna to a road sign having plural flat portions and includes a transceiver that controls the antenna to scan the beam by switching an emission angle including an azimuth angle relative to the front direction of a vehicle and receives, as reflected wave signals, waves reflected by the flat portions, a distance and reflected wave intensity detector that detects a distance between the vehicle and each of the flat portions and a reflected wave intensity of each of the reflected waves, an emission angle detector that detects the emission angle based on the reflected wave signal, and a road information analyzer that acquires the road information by generating a heat map based on the emission angles, distances, and reflected wave intensities and analyzing the heat map using a threshold value of the wave intensity.
    Type: Application
    Filed: October 17, 2017
    Publication date: February 22, 2018
    Inventors: YOSHITO HIRAI, TOMOHIRO YUI, HIDEKUNI YOMO, HIROHITO MUKAI
  • Publication number: 20160377702
    Abstract: A processor generates first position information on a relative position between a camera and a radar, acquires, from the radar, second position information on a relative position between the radar and a reflector, the second position information being generated by using an arrival direction of the radar transmission wave, and calculates a displacement amount by comparing the first position information and the second position information with each other.
    Type: Application
    Filed: May 26, 2016
    Publication date: December 29, 2016
    Inventors: HIDEKUNI YOMO, AKIHIKO MATSUOKA
  • Publication number: 20160349354
    Abstract: In a radar device mounted in a host vehicle, a radar transmitting unit transmits a radar signal; a light detection unit detects ON or OFF of a light of another vehicle in which the radar device is mounted; and a timing control unit sets a transmission timing of the radar signal and a light ON timing of a light of the host vehicle, the light ON timing is synchronized with the transmission timing on basis of detected ON or OFF of the light of the other vehicle. The set transmission timing is different from a transmission timing of a radar signal of the radar device mounted in the other vehicle.
    Type: Application
    Filed: May 16, 2016
    Publication date: December 1, 2016
    Inventors: HIDEKUNI YOMO, HIROHITO MUKAI, TOMOHIRO YUI, YOSHITO HIRAI
  • Patent number: 9301297
    Abstract: A communication processor that is compatible with a plurality of communication protocols while limiting increases in circuit scale is provided. The communication processor includes a computational processing circuit resource having a plurality of programmable function units (FUs). An operation mode determination unit determines an operation mode indicating a communication protocol application state. A permitted processing time determination unit determines a permitted processing time in accordance with the determined operation mode. In accordance with the permitted processing time, a resource allocation unit divides the plurality of FUs and allocates computational resources for each communication protocol indicated by the operation mode. A region controller controls the allocated computation resources. The computational processing circuit resource outputs data from after the computational processing at the timing when the computation processing ends.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: March 29, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hidekuni Yomo, Kiyotaka Kobayashi, Akihiko Matsuoka, Atsushi Maruyama
  • Publication number: 20150341192
    Abstract: An adaptive equalizer (100) has a signal converter (200) for performing a fast Fourier transform and/or an inverse fast Fourier transform. The signal converter (200) has: a first wide-bit memory (201) capable of reading/writing a plurality of sample signals; a first register group (202) comprising a plurality of registers capable of accessing the first wide-bit memory (201); a butterfly computation unit group (204) comprising a plurality of butterfly computation units; and a first connection switching unit (203) for switching the state of connection between the plurality of registers and the plurality of butterfly computation units.
    Type: Application
    Filed: July 30, 2015
    Publication date: November 26, 2015
    Inventors: Hidekuni YOMO, Akihiko MATSUOKA, Atsushi MARUYAMA
  • Patent number: 9191253
    Abstract: An adaptive equalizer (100) has a signal converter (200) for performing a fast Fourier transform and/or an inverse fast Fourier transform. The signal converter (200) has: a first wide-bit memory (201) capable of reading/writing a plurality of sample signals; a first register group (202) comprising a plurality of registers capable of accessing the first wide-bit memory (201); a butterfly computation unit group (204) comprising a plurality of butterfly computation units; and a first connection switching unit (203) for switching the state of connection between the plurality of registers and the plurality of butterfly computation units.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: November 17, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hidekuni Yomo, Akihiko Matsuoka, Atsushi Maruyama
  • Patent number: 9154347
    Abstract: An adaptive equalizer capable of suppressing an increase in circuit scale and an increase in operation clock frequency. An adaptive equalizer (100) performs an adaptive equalization process on a time-region signal in a frequency region. A signal converter (200) has: a first wide-bit memory (201) capable of reading/writing a plurality of sample signals; a first register group (202) comprising a plurality of registers capable of accessing the first wide-bit memory (201); a butterfly computation unit group (204) comprising a plurality of butterfly computation units; and a first connection switching unit (203) for switching the state of connection between the plurality of registers and the plurality of butterfly computation units.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: October 6, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hidekuni Yomo, Akihiko Matsuoka, Atsushi Maruyama
  • Publication number: 20140192856
    Abstract: An adaptive equalizer (100) has a signal converter (200) for performing a fast Fourier transform and/or an inverse fast Fourier transform. The signal converter (200) has: a first wide-bit memory (201) capable of reading/writing a plurality of sample signals; a first register group (202) comprising a plurality of registers capable of accessing the first wide-bit memory (201); a butterfly computation unit group (204) comprising a plurality of butterfly computation units; and a first connection switching unit (203) for switching the state of connection between the plurality of registers and the plurality of butterfly computation units.
    Type: Application
    Filed: June 29, 2012
    Publication date: July 10, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Hidekuni Yomo, Akihiko Matsuoka, Atsushi Maruyama
  • Publication number: 20140192855
    Abstract: An adaptive equalizer capable of suppressing an increase in circuit scale and an increase in operation clock frequency. An adaptive equalizer (100) performs an adaptive equalization process on a time-region signal in a frequency region. A signal converter (200) has: a first wide-bit memory (201) capable of reading/writing a plurality of sample signals; a first register group (202) comprising a plurality of registers capable of accessing the first wide-bit memory (201); a butterfly computation unit group (204) comprising a plurality of butterfly computation units; and a first connection switching unit (203) for switching the state of connection between the plurality of registers and the plurality of butterfly computation units.
    Type: Application
    Filed: June 29, 2012
    Publication date: July 10, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Hidekuni Yomo, Akihiko Matsuoka, Atsushi Maruyama
  • Patent number: 8755358
    Abstract: A wireless base station device includes a plurality of transmit weight generation sections and a beam selection section. The transmit weight generation sections generate pieces of transmit weight information used for spatial division multiplexing transmission according to different algorithms. The pieces of transmit weight information are generated based on channel information on a plurality of terminals each having one or more antennas with which the wireless base station device performs spatial division multiplexing transmission. The beam selection section selects one of the pieces of transmit weight information generated.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: June 17, 2014
    Assignee: Panasonic Corporation
    Inventors: Takaaki Kishigami, Hidekuni Yomo
  • Patent number: 8724651
    Abstract: A wireless network system including a first terminal for sending a request-to-send signal including information on a medium use period to a second terminal before sending data, receiving a clear-to-send signal from the second terminal, and sending data to the second terminal during the medium use period; the second terminal for receiving the request-to-send signal and sending the clear-to-send signal; a third terminal for receiving the request-to-send signal and transmitting data to a fourth terminal during the medium use period; and the fourth terminal. Thus, it is possible to prevent occurrence of a problem that when it is judged that the wireless channel is being used, transmission of the station is suppressed.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: May 13, 2014
    Assignee: Panasonic Corporation
    Inventors: Hidekuni Yomo, Naoki Adachi, Takaaki Kishigami, Yoichi Nakagawa, Shutai Okamura
  • Patent number: 8705492
    Abstract: A MIMO receiving apparatus that can demodulate a spatially multiplexed signal without using any division operation requiring a large quantity of operation resources. In the MIMO receiving apparatus, stream separation section (105) separates a spatially multiplexed signal into a plurality of streams based on numerator submatrix A. Numerator submatrix A is determined according to channel matrix H and a canceller scheme and corresponds to a numerator of stream separation matrix S that equalizes the phase and amplitude of the spatially multiplexed signal. Denominator part calculation section (108) calculates a denominator (denominator coefficient) of stream separation matrix S and correction section (117) corrects a threshold determined according to a modulation scheme of the spatially multiplexed signal using the denominator (denominator coefficient) of stream separation matrix S.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: April 22, 2014
    Assignee: Panasonic Corporation
    Inventors: Hidekuni Yomo, Kiyotaka Kobayashi
  • Patent number: 8593976
    Abstract: It is an object to provide a wireless base station and a terminal equipment capable of shortening the processing time by not requiring the detection of the spatial correlation coefficient, which is required in general technology, and simplifying the selection process for terminal equipments to be connected to each other in a wireless base station that performs spatial multiplexing transmission to a plurality of terminal equipments and a terminal equipment responding for spatial multiplexing transmission. A terminal equipment 12 includes an interference cancellation capability information data maintaining section 20 that maintains interference cancellation capability information data indicating the interference cancellation capability of the terminal equipment 12 and signals the interference cancellation capability information data to a wireless base station 1.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: November 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Takaaki Kishigami, Shutai Okamura, Hidekuni Yomo, Yoshihito Kawai
  • Publication number: 20130223265
    Abstract: The present invention provides a communication processor that is compatible with a plurality of communication protocols and also limits increases in circuit scale. A communication processor (200) comprises a computational processing circuit resource (270) having a plurality of programmable computation units (FU: Function Unit). An operation mode determination unit (230) determines an operation mode indicating a communication protocol application state. A permitted processing time determination unit (240) determines a permitted processing time in accordance with the determined operation mode. A resource allocation unit (250), in accordance with the permitted processing time, divides the plurality of FUs and allocates computational resources for each communication protocol indicated by the operation mode. A region controller (260) controls the allocated computation resources.
    Type: Application
    Filed: October 26, 2011
    Publication date: August 29, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Hidekuni Yomo, Kiyotaka Kobayashi, Akihiko Matsuoka, Atsushi Maruyama
  • Patent number: 8494035
    Abstract: A circuit for adaptive feedback equalization is disclosed. In one aspect, the circuit includes a frequency-domain feedforward filtering section and a feedback filtering section, a slicer to slice a block of equalized symbols, a summing module for summing outputs of the filtering sections thereby yielding the block of equalized symbols. First and second updating modules provide coefficient updates to the filtering sections. The updating modules are fed with a frequency-domain converted block of error signals indicating the difference between the block of equalized symbols at the slicer input and the block of sliced symbols at the slicer output and for computing updates using the frequency-domain converted block of error signals. A time-domain compensation module receives a time-domain version of the updated filter coefficients of the feedback filtering section and symbols of the block of sliced symbols. It adds a feedback error compensation signal to the block of equalized symbols.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: July 23, 2013
    Assignees: IMEC, Panasonic Corporation
    Inventors: Andre Bourdoux, Hidekuni Yomo, Kiyotaka Kobayashi
  • Publication number: 20120236926
    Abstract: A circuit for adaptive feedback equalization is disclosed. In one aspect, the circuit includes a frequency-domain feedforward filtering section and a feedback filtering section, a slicer to slice a block of equalized symbols, a summing module for summing outputs of the filtering sections thereby yielding the block of equalized symbols. First and second updating modules provide coefficient updates to the filtering sections. The updating modules are fed with a frequency-domain converted block of error signals indicating the difference between the block of equalized symbols at the slicer input and the block of sliced symbols at the slicer output and for computing updates using the frequency-domain converted block of error signals. A time-domain compensation module receives a time-domain version of the updated filter coefficients of the feedback filtering section and symbols of the block of sliced symbols. It adds a feedback error compensation signal to the block of equalized symbols.
    Type: Application
    Filed: June 10, 2011
    Publication date: September 20, 2012
    Applicants: Panasonic Corporation, IMEC
    Inventors: Andre Bourdoux, Hidekuni Yomo, Kiyotaka Kobayashi
  • Patent number: 8265206
    Abstract: A radio receiver which performs iterative decoding of a received signal is provided. The radio receiver comprises: a receiving unit receiving a signal on a symbol-by-symbol basis; a demodulation unit (303) demodulating the received signal; a last symbol timing generation unit (308) generating a last symbol timing signal on the basis of the signal demodulated by the demodulation unit (303); a modulation unit (304) modulating the signal demodulated by the demodulation unit (303); and a cancellation unit (306) cancelling an interference component of the received signal using a replica signal generated on the basis of the signal modulated by the modulation unit (304). The modulation unit (304) controls the timing of rearrangement of a data sequence on the basis of the timing of the last symbol. Thus, a radio receiver in which the receiving processing time is reduced can be provided.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: September 11, 2012
    Assignee: Panasonic Corporation
    Inventors: Hirohito Mukai, Hidekuni Yomo, Kiyotaka Kobayashi, Yoshinori Kunieda
  • Patent number: 8250622
    Abstract: Time slice transmission methods transmit data in bursts, thus creating a delay until playback of a service can begin when changing the service and therefore preventing smooth zapping. To solve this problem, a first stream used for burst transmission of packet sets and a second stream for continuously transmitting packets at a speed determined according to the transmission rate required for a particular service are multiplexed and transmitted. The content is reproduced using the continuously transmitted second stream during zapping, and the first stream transmitted in bursts is reproduced after zapping ends.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: August 21, 2012
    Assignee: Panasonic Corporation
    Inventors: Izumi Usuki, Sadashi Kageyama, Akira Kisoda, Hidekuni Yomo