Abstract: A loop interference canceller that carries out an adaptive operation of responding to time variations of the phase or level of loop interference wave or key station wave at high speed and with high accuracy and reduces the size of an apparatus. The loop interference canceller of the present invention limits the number of data pieces of the transmission path characteristic estimation section, realizes expansion to the entire band not through interpolation but through 0 insertion in a frequency domain and windowing after time domain transformation to reduce the number of data pieces processed and speed up the adaptive operation of the loop interference canceller, and can thereby realize high trackability for time variations of the phase and level of loop interference wave or key station wave, increase the accuracy of processing inside, perform high accuracy cancellation operation, reduce the circuit scale and achieve an advantageous effect of realizing miniaturization of the apparatus.

Abstract: A relay apparatus, terminal apparatus and relay method for relaying signals with a reduced scale of the apparatus, without temporally switching between transmission and reception and with reduced waste of time when relay is performed at the same frequency on a radio communication network on which bidirectional communication is performed. A radio reception section 202 outputs information signals to a switch 208, outputs relay control signals to a demodulation section 204 after subjecting predetermined radio reception processing. The demodulation section 204 demodulates a relay control signal. A relay control signal processing section 206 decides the possibility of relay of information signals and inquires, when the relay is possible, whether the terminal apparatus on the receiving side can receive this information signal or not. Furthermore, the relay control signal processing section 206 connects a switch 208 during the stored relay time.

Abstract: An A/D conversion section (101) performs oversampling on an analog signal at a rate M times the symbol rate to convert into digital signals. A FIR filtering section (102) has two delay-element sequences each with a plurality of delay elements, and the two sequences have different delay directions of input signal, i.e., forward direction and reverse direction. The delay directions of input signal can be switched, and according to the finite impulse response train having such delay-element sequences, convolutional calculation is performed. A phase determining section (103) determines a phase used in making a decision in a decision section (104). The decision section (104) makes a decision on a filtered signal using the phase determined in the phase determining section (103) to generate bit data. A digital signal receiving apparatus is thus achieved which determines a phase with high accuracy without increasing the oversampling number, and performs fast calculation while having a reduced circuitry scale.

Abstract: Wiring is variably connected between delay section 102 having N delay elements, D0 to DN-1, and multiplying section 104 having N multipliers, c(0) to c(N-1). Further, wiring is variably connected between multiplying section 104 and adding section 106 having N adders, K0 to KN-1. When the oversampling number of an input signal is dynamically varied, wiring control section 109 varies the wiring so as to obtain a filter structure with a number of parallels corresponding to the oversampling number. Thus, the finite impulse response filter is capable of responding to the dynamically varied oversampling number, and reducing its circuit size.

Abstract: A demodulation apparatus includes an A/D converter for sampling and quantizing a baseband signal, and a demultiplexer for multiple-separating output signals of the A/D converter into two outputs. A first branch unit splits one of the two outputs of the demultiplexer into M outputs, where M is an integer equal to or greater than 2. Also, M/2 delay units delay M/2 outputs of the first branch unit. A second branch unit splits the outputs of the demultiplexer into M. The demodulation apparatus further includes first M/2 transversal filters, second M/2 transversal filters, and third M transversal filters. First M/2 adders each adds one of the output signals of the first transversal filters and one of the output signals of the third transversal filters, and second M/2 adders each adds one of the output signals of the second transversal filters and one of the output signals of the third transversal filters.

Abstract: A demodulation apparatus of the present invention comprises: an A/D converter for sampling and quantizing a baseband signal; a transversal filter having time-shifted tap coefficients; a decision unit for decoding the signal which has undergone the transversal filter; and a decision point estimation unit for instructing the transversal filter to select the tap coefficient to be selected based on information from the decision unit. Thus, the demodulation apparatus can operate at the same frequency as a sampling frequency of the A/D converter and can perform decision with accuracy equivalent to an arbitrary oversampling number.

Abstract: A demodulation apparatus of the present invention comprises: an A/D converter for sampling and quantizing a baseband signal; a transversal filter having time-shifted tap coefficients; a decision unit for decoding the signal which has undergone the transversal filter; and a decision point estimation unit for instructing the transversal filter to select the tap coefficient to be selected based on information from the decision unit. Thus, the demodulation apparatus can operate at the same frequency as a sampling frequency of the A/D converter and can perform decision with accuracy equivalent to an arbitrary oversampling number.