Patents by Inventor Hideo Yamamoto

Hideo Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100038425
    Abstract: A communication device is provided and includes: receiving means for receiving a transmitted command; command processing means for performing command processing in response to the received command and generates a response containing a result of the command processing; updating means for updating information held in one area currently disabled, out of a first area and a second area, using the result of the command processing, the first area and the second area forming a memory for holding information indicating a current status; transmitting means for transmitting the generated response; and switching means for switching, out of the first area and the second area of the memory, the one area currently disabled and holding the information that was updated using the result of the command processing into the enabled state and the other area currently enabled into the disabled state immediately after transmission of the response is completed.
    Type: Application
    Filed: August 10, 2009
    Publication date: February 18, 2010
    Applicant: SONY CORPORATION
    Inventors: Hideo Yamamoto, Tadashi Morita
  • Publication number: 20090236786
    Abstract: A hand 1 is constituted by a hand base 4 serving as a base portion, a rocking hand 3 disposed to be superposed on the hand base 4 and serving to support a substrate 2, and a rocking mechanism 5 provided between the hand base 4 and the rocking hand 3 and serving to support the rocking hand 3 to be tiltable and movable in parallel with respect to the hand base 4.
    Type: Application
    Filed: March 20, 2009
    Publication date: September 24, 2009
    Applicants: KABUSHIKI KAISHA YASKAWA DENKI, EBARA CORPORATION
    Inventors: Hiroki SANEMASA, Hideo YAMAMOTO, Naoomi TORII, Takahiro OGAWA, Seiji KATSUOKA, Hidetaka NAKAO, Natsuki MAKINO
  • Patent number: 7591206
    Abstract: A mechanical stopper offers a relative rotation range exceeding 360°, scarcely generating abrasion powder and the like and having a simple structure. The stopper apparatus has a rotation axis section in which relative rotation is carried out between two members around one rotation axis, for restricting the rotation angle of one of the members with respect to the other member. The stopper apparatus has a contact piece provided on the member and two support members and are provided standing on the other member with a clearance therebetween. A band-shaped elastic member is layered across between the above-mentioned two support members, and the contact piece contacts the elastic member to stop the rotation of the member.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: September 22, 2009
    Assignee: Kabushiki Kaisha Yaskawa Denki
    Inventors: Hideo Yamamoto, Hiroshi Asano
  • Publication number: 20090235336
    Abstract: A data processing apparatus is provided which is capable of improving the responsiveness of communication in which only a maximum of one access request source has write authorization and the other access requests do not have write authorization when communication is performed with a plurality of access request sources. A management apparatus transmits, to a secure application module (SAM), a strong connection request requesting the obtainment of write authorization into the SAM. When it is determined that the strong connection has not already been assigned to the other management apparatuses, the SAM assigns the strong connection to the management apparatus in a state in which a weak connection having read authorization with the management apparatuses is maintained.
    Type: Application
    Filed: May 28, 2009
    Publication date: September 17, 2009
    Applicant: Sony Corporation
    Inventors: Masahiro SUEYOSHI, Kazuo Omori, Akira Honjo, Naofumi Hanaki, Katsuyuki Teruyama, Tomohiko Nagayama, Hideo Yamamoto, Yuji Hiura, Yoshiaki Hirano
  • Publication number: 20090232631
    Abstract: A substrate holding apparatus includes a base plate with a two-pronged portion, a holding plate arranged above the base plate, a driving portion provided therebetween, a holding portion formed by a tip end of the two-pronged portion and a tip end of the holding plate, and a guide portion provided at the tip end of the two-pronged portion for guiding a part of the substrate. The driving portion includes an urging means for always urging a basal end side of the holding plate upward, an electric magnetic portion for drawing the holding plate toward the base plate, and a bearing portion arranged at on the tip end side of the base plate. The guide portion has a guide groove which comes into contact with a part of a periphery of the substrate.
    Type: Application
    Filed: January 23, 2009
    Publication date: September 17, 2009
    Applicant: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Hideharu Zenpo, Hideo Yamamoto, Toshiyuki Harada, Yoshihiro Kusama, Katsuya Okumura
  • Patent number: 7555653
    Abstract: A data processing apparatus is provided which is capable of improving the responsiveness of communication in which only a maximum of one access request source has write authorization and the other access requests do not have write authorization when communication is performed with a plurality of access request sources. A management apparatus transmits, to a secure application module (SAM), a strong connection request requesting the obtainment of write authorization into the SAM. When it is determined that the strong connection has not already been assigned to the other management apparatuses, the SAM assigns the strong connection to the management apparatus in a state in which a weak connection having read authorization with the management apparatuses is maintained.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: June 30, 2009
    Assignee: Sony Corporation
    Inventors: Masahiro Sueyoshi, Kazuo Omori, Akira Honjo, Naofumi Hanaki, Katsuyuki Teruyama, Tomohiko Nagayama, Hideo Yamamoto, Yuji Hiura, Yoshiaki Hirano
  • Patent number: 7524619
    Abstract: A coloring matter absorbing a near-infrared ray which comprises a diimonium salt containing a sulfonimide as an anion moiety, represented by the general formula (1): wherein R may be the same or different and represents a moiety selected from the group consisting of an alkyl group, a halogenated alkyl group, a cyanoalkyl group, an aryl group, a hydroxyl group, a phenyl group, and a phenylalkylene group, and R1 and R2 may be the same or different and each represent a fluoroalkyl group, or together form a fluoroalkylene group. The coloring matter absorbing a near-infrared ray is excellent in the resistance to heat and moisture, and thus exhibits an ability of absorbing a near-infrared ray not lowering for a long period of time.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: April 28, 2009
    Assignee: Japan Carlit Co., Ltd.
    Inventors: Susumu Yamanobe, Masaaki Tamura, Yoji Yamaguchi, Hideo Yamamoto
  • Publication number: 20090072300
    Abstract: The present invention provides a vertical MOSFET which has striped trench gate structure which can secure avalanche resistance without increasing Ron. A vertical MOSFET 100 comprises a plurality of gate trenches 7 which is arranged in stripes, an array which is sandwiched with the plurality of gate trenches 7 and includes N+ source regions 4N+ and P+ base contact regions 5P+, and a diode region (anode region 6P+) which is formed so as to contact with two gate trenches 7. The N+ source regions 4N+ and the base contact regions 5P+ are alternately arranged along a longitudinal direction of the gate trench 7. Size of the diode region (anode region 6P+) corresponds to at least one of the N+ source regions 4N+ and two of the P+ base contact regions 5P+.
    Type: Application
    Filed: September 10, 2008
    Publication date: March 19, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Hideo Yamamoto, Kenya Kobayashi, Atsushi Kaneko
  • Publication number: 20090023938
    Abstract: An object of the present invention is to provide a method for producing an alkyl ester of a fatty acid from a fat or oil, of which main component is a triglyceride, and an alkyl alcohol under mild conditions in a high reaction efficiency, and the alkyl ester of a fatty acid can be effectively utilized as a diesel fuel oil, an industrial raw material or the like, the method further being capable of utilizing on an industrial scale, in which post-treatment steps for removing a catalyst component can be simplified or omitted. For this purpose, the method for producing an alkyl ester of a fatty acid of this invention includes the step of carrying out a transesterification reaction between a fat or oil and an alcohol in the presence of a base catalyst containing calcium oxide, characterized in that the method includes the step of contacting the base catalyst with the alcohol, to carry out an activation treatment thereof in advance of the reaction.
    Type: Application
    Filed: January 26, 2007
    Publication date: January 22, 2009
    Applicants: REVO INTERNATIONAL INC., EHIME UNIVERSITY
    Inventors: Ayato Kawashima, Hideo Yamamoto, Tetsuya Koshikawa
  • Publication number: 20080177542
    Abstract: A voice recognition program according to claim 1 makes a computer execute a start determining word recognizing step for checking whether a start determining word for a sentence recognition is inputted by voice or not, an end determining word recognizing step for checking whether an end determining word for the sentence recognition is inputted by voice or not after the voice input of the start determining word, and a sentence recognizing step for recognizing by voice an intermediate sentence between the start determining word and the end determining word when it is judged that the start determining word and the end determining word are inputted in the start determining word recognizing step and the end determining word recognizing step.
    Type: Application
    Filed: March 11, 2005
    Publication date: July 24, 2008
    Applicant: GIFU SERVICE CORPORATION
    Inventor: Hideo Yamamoto
  • Publication number: 20080135921
    Abstract: An epitaxial layer is formed on an n+ semiconductor substrate by epitaxial growth. A gate trench is formed to the surface of gate trench so that the bottom of gate trench reaches middle of the epitaxial layer. A gate insulator is formed on the inner wall of gate trench and a polysilicon is formed in the gate trench with the gate insulator interposed therebetween. An HTO film is formed on the surface of the polysilicon and the n? epitaxial layer. At this time, an ion plantation is performed to the epitaxial layer through the HTO film. Hence, a p diffused base layer, an n+ diffused source layer, an n+ diffused source layer is formed. A CVD oxide film is formed on the HTO film. After a BPSG having flowability is deposited on the CVD oxide film, the BPSG film is planarized with a heat treatment of 900-1100 degree Celsius.
    Type: Application
    Filed: November 13, 2007
    Publication date: June 12, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Yoshimitsu Murase, Kenya Kobayashi, Hideo Yamamoto, Atsushi Kaneko
  • Patent number: 7360798
    Abstract: A threaded joint for steel pipes comprising a pin 1 and a box 2 each having a contact surface comprising a threaded portion 3 or 4 and an unthreaded metal contact portion 8 is provided with improved anti-galling propertied by forming a lubricating coating on the contact surface of at least one of the pin and the box, the lubricating coating exhibiting a self-repairing function by liquid lubrication and having a decreased greasiness. The lubricating coating is (1) a coating which comprises a lower lubricant layer which is in liquid form in the temperature range of above 0° C. and below 40° C. and an upper lubricant layer which is in solid form at 40° C., or (2) a coating which is semi-solid or solid at 40° C. and is formed of a mixture comprising a lubricating oil which is in liquid form in the temperature range of above 0° C. and below 40° C. and a wax which is in solid form at 40° C., the mixture preferably having been heated so as to liquefy the wax and dissolve in each other the wax and lubricant oil.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: April 22, 2008
    Assignees: Sumitomo Metal Industries, Ltd., Vallourec Mannesmann Oil & Gas France
    Inventors: Keishi Matsumoto, Kunio Goto, Toshiro Anraku, Shigeo Nagasaku, Hideo Yamamoto
  • Publication number: 20080081422
    Abstract: A method of manufacturing a semiconductor apparatus includes forming a trench in a semiconductor layer, forming a gate electrode inside the trench, forming a thermally-oxidized film on the gate electrode inside the trench, forming a silicate glass film on the thermally-oxidized film inside the trench, forming a body region inside the semiconductor layer, and forming a source region on the body region. The method provides a semiconductor apparatus having reduced fluctuation of a channel length and low ON-resistance.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 3, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Kenya Kobayashi, Hideo Yamamoto, Atsushi Kaneko, Yoshimitsu Murase
  • Publication number: 20080073710
    Abstract: The size of a gate contact region is decreased by connecting a gate connection electrode embedded in a trench and a gate wiring formed over the gate connection electrode, without forming another conductive film different from the gate connection electrode or the gate wiring. The semiconductor body includes an active cell region and a gate contact region. The active cell region includes a vertical MOSFET with a gate electrode disposed in a first trench. The gate contact region includes the gate connection electrode disposed in a second trench and formed of a same conductive material with the gate electrode. The gate connection electrode includes an embedded part formed in the second trench and an extended part extended therefrom and formed outside the second trench. An interlayer insulation film formed on the gate connection electrode and having a via hole exposing at least a portion of the embedded part of the gate connection electrode.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 27, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hideo Yamamoto
  • Publication number: 20080067625
    Abstract: An improved semiconductor device having a gate electrode buried in a trench that a short circuit is hardly generated between a gate electrode and a source electrode at a termination of the gate electrode. A trench is formed in a semiconductor substrate. A gate electrode and a buried insulating film are buried in the trench. A source electrode is provided above the gate electrode via the buried insulating film. At the termination of the gate electrode, an interlayer insulating film is provided between the buried insulating film and the source electrode in such a way that the interlayer insulating film strides over the termination of the trench. Both of the buried insulating film and the interlayer insulating film function as an insulating film and prevent a short circuit at the termination of the gate electrode.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 20, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Hideo Yamamoto, Kenya Kobayashi
  • Patent number: 7184558
    Abstract: A volume controller for controlling volume balance between a front speaker and a rear speaker located within a vehicle, includes a fade volume computing unit for computing an amplifying factor k1 of an input signal for providing an increased volume at the rear or front speaker by the volume at a prescribed position within the vehicle which is equal to an decreased volume in the front or rear speaker when a signal supplied to the front or rear speaker is attenuated by an attenuating factor K1; and a control unit for multiplying the signal supplied to the rear or front speaker by k1 when a signal supplied to the front or rear speaker is attenuated by K1. In this configuration, a volume controller can form an acoustic field with a sense of realism when volume adjustment is preformed in a to-and-fro direction.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: February 27, 2007
    Assignee: Pioneer Corporation
    Inventors: Hideo Yamamoto, Yoshifumi Fujino
  • Publication number: 20060226475
    Abstract: A MOSFET has a base layer and a source layer in a cell surrounded by a trench gate formed in a semiconductor substrate. A trench contact is formed through the source layer and the base layer. The gate is polygonal such as square. The trench contact is thin and linear so as to increase embedding characteristics. Further, the trench contact is ring or cross shaped so as to reduce a source length.
    Type: Application
    Filed: July 29, 2005
    Publication date: October 12, 2006
    Applicant: NEC Electronics Corporation
    Inventors: Hideo Yamamoto, Kenya Kobayashi
  • Publication number: 20060073407
    Abstract: A coloring matter absorbing a near-infrared ray which comprises a diimonium salt containing a sulfonimide as an anion moiety, represented by the general formula (1): wherein R may be the same or different and represents a moiety selected from the group consisting of an alkyl group, a halogenated alkyl group, a cyanoalkyl group, an aryl group, a hydroxyl group, a phenyl group, and a phenylalkylene group, and R1 and R2 may be the same or different and each represent a fluoroalkyl group, or together form a fluoroalkylene group. The coloring matter absorbing a near-infrared ray is excellent in the resistance to heat and moisture, and thus exhibits an ability of absorbing a near-infrared ray not lowering for a long period of time.
    Type: Application
    Filed: November 18, 2003
    Publication date: April 6, 2006
    Applicant: Japan Carlit Co., Ltd.
    Inventors: Susumu Yamanobe, Masaaki Tamura, Hideo Yamamoto
  • Publication number: 20050207570
    Abstract: An encryption apparatus capable of effectively preventing encryption data from being illegally generated is provided. Based on apparatus identification data of an IC, which is input from a computer, a secure application module (SAM) selects an encryption method from among a plurality of different encryption methods. Based on the code of the IC, the SAM selects plaintext data to be encrypted from among the plurality of different pieces of plaintext data. The SAM outputs encryption data such that the selected plaintext data is encrypted by the selected encryption method.
    Type: Application
    Filed: December 30, 2004
    Publication date: September 22, 2005
    Applicant: Sony Corporation
    Inventors: Hideo Yamamoto, Naofumi Hanaki, Katsuyuki Teruyama, Tomohiko Nagayama, Masahiro Sueyoshi, Yoshiaki Hirano
  • Patent number: D526351
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: August 8, 2006
    Assignee: Konica Minolta Business Technologies, Inc.
    Inventors: Hideo Yamamoto, Yu Iritani