Patents by Inventor Hidetoshi Matsumoto

Hidetoshi Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240122579
    Abstract: Systems and methods for automated ultrasound credentialing are described. In some embodiments, a credentialing system for issuing a sonographer credential to a sonography candidate includes an ultrasound probe coupled to a computing device and configured to generate ultrasound data. The computing device is configured to generate, based on the ultrasound data and as part of an automated review, an ultrasound examination score. The computing device is configured to transfer, based on the ultrasound examination score, the sonography candidate from the automated review to a manual review by a reviewer.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 18, 2024
    Inventors: Davin Dhatt, Paul Danset, Thomas Duffy, Hidetoshi Takayama, Tomoki Inoue, Tsuyoshi Matsumoto
  • Publication number: 20240113120
    Abstract: A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211,212 respectively.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 4, 2024
    Applicant: SONY GROUP CORPORATION
    Inventors: Hidetoshi Oishi, Koichi Matsumoto, Kazuyuki TOMIDA
  • Publication number: 20240039023
    Abstract: This gel electrolyte contains a liquid, inorganic nanofibers, and a polymer obtained by polymerizing a compound which has an imidazolium salt having an alkenyl group represented by formula (1-1) and an imidazolium salt having an alkenyl group represented by formula (2-1) at both ends, and in which the compound is swelled by the liquid; the gel electrolyte exhibits proton conductivity equivalent to that of Nafion at room temperature, exhibits proton conductivity greater than or equal to that of Nafion at high temperatures exceeding 60° C., and has excellent strength. (In the formula, X? indicates monovalent anions, Y? represents mutually independent monovalent anions, and n represents an integer 1-20.
    Type: Application
    Filed: October 20, 2021
    Publication date: February 1, 2024
    Applicants: Nisshinbo Holdings Inc., Tokyo Institute of Technology
    Inventors: Gen Masuda, Hidetoshi Matsumoto
  • Patent number: 11855586
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: December 26, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Patent number: 11496100
    Abstract: A matching network is a matching network of a power amplifier circuit that outputs a signal obtained by a differential amplifier amplifying power of a high-frequency signal. The matching network includes an input-side winding connected between differential outputs of the differential amplifier; an output-side winding that is coupled to the input-side winding via an electromagnetic field and whose one end is connected to a reference potential; a first LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the input-side winding; and a second LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the output-side winding.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: November 8, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiichiro Takenaka, Masahiro Ito, Tsuyoshi Sato, Kozo Sato, Hidetoshi Matsumoto
  • Publication number: 20210344304
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Application
    Filed: July 14, 2021
    Publication date: November 4, 2021
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Publication number: 20210305950
    Abstract: A radio frequency signal having a constant amplitude is modulated by a digital modulation signal and a radio frequency input signal whose amplitude changes stepwise is generated. The radio frequency input signal is input into a power amplifier that is an evaluation target. A period in which an amplitude of the radio frequency input signal is constant is defined as a measurement period and an output signal of the power amplifier is measured in each of measurement periods in which amplitudes of the radio frequency input signal are different from each other.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 30, 2021
    Inventors: Kiichiro TAKENAKA, Masahiro ITO, Yuuma NOGUCHI, Daiji NAGASHIMA, Hidetoshi MATSUMOTO
  • Patent number: 11128271
    Abstract: A power supply circuit supplies a variable voltage to a power amplifier that amplifies a radio-frequency signal, and includes a transistor and a current detecting resistor. The transistor includes a collector or drain that is supplied with a fixed voltage from a fixed voltage source, a base or gate that receives an envelope signal tracking an envelope of the radio-frequency signal, and an emitter or source that outputs the variable voltage that is based on the envelope signal. The current detecting resistor is electrically connected between the fixed voltage source and the collector or drain of the transistor.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: September 21, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuuma Noguchi, Hidetoshi Matsumoto, Kiichiro Takenaka, Satoshi Tanaka
  • Patent number: 11101773
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: August 24, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Patent number: 10917057
    Abstract: A power amplifier circuit includes a first transistor, wherein a radio frequency signal is inputted to a base or gate of the first transistor; a second transistor having an emitter connected to a collector or drain of the first transistor, wherein a first voltage is supplied to a collector of the second transistor, and a first amplified signal obtained by amplifying the radio frequency signal is outputted from the collector of the second transistor; and a third transistor configured to supply a bias voltage to a base of the second transistor. A second voltage is supplied to a collector or drain of the third transistor, a third voltage corresponding to the first voltage is supplied to a base or gate of the third transistor, and the bias voltage, which corresponds to the third voltage, is supplied from an emitter or source of the third transistor.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: February 9, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hidetoshi Matsumoto, Satoshi Tanaka, Masatoshi Hase
  • Publication number: 20200403582
    Abstract: A matching network is a matching network of a power amplifier circuit that outputs a signal obtained by a differential amplifier amplifying power of a high-frequency signal. The matching network includes an input-side winding connected between differential outputs of the differential amplifier; an output-side winding that is coupled to the input-side winding via an electromagnetic field and whose one end is connected to a reference potential; a first LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the input-side winding; and a second LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the output-side winding.
    Type: Application
    Filed: September 3, 2020
    Publication date: December 24, 2020
    Inventors: Kiichiro TAKENAKA, Masahiro ITO, Tsuyoshi SATO, Kozo SATO, Hidetoshi MATSUMOTO
  • Patent number: 10797657
    Abstract: A matching network is a matching network of a power amplifier circuit that outputs a signal obtained by a differential amplifier amplifying power of a high-frequency signal. The matching network includes an input-side winding connected between differential outputs of the differential amplifier; an output-side winding that is coupled to the input-side winding via an electromagnetic field and whose one end is connected to a reference potential; a first LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the input-side winding; and a second LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the output-side winding.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: October 6, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiichiro Takenaka, Masahiro Ito, Tsuyoshi Sato, Kozo Sato, Hidetoshi Matsumoto
  • Publication number: 20200212855
    Abstract: A power supply circuit supplies a variable voltage to a power amplifier that amplifies a radio-frequency signal, and includes a transistor and a current detecting resistor. The transistor includes a collector or drain that is supplied with a fixed voltage from a fixed voltage source, a base or gate that receives an envelope signal tracking an envelope of the radio-frequency signal, and an emitter or source that outputs the variable voltage that is based on the envelope signal. The current detecting resistor is electrically connected between the fixed voltage source and the collector or drain of the transistor.
    Type: Application
    Filed: December 19, 2019
    Publication date: July 2, 2020
    Inventors: Yuuma NOGUCHI, Hidetoshi MATSUMOTO, Kiichiro TAKENAKA, Satoshi TANAKA
  • Publication number: 20200186094
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 11, 2020
    Inventors: Masao KONDO, Hidetoshi MATSUMOTO
  • Publication number: 20200127622
    Abstract: A power amplifier circuit includes a first transistor, wherein a radio frequency signal is inputted to a base or gate of the first transistor; a second transistor having an emitter connected to a collector or drain of the first transistor, wherein a first voltage is supplied to a collector of the second transistor, and a first amplified signal obtained by amplifying the radio frequency signal is outputted from the collector of the second transistor; and a third transistor configured to supply a bias voltage to a base of the second transistor. A second voltage is supplied to a collector or drain of the third transistor, a third voltage corresponding to the first voltage is supplied to a base or gate of the third transistor, and the bias voltage, which corresponds to the third voltage, is supplied from an emitter or source of the third transistor.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 23, 2020
    Inventors: Hidetoshi MATSUMOTO, Satoshi TANAKA, Masatoshi HASE
  • Patent number: 10615839
    Abstract: First to fourth circuits are connected to corresponding first to fourth antenna terminals. The first to fourth circuits transmit and receive a signal of TDD and a signal of FDD. The first to fourth circuits transmit and receive a signal of MIMO. The third circuit receives a signal of a satellite positioning system. The lower limit of the frequency of the signal received by the third circuit and the fourth circuit is higher than the lower limit of the frequency of the signal received by the first circuit and the second circuit.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: April 7, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tsuyoshi Sato, Hidetoshi Matsumoto, Kiichiro Takenaka, Masahiro Ito, Satoshi Tanaka
  • Patent number: 10601374
    Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: March 24, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masao Kondo, Hidetoshi Matsumoto
  • Patent number: 10594341
    Abstract: A high-frequency-signal transceiver circuit transmits and receives a signal between first to sixth antenna terminals and terminals near a high-frequency circuit. The high-frequency-signal transceiver circuit includes first to sixth circuits connected to the corresponding first to sixth antenna terminals. One of the first to sixth circuits transmits and receives only a signal of time division multiplexing communication.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: March 17, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tsuyoshi Sato, Hidetoshi Matsumoto, Kiichiro Takenaka, Masahiro Ito, Satoshi Tanaka
  • Patent number: 10580395
    Abstract: A sound absorbing body comprises a non-woven fabric or a non-woven fabric laminate, the non-woven fabric or the non-woven fabric laminate comprises a fiber that has an average fiber diameter of less than 3,000 nm, the non-woven fabric or the non-woven fabric laminate has a thickness of less than 10 mm, the non-woven fabric or the non-woven fabric laminate has a unit thickness flow resistance of greater than 4.0 E+06 Ns/m4 and less than 5.0 E+08 Ns/m4, and the non-woven fabric or the non-woven fabric laminate has a bulk density of greater than 70 kg/m3 and less than 750 kg/m3.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: March 3, 2020
    Assignee: COMPAGNIE GENERALE DES ETABLISSEMENTS MICHELIN
    Inventors: Shuichi Akasaka, Hidetoshi Matsumoto, Takahisa Kato
  • Patent number: 10547276
    Abstract: A power amplifier circuit includes a Doherty amplifier including a divider that divides a first signal into a second signal and a third signal, a carrier amplifier that amplifies the second signal and outputs a fourth signal, a peak amplifier that amplifies the third signal and outputs a fifth signal, a combiner that combines the fourth signal and the fifth signal and outputs an amplified signal of the first signal, a first bias circuit that supplies a first bias current or voltage to the carrier amplifier, and a second bias circuit that supplies a second bias current or voltage corresponding to a control signal to the peak amplifier; and a control circuit that supplies the control signal corresponding to a level of the second signal to the second bias circuit. The control circuit includes a detecting unit, an output unit, and a filter circuit.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: January 28, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masahiro Ito, Tsuyoshi Sato, Kiichiro Takenaka, Hidetoshi Matsumoto