Patents by Inventor Hiromichi GOHARA

Hiromichi GOHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10461012
    Abstract: A semiconductor module includes a semiconductor chip; an insulating circuit board that has on one of principal surfaces of an insulating substrate a circuit member electrically connected to the semiconductor chip, and a first metal member disposed in the other principal surface of the insulating substrate; a second metal member that is disposed on a side of an outer edge of the first metal member and is at least partially disposed further toward an outer side than the insulating substrate; a molding resin portion that seals the semiconductor chip, the insulating circuit board, and the second metal member such that a portion of the first metal member and a portion of the second metal member are exposed; a cooler; a first bonding member that bonds the cooler and the first metal member; and a second bonding member that bonds the cooler and the second metal member.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: October 29, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Akira Morozumi, Hiromichi Gohara, Takafumi Yamada
  • Patent number: 10446460
    Abstract: The semiconductor device includes a first insulating circuit substrate; a semiconductor chip including a plurality of control electrodes, disposed on the first insulating circuit substrate; a second insulating circuit substrate including a plurality of first through-holes in which conductive members are arranged on inner walls and/or an outer periphery of ends of the first through-holes, the second insulating circuit substrate being disposed above the semiconductor chips; and first pins inserted into the first through-holes and having at one end a columnar part connected to the control electrodes of the semiconductor chips, and having at another end a head part that is wider than an inner diameter of the first through-holes.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: October 15, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiromichi Gohara, Kohei Yamauchi, Shinji Tada, Tatsuo Nishizawa, Yoshitaka Nishimura
  • Publication number: 20190279917
    Abstract: A cooling apparatus for a semiconductor module including a semiconductor chip is provided, including: a ceiling plate having a lower surface; a casing portion having a coolant circulation portion and an outer edge portion surrounding the coolant circulation portion, the coolant circulation portion being arranged to face the lower surface of the ceiling plate, and the casing portion being closely attached, directly or indirectly, to a lower surface of the ceiling plate at the outer edge portion; and a cooling fin arranged in the coolant circulation portion, where the ceiling plate and the casing portion have a fastening portion in which the ceiling plate and the outer edge portion are stacked, and the fastening portion fastens the ceiling plate and the casing portion to an external device, and the cooling apparatus further includes a reinforcing member provided between the ceiling plate and the casing portion at the fastening portion.
    Type: Application
    Filed: January 27, 2019
    Publication date: September 12, 2019
    Inventors: Hiromichi GOHARA, Takafumi YAMADA, Yuta TAMAI
  • Patent number: 10332845
    Abstract: A semiconductor device includes: an upper-surface electrode on an upper surface of a semiconductor element; a plated layer on an upper surface of the upper-surface electrode; gate runners penetrating the plated layer and formed to extend above the upper surface of the semiconductor element; and a metal connecting plate arranged above the plated layer and electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion at an end of the joint portion, the rising portion extending in a direction away from the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, a first distance, which is a shortest distance between the rising portion and the gate runner not intersecting the rising portion, is equal to or longer than 1 mm.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: June 25, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takafumi Yamada, Hiromichi Gohara, Ryoichi Kato, Kohei Yamauchi
  • Publication number: 20190088575
    Abstract: A semiconductor module includes a semiconductor element having one and the other surface, a lead terminal connected electrically and thermally to the semiconductor element, a first solder which bonds the lead terminal and the one surface of the semiconductor element together, a circuit layer over which the semiconductor element is disposed and a second solder which bonds the other surface of the semiconductor element and the circuit layer together. The inequality (A/B)<1 holds, where A and B are the tensile strength of the first and second solder, respectively. As a result, even if the lead terminal which thermally expands because of heat generated by the semiconductor element expands or contracts toward the semiconductor element, a stress applied by the lead terminal is absorbed and relaxed by the first solder. This prevents damage to the surface electrode of the semiconductor element by suppressing the occurrence of cracks.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 21, 2019
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi Kato, Kohei Yamauchi, Hiromichi Gohara, Tatsuhiko Asai
  • Patent number: 10214109
    Abstract: A cooler for a semiconductor-module includes: a heat sink which has an appearance of a cuboid structure to one side of which a flow rate control plate is fixed; a thermal radiation plate on an outer surface of which semiconductor devices are bonded; and a tray-shaped cooling jacket having: a coolant introduction channel; a coolant extraction channel extending in parallel to the coolant introduction channel; and a cooling channel provided between the coolant introduction and extraction channels. The heat sink is provided in the cooling channel of the cooling jacket so that the flow rate control plate extends in a boundary between the coolant extraction channel and the cooling channel, and channels provided for the heat sink extend orthogonally to the coolant introduction and extraction channels. The thermal radiation plate is fixed so as to close an opening the cooling jacket.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: February 26, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiromichi Gohara, Nobuhide Arai
  • Patent number: 10192807
    Abstract: The invention is provided with a metal base plate including a first surface and a second surface and a cooling case including a bottom wall and a side wall formed around the bottom wall, in which one end of the side wall being joined to a second surface side of the metal base plate, and a coolant can be circulated in a space enclosed by the metal base plate, the bottom wall, and the side wall, in which the cooling case has an inlet portion and an outlet portion for the coolant which are connected to either the bottom wall or the side wall and disposed along a peripheral edge of the second surface of the metal base plate, and includes a first flange disposed at an inlet opening side of the inlet portion and a second flange disposed at an outlet opening side of the outlet portion.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: January 29, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Koyama, Hiromichi Gohara
  • Patent number: 10128167
    Abstract: A semiconductor module is provided, including: a cooling-target device; a first cooling unit on which the cooling-target device is placed and that has a flow channel through which a refrigerant for cooling the cooling-target device flows; and a second cooling unit to which the first cooling unit is fixed and that has a flow channel coupled with the flow channel of the first cooling unit. Also, a semiconductor module manufacturing method is provided, including: placing a cooling-target device on a first cooling unit that has a flow channel through which a refrigerant for cooling the cooling-target device flows; and fixing the first cooling unit to a second cooling unit that has a flow channel coupled with the flow channel of the first cooling unit.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: November 13, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Akira Morozumi, Hiromichi Gohara, Yoshitaka Nishimura
  • Patent number: 10128345
    Abstract: A semiconductor device including a semiconductor element, an upper-surface electrode provided on an upper surface of the semiconductor element, a plated layer provided on an upper surface of the upper-surface electrode, one or more gate runners penetrating the plated layer and provided to extend in a predetermined direction on the upper surface of the semiconductor element, and a metal connecting plate that is arranged above the plated layer and is electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion that is connected to a first end of the joint portion and extends in a direction away from the upper surface of the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, the rising portion and the gate runner do not overlap with each other.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: November 13, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi Kato, Hiromichi Gohara, Takafumi Yamada, Kohei Yamauchi, Tatsuhiko Asai, Yoshitaka Nishimura, Akio Kitamura, Hajime Masubuchi, Souichi Yoshida
  • Publication number: 20180315676
    Abstract: The semiconductor device includes a first insulating circuit substrate; a semiconductor chip including a plurality of control electrodes, disposed on the first insulating circuit substrate; a second insulating circuit substrate including a plurality of first through-holes in which conductive members are arranged on inner walls and/or an outer periphery of ends of the first through-holes, the second insulating circuit substrate being disposed above the semiconductor chips; and first pins inserted into the first through-holes and having at one end a columnar part connected to the control electrodes of the semiconductor chips, and having at another end a head part that is wider than an inner diameter of the first through-holes.
    Type: Application
    Filed: March 7, 2018
    Publication date: November 1, 2018
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Hiromichi GOHARA, Kohei YAMAUCHI, Shinji TADA, Tatsuo NISHIZAWA, Yoshitaka NISHIMURA
  • Publication number: 20180301422
    Abstract: A semiconductor device encompasses a cooler made of ceramics, having a first main face and a second main face, being parallel and opposite to the first main face, defined by two opposite side faces perpendicular to the first and second main faces, a plurality of conductive-pattern layers delineated on the first main face, a semiconductor chip mounted on the first main face via one of the plurality of conductive-pattern layers, and a seal member configured to seal the semiconductor chip.
    Type: Application
    Filed: February 23, 2018
    Publication date: October 18, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kohei YAMAUCHI, Hiromichi GOHARA, Ryoichi KATO, Yoshinari IKEDA, Katsumi TANIGUCHI
  • Publication number: 20180166549
    Abstract: A semiconductor device including a semiconductor element, an upper-surface electrode provided on an upper surface of the semiconductor element, a plated layer provided on an upper surface of the upper-surface electrode, one or more gate runners penetrating the plated layer and provided to extend in a predetermined direction on the upper surface of the semiconductor element, and a metal connecting plate that is arranged above the plated layer and is electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion that is connected to a first end of the joint portion and extends in a direction away from the upper surface of the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, the rising portion and the gate runner do not overlap with each other.
    Type: Application
    Filed: October 25, 2017
    Publication date: June 14, 2018
    Inventors: Ryoichi KATO, Hiromichi GOHARA, Takafumi YAMADA, Kohei YAMAUCHI, Tatsuhiko ASAI, Yoshitaka NISHIMURA, Akio KITAMURA, Hajime MASUBUCHI, Souichi YOSHIDA
  • Publication number: 20180166397
    Abstract: A semiconductor device includes: an upper-surface electrode on an upper surface of a semiconductor element; a plated layer on an upper surface of the upper-surface electrode; gate runners penetrating the plated layer and formed to extend above the upper surface of the semiconductor element; and a metal connecting plate arranged above the plated layer and electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion at an end of the joint portion, the rising portion extending in a direction away from the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, a first distance, which is a shortest distance between the rising portion and the gate runner not intersecting the rising portion, is equal to or longer than 1 mm.
    Type: Application
    Filed: November 29, 2017
    Publication date: June 14, 2018
    Inventors: Takafumi YAMADA, Hiromichi GOHARA, Ryoichi KATO, Kohei YAMAUCHI
  • Patent number: 9978664
    Abstract: To bond a layered substrate and a cooling chamber having different linear expansion coefficients while preventing cracking and breaking, provided is a semiconductor module including a layered substrate formed by layering a circuit board, an insulating board, and a metal board; a semiconductor chip mounted on the circuit board; and a cooling chamber bonded to the metal board by solder. The cooling chamber includes a first board portion bonded to the metal board; a second board portion facing the first board portion; and a plurality of zigzag fins arranged between the first board portion and the second board portion. The plurality of zigzag fins are joined to the first board portion and the second board portion, and a flow path through which a coolant passes is formed by the first board portion, the second board portion, and the plurality of zigzag fins.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 22, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takafumi Yamada, Hiromichi Gohara
  • Patent number: 9960100
    Abstract: A cooler includes: a jacket having an internal coolant conduction space surrounded by a main cooling surface top plate, an opposite bottom plate, and a side wall; coolant inflow and outflow pipes connected to two through holes in the side wall; a coolant introduction channel forming a part of the coolant conduction space and communicating with the coolant inflow pipe; a coolant discharge channel forming a part of the coolant conduction space and communicating with the coolant outflow pipe; and a fin unit between the coolant introduction and discharge channels. The fin unit includes a plurality of fins having separate main surfaces and thermally connected to the top plate. The fins have first ends acutely angled relative to a direction of flow of coolant in the coolant introduction channel, and second ends acutely angled relative to a direction of flow of coolant in the coolant discharge channel.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: May 1, 2018
    Assignee: FUJI ELECTRIC CO., LTD
    Inventors: Nobuhide Arai, Hiromichi Gohara
  • Patent number: 9888611
    Abstract: A power semiconductor module includes an insulated wiring board; semiconductor elements mounted on one main surface of the insulated wiring board; a heat radiation board bonded to another main surface of the insulated wiring board; a plurality of fins including a first group of fins each having one end fixed to the another main surface of the heat radiation board and another end with a free end; and a water jacket housing the plurality of fins and allowing coolant to flow among the plurality of fins. The plurality of fins further includes a second group of fins as reinforced fins each having one end fixed to the another main surface of the heat radiation board and another end bonded to the water jacket.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: February 6, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takafumi Yamada, Hiromichi Gohara, Yoshitaka Nishimura
  • Patent number: 9871006
    Abstract: A semiconductor module including an insulated circuit substrate having a substrate, a circuit layer on a front surface of the substrate, and a metal layer on a back surface of the substrate; a semiconductor element electrically connected to the circuit layer; a cooling unit having a ceiling board bonded to the metal layer, a bottom board opposite the ceiling board, a side wall connecting a periphery of the ceiling board and a periphery of the bottom board, and a fin connecting the ceiling board and bottom board, where thickness of the ceiling board is at least 0.5 mm and at most 2.0 mm and total thickness of the ceiling board and bottom board is at least 3 mm and at most 6 mm; and a solder layer that bonds together the metal layer and the ceiling board by melting at a temperature of at least 200° C. and at most 350° C.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: January 16, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Ryoichi Kato, Takafumi Yamada, Hiromichi Gohara
  • Publication number: 20170271239
    Abstract: A semiconductor module is provided, including: a cooling-target device; a first cooling unit on which the cooling-target device is placed and that has a flow channel through which a refrigerant for cooling the cooling-target device flows; and a second cooling unit to which the first cooling unit is fixed and that has a flow channel coupled with the flow channel of the first cooling unit. Also, a semiconductor module manufacturing method is provided, including: placing a cooling-target device on a first cooling unit that has a flow channel through which a refrigerant for cooling the cooling-target device flows; and fixing the first cooling unit to a second cooling unit that has a flow channel coupled with the flow channel of the first cooling unit.
    Type: Application
    Filed: January 30, 2017
    Publication date: September 21, 2017
    Inventors: Akira MOROZUMI, Hiromichi GOHARA, Yoshitaka NISHIMURA
  • Publication number: 20170263533
    Abstract: The invention is provided with a metal base plate including a first surface and a second surface and a cooling case including a bottom wall and a side wall formed around the bottom wall, in which one end of the side wall being joined to a second surface side of the metal base plate, and a coolant can be circulated in a space enclosed by the metal base plate, the bottom wall, and the side wall, in which the cooling case has an inlet portion and an outlet portion for the coolant which are connected to either the bottom wall or the side wall and disposed along a peripheral edge of the second surface of the metal base plate, and includes a first flange disposed at an inlet opening side of the inlet portion and a second flange disposed at an outlet opening side of the outlet portion.
    Type: Application
    Filed: May 26, 2017
    Publication date: September 14, 2017
    Inventors: Takahiro KOYAMA, Hiromichi GOHARA
  • Publication number: 20170207145
    Abstract: To bond a layered substrate and a cooling chamber having different linear expansion coefficients while preventing cracking and breaking, provided is a semiconductor module including a layered substrate formed by layering a circuit board, an insulating board, and a metal board; a semiconductor chip mounted on the circuit board; and a cooling chamber bonded to the metal board by solder. The cooling chamber includes a first board portion bonded to the metal board; a second board portion facing the first board portion; and a plurality of zigzag fins arranged between the first board portion and the second board portion. The plurality of zigzag fins are joined to the first board portion and the second board portion, and a flow path through which a coolant passes is formed by the first board portion, the second board portion, and the plurality of zigzag fins.
    Type: Application
    Filed: March 30, 2017
    Publication date: July 20, 2017
    Inventors: Takafumi YAMADA, Hiromichi GOHARA