Patents by Inventor Hiroshi Tomita

Hiroshi Tomita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180005370
    Abstract: A method of adjusting a sensitivity parameter value for substrate defect inspection used in a substrate defect inspection apparatus compares, for each pixel value of a selected virtual inspection substrate, using reference pixel data to be used after adjustment, the deviation amount from an allowable range corresponding to the position thereof and the sensitivity parameter value before the adjustment when each pixel value is deviated from the allowable range, and updates the deviation amount as a new sensitivity parameter value when the deviation amount exceeds the sensitivity parameter value and a difference between the deviation amount and the sensitivity parameter value is equal to or less than a threshold value.
    Type: Application
    Filed: June 27, 2017
    Publication date: January 4, 2018
    Inventors: Yasuhiro Kitada, Izumi Hasegawa, Hiroshi Tomita, Kousuke Nakayama, Tadashi Nishiyama
  • Patent number: 9859111
    Abstract: In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit, first to fourth supplying units, and a removing unit. A substrate holding and rotating unit holds a semiconductor substrate, having a convex pattern formed on its surface, and rotates the semiconductor substrate. A first supplying unit supplies a chemical onto the surface of the semiconductor substrate in order to clean the semiconductor substrate. A second supplying unit supplies pure water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A third supplying unit supplies a water repellent agent to the surface of the semiconductor substrate in order to form a water repellent protective film onto the surface of the convex pattern. A fourth supplying unit supplies alcohol, which is diluted with pure water, or acid water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: January 2, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yoshihiro Ogawa, Tatsuhiko Koide, Shinsuke Kimura, Hisashi Okuchi, Hiroshi Tomita
  • Patent number: 9810989
    Abstract: An edge exposure apparatus includes: an imaging unit that images a front surface of a substrate; a substrate holding unit; an exposure unit that exposes an edge portion of the substrate held on the substrate holding unit; a first moving mechanism that moves and rotates the substrate holding unit; a second moving mechanism that moves the exposure unit; and a control unit that controls the first moving mechanism and the second moving mechanism, wherein the first moving mechanism and the second moving mechanism are controlled so as to acquire array information of shots of a pattern on the substrate from a substrate image of a substrate, which has already been subjected to pattern exposure, imaged by the imaging unit, and expose the edge portion of the substrate, based on the acquired array information.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: November 7, 2017
    Assignee: Tokyo Electron Limited
    Inventor: Hiroshi Tomita
  • Patent number: 9673217
    Abstract: According to one embodiment, a semiconductor device includes a stacked body, a semiconductor body, and a stacked film. The stacked body includes a plurality of tungsten layers and a plurality of alloy layers of tungsten and molybdenum. At least portions of the tungsten layers are stacked with an air gap interposed. The alloy layers are provided on surfaces of the tungsten layers opposing the air gap. The semiconductor body extends in a stacking direction through the stacked body. The stacked film is provided between the semiconductor body and the tungsten layers. The stacked film includes a charge storage portion.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: June 6, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Sakata, Yohei Sato, Yasuhito Yoshimizu, Satoshi Wakatsuki, Takeshi Ishizaki, Masayuki Kitamura, Daisuke Ikeno, Tomotaka Ariga, Junichi Wada, Hiroshi Tomita, Hisashi Okuchi, Ryohei Kitao, Toshiyuki Sasaki, Kazuhito Furumoto
  • Patent number: 9583330
    Abstract: A supercritical drying method for a semiconductor substrate is disclosed. The method may include introducing the semiconductor substrate into a chamber in a state, a surface of the semiconductor substrate being wet with alcohol, substituting the alcohol on the semiconductor substrate with a supercritical fluid of carbon dioxide by impregnating the semiconductor substrate to the supercritical fluid in the chamber, and discharging the supercritical fluid and the alcohol from the chamber and reducing a pressure inside the chamber. The method may also include performing a baking treatment by supplying an oxygen gas or an ozone gas to the chamber after the reduction of the pressure inside the chamber.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: February 28, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Linan Ji, Hidekazu Hayashi, Hiroshi Tomita, Hisashi Okuchi, Yohei Sato, Takayuki Toshima, Mitsuaki Iwashita, Kazuyuki Mitsuoka, Gen You, Hiroki Ohno, Takehiko Orii
  • Patent number: 9570286
    Abstract: According to one embodiment, a supercritical drying method for a semiconductor substrate comprises introducing a semiconductor substrate, a surface of the semiconductor substrate being wet with a water-soluble organic solvent, to the inside of a chamber, hermetically sealing the chamber and increasing a temperature inside the chamber to not lower than a critical temperature of the water-soluble organic solvent, thereby bringing the water-soluble organic solvent into a supercritical state, decreasing a pressure inside the chamber and changing the water-soluble organic solvent in the supercritical state to a gas, thereby discharging the water-soluble organic solvent from the chamber, starting a supply of an inert gas into the chamber as the pressure inside the chamber decreases to atmospheric pressure, and cooling the semiconductor substrate in a state where the inert gas exists inside the chamber.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: February 14, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yohei Sato, Hisashi Okuchi, Hiroshi Tomita, Hidekazu Hayashi, Linan Ji
  • Publication number: 20160358768
    Abstract: According to one embodiment, a method for fabricating a semiconductor device includes performing a back surface processing to remove at least one of a scratch and a foreign material formed on a back surface of a substrate to be processed, a front surface of the substrate being retained in a non-contact state, contacting the back surface of the substrate to a stage to be retained, and providing a pattern on the front surface of the substrate by using lithography.
    Type: Application
    Filed: August 19, 2016
    Publication date: December 8, 2016
    Inventors: Masako KODERA, Hiroshi TOMITA, Takeshi NISHIOKA
  • Publication number: 20160351417
    Abstract: In accordance with an embodiment, a substrate treatment method includes bringing a first metallic film on a substrate into contact with a first liquid, mixing a second liquid into the first liquid, and bringing the first metallic film or a second metallic film different from the first metallic film into contact with a liquid in which the first liquid and the second liquid are mixed together to etch the first or second metallic film. The first liquid includes an oxidizing agent, a complexing agent, and water (H2O) of a first content rate to etch the first metallic film. The second liquid includes water (H2O) at a second content rate higher than the first content rate after the etching has started.
    Type: Application
    Filed: January 6, 2016
    Publication date: December 1, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuya Akeboshi, Hiroshi Tomita, Hisashi Okuchi, Yasuhito Yoshimizu, Hiroaki Yamada
  • Patent number: 9500811
    Abstract: Disclosed is an optical circuit including a transparent plate, which is light-transmittable, and a light shielding plate, which is adhered to the transparent plate with an adhesive and has an opening through which incident light passes, and in which the aspect facing to the opening has, on the side opposite to the transparent plate, projections in an overhang shape toward the center of the opening.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: November 22, 2016
    Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Hiroshi Tomita, Kenji Kobayashi, Naoki Ooba, Toru Miura
  • Publication number: 20160271640
    Abstract: A method for adjusting a chemical liquid supply device of supplying a chemical liquid through a nozzle for removing a coating film on a peripheral portion of a substrate having the coating film formed on a surface thereof and horizontally held by a holding table is provided. The method includes discharging the chemical liquid from the nozzle, performing, by an image pickup part, continuous image pickup on a region including a leading end of the nozzle and a region in which the chemical liquid discharged from the leading end forms a liquid stream in the air, acquiring area change data representing a temporal change in area of the chemical liquid in an image pickup region based on an image pickup result obtained by the image pickup part, and adjusting a supply control device installed in a chemical liquid supply path connected to the nozzle based on the area change data.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 22, 2016
    Inventors: Hiroshi TOMITA, Shinichi MIZUSHINO
  • Patent number: 9437416
    Abstract: According to one embodiment, a supercritical drying method for a semiconductor substrate includes introducing a semiconductor substrate formed with a metal film into a chamber, the surface of the substrate being wet with alcohol, supplying a supercritical fluid of carbon dioxide into the chamber, setting a temperature inside the chamber to a predetermined temperature, to replace the alcohol on the semiconductor substrate with the supercritical fluid, and discharging the supercritical fluid and the alcohol from the chamber while keeping the temperature inside the chamber at the predetermined temperature, to lower a pressure inside the chamber. The predetermined temperature is not lower than 75° C. but lower than a critical temperature of the alcohol.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: September 6, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidekazu Hayashi, Hiroshi Tomita, Yukiko Kitajima, Hisashi Okuchi, Yohei Sato
  • Publication number: 20160246187
    Abstract: An edge exposure apparatus includes: an imaging unit that images a front surface of a substrate; a substrate holding unit; an exposure unit that exposes an edge portion of the substrate held on the substrate holding unit; a first moving mechanism that moves and rotates the substrate holding unit; a second moving mechanism that moves the exposure unit; and a control unit that controls the first moving mechanism and the second moving mechanism, wherein the first moving mechanism and the second moving mechanism are controlled so as to acquire array information of shots of a pattern on the substrate from a substrate image of a substrate, which has already been subjected to pattern exposure, imaged by the imaging unit, and expose the edge portion of the substrate, based on the acquired array information.
    Type: Application
    Filed: February 4, 2016
    Publication date: August 25, 2016
    Inventor: Hiroshi TOMITA
  • Patent number: 9417529
    Abstract: In one embodiment, a coating and developing apparatus includes a processing block having two early-stage coating unit blocks, two later-stage coating unit blocks and two developing unit blocks, each unit blocks being vertically stacked on each other, The apparatus has at least two operation modes M1 and M2 adapted for abnormality. In mode M1 the processing module that processed the abnormal substrate in the developing unit blocks is identified, and subsequent substrates are transported to the processing module or modules, of the same type as the identified processing module, other than the identified processing module. In mode M2, the developing unit block that processed the abnormal substrate is identified, and subsequent substrates are transported to the developing unit block other than the identified developing unit block.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: August 16, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Nobuaki Matsuoka, Akira Miyata, Shinichi Hayashi, Suguru Enokida, Hiroshi Tomita, Makoto Hayakawa, Tatsuhei Yoshida
  • Patent number: 9364904
    Abstract: A variable lead end mill has a plurality of peripheral cutting edges with different helix angles, the variable lead end mill having a flute bottom diameter of a plurality of helix flutes making up rake faces of the plurality of the peripheral cutting edges, the flute bottom diameter increasing in an axial direction from a tool tip toward a shank.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: June 14, 2016
    Assignee: OSG Corporation
    Inventors: Jiro Osawa, Tasuku Itoh, Shigetoshi Ukei, Hiroshi Tomita
  • Patent number: 9342880
    Abstract: A potential trouble can be in advance suppressed by analyzing a defect of a wafer. A defect analyzing apparatus of analyzing a defect of a substrate includes an imaging unit configured to image target substrates; a defect feature value extracting unit configured to extract a defect feature value in a surface of the substrate based on the substrate image; a defect feature value accumulating unit configured to calculate an accumulated defect feature value with respect to the substrates to create an accumulation data AH; a defect determination unit configured to determine whether the accumulated defect feature value exceeds a preset critical value; and an output display unit configured to output a determination result from the defect determination unit.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: May 17, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shuji Iwanaga, Tadashi Nishiyama, Hiroshi Tomita, Izumi Hasegawa
  • Patent number: 9323002
    Abstract: One side surface of a diffraction grating is securely held by a holder, and further, the holder is securely supported on a substrate by a supporter in such a manner that the diffraction grating held by the holder is not brought into contact with the substrate. In this manner, the diffraction grating is fixed only onto one side surface to the supporter via the holder, and further, the diffraction grating is not brought into contact with the substrate. Therefore, the lower portion of the supporter is displaced by heat generated in the substrate, however, the displacement of the supporter cannot adversely influence directly on the diffraction grating since the holder is interposed between the displaced portion and the diffraction grating.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: April 26, 2016
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yuji Mitsuhashi, Toshiki Nishizawa, Hiroshi Tomita, Yuzo Ishii, Koichi Hadama
  • Patent number: 9278667
    Abstract: A plurality of driving force transmitting members, a piston, a spring and a gas generator are inserted into the pipe from the end of the pipe where the gas generator is mounted. The gas generator is press-fitted in the pipe while the flat faces thereof are deformed by a pair of protrusions of the pipe. Accordingly, the gas generator is temporarily held by the protrusions of the pipe. Then, one end of the pipe is firmly pressed and the gas generator is mounted in the pipe.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: March 8, 2016
    Assignee: TAKATA CORPORATION
    Inventors: Hiroshi Tomita, Yuichiro Hodatsu
  • Publication number: 20160049289
    Abstract: In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit, first to fourth supplying units, and a removing unit. A substrate holding and rotating unit holds a semiconductor substrate, having a convex pattern formed on its surface, and rotates the semiconductor substrate. A first supplying unit supplies a chemical onto the surface of the semiconductor substrate in order to clean the semiconductor substrate. A second supplying unit supplies pure water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A third supplying unit supplies a water repellent agent to the surface of the semiconductor substrate in order to form a water repellent protective film onto the surface of the convex pattern. A fourth supplying unit supplies alcohol, which is diluted with pure water, or acid water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate.
    Type: Application
    Filed: October 28, 2015
    Publication date: February 18, 2016
    Inventors: Yoshihiro OGAWA, Tatsuhiko KOIDE, Shinsuke KIMURA, Hisashi OKUCHI, Hiroshi TOMITA
  • Patent number: 9229337
    Abstract: A method of setting an exposure apparatus to expose exposure sectors defined on a resist film formed on a surface of a substrate with proper values of an exposure amount and a focus value for forming a pattern having a predetermined dimension includes exposing and developing an exposure sector defined on a reference substrate by a first exposure apparatus having a first state, and imaging the same. The method exposes and develops exposure sectors defined on an inspection substrate by a second exposure apparatus having a second state where at least one of the exposure amount and the focus value is unknown, and forms and images a pattern on the inspection substrate. The method determines the proper values for the exposure amount and the focus value for the second state based on luminance of the exposure sector of reference data and luminances of the exposure sectors of inspection data.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: January 5, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinobu Miyazaki, Hiroshi Tomita, Shuji Iwanaga
  • Publication number: 20150371845
    Abstract: In one embodiment, a surface treatment apparatus for a semiconductor substrate includes a holding unit, a first supply unit, a second supply unit, a third supply unit, a drying treatment unit, and a removal unit. The holding unit holds a semiconductor substrate with a surface having a convex pattern formed thereon. The first supply unit supplies a chemical solution to the surface of the semiconductor substrate, to perform cleaning and oxidation. The second supply unit supplies pure water to the surface of the semiconductor substrate, to rinse the semiconductor substrate. The third supply unit supplies a water repelling agent to the surface of the semiconductor substrate, to form a water repellent protective film on the surface of the convex pattern. The drying treatment unit dries the semiconductor substrate. The removal unit removes the water repellent protective film while making the convex pattern remain.
    Type: Application
    Filed: August 26, 2015
    Publication date: December 24, 2015
    Inventors: Tatsuhiko KOIDE, Shinsuke Kimura, Yoshihiro Ogawa, Hisashi Okuchi, Hiroshi Tomita