Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

Abstract: In an internal combustion engine, on a cylinder head side, a tumble flow is formed that is directed from an intake vent opened on the cylinder head to an exhaust vent opened on the cylinder head. A direct injection valve injects fuel directly into a combustion space. The direct injection valve injects the fuel toward a section where a piston top surface intersects with a cylinder inner surface, at a point closer to an intake top dead center than a middle between the intake top dead center and an intake bottom dead center, and thereafter injects the fuel into the combustion space again.

Abstract: An operational amplifier includes a first amplifier to which an input signal is applied, and a second amplifier to which an output of the first amplifier is applied, wherein the second amplifier includes a first transistor including a gate to which the output of the first amplifier is applied, and a second transistor including a gate to which the output of the first amplifier is applied, and a drain coupled to a source of the first transistor.

Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

Abstract: An A/D conversion circuit including a plurality of resistor elements connected in series between a low-potential power supply and a high-potential power supply. The A/D conversion circuit includes a plurality of comparators that compare a reference voltage divided by each of the resistor elements with an analog input voltage, the comparators having a sample-and-hold function for holding a sampled analog input voltage. The plurality of comparators also include a high-order bit comparator and a low-order bit comparator having different sampling sources. The high-order bit comparator may be configured to compare the analog input voltage and one of the reference voltages to obtain a determination result. The low-order bit comparator may old the analog voltage from the time that the low-order bit comparator retrieves the analog input voltage until the low-order bit comparator performs comparison.

Abstract: A differential amplifier circuit of simple circuit configuration is disclosed, which is capable of releasing an output signal within a voltage range independent of the voltage range of a differential input signal. The differential amplifier circuit 1 includes: NMOS transistors N1, N2 that constitute a first differential pair configured to input a differential input voltage; a resistor element Ra connected to drain terminals X1, X2 of the NMOS transistors N1, N2; an op-amp OP having input terminals connected to the drain terminals X1, X2; and NMOS transistors N3, N4 that constitute a second differential pair configured to input an output voltage of the op-amp OP and a reference voltage. The drain terminals of the first differential pair are connected to drain terminals, respectively, of the second differential pair.

Abstract: A digital-analog converter including a first selection circuit of switch elements, which are coupled to each other and to a high potential power supply, and a second selection circuit of switch elements, which are coupled to each other and to a low potential power supply. First and second voltage dividing circuit each include series-connected resistor elements, each coupled between adjacent switch elements of the corresponding selection circuit. A control circuit provides a control signal to the selection circuits to activate one of the switch elements in each selection circuit and couple the activated switch element to the corresponding potential power supply. The first and second voltage dividing circuits divide voltages of the high and low potential power supplies with the resistor elements between the activated switch elements.

Abstract: A touch panel includes a first support, a second support, a first resistive layer formed on the first support, a second resistive layer formed on the second support, a first conductor pattern including a first electrode portion that extends in a first direction, and a first end portion and a second end portion opposite thereto, a second conductor pattern including a second electrode portion that extends in a second direction that intersects with the first direction, and a first end portion and a second end portion opposite thereto, a first structure layer that is formed on the first resistive layer adjacently to the first end portion of the first conductor pattern, and has a thickness that is gradually reduced in proportion to a distance from the first end portion, and a bonding layer including a first bonding surface and a second bonding surface.

Abstract: A level shift circuit for sustaining the activation and inactivation response of a transistor with respect to an input signal in a preferable manner. The level shift circuit includes a shift circuit for converting an input signal having a first voltage to an output signal having a second voltage that is higher than the first voltage. The voltage generation circuit includes a control voltage generation circuit, for generating control voltage having a generally constant voltage level irrespective of the level of a power supply voltage, and a bias generation circuit. The bias generation circuit generates bias voltage so that the node voltage of the shift circuit is substantially equalized with the control voltage.

Abstract: A differential amplifier circuit of simple circuit configuration is disclosed, which is capable of releasing an output signal within a voltage range independent of the voltage range of a differential input signal. The differential amplifier circuit 1 includes: NMOS transistors N1, N2 that constitute a first differential pair configured to input a differential input voltage; a resistor element Ra connected to drain terminals X1, X2 of the NMOS transistors N1, N2; an op-amp OP having input terminals connected to the drain terminals X1, X2; and NMOS transistors N3, N4 that constitute a second differential pair configured to input an output voltage of the op-amp OP and a reference voltage. The drain terminals of the first differential pair are connected to drain terminals, respectively, of the second differential pair.

Abstract: The present invention provides pharmaceutical compositions which can achieve good state of glycemic control and correct postprandial hyperglycemia and early morning fasting hyperglycemia. The present pharmaceutical composition is for administration before meal to prevent or inhibit the progression of diabetic complication, which comprises 5 to 45 mg, as a single dose, of mitiglinide or a pharmaceutically acceptable salt thereof, or a hydrate thereof (for example, mitiglinide calcium salt hydrate). And said compositions are extremely useful for prevention or inhibition of progression of, for example, diabetic microvascular complications and arteriosclerotic diseases, because the frequency of adverse drug reactions such as hypoglycemic symptoms and gastrointestinal disorders is low.

Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

Abstract: A digital-analog converter including a first selection circuit of switch elements, which are coupled to each other and to a high potential power supply, and a second selection circuit of switch elements, which are coupled to each other and to a low potential power supply. First and second voltage dividing circuit each include series-connected resistor elements, each coupled between adjacent switch elements of the corresponding selection circuit. A control circuit provides a control signal to the selection circuits to activate one of the switch elements in each selection circuit and couple the activated switch element to the corresponding potential power supply. The first and second voltage dividing circuits divide voltages of the high and low potential power supplies with the resistor elements between the activated switch elements.

Abstract: A piezoelectric element including a vibrating plate, a lower electrode, a piezoelectric film and an upper electrode laminated in this order, wherein the lower electrode, the upper electrode and the piezoelectric film are formed by a perovskite type oxide while the vibrating plate is formed by a metal oxide, and a junction interface is substantially absent between the vibrating plate and the lower electrode, between the lower electrode and the piezoelectric film and between the piezoelectric film and the upper electrode.

Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

Abstract: A level shift circuit including a capacitor, a charge control circuit, and a limiting circuit. The charge control circuit is connected to the capacitor to provide the voltage of a high potential power supply to the capacitor and to control the charging of the capacitor. The limiting circuit is connected to the high potential power supply and the charge control circuit to limit the voltage provided to the capacitor from the high potential power supply before the charge control circuit stops providing the voltage of the high potential power supply to the capacitor.

Abstract: A compact and highly accurate A/D converter includes series-connected computation cells, the number of which is equal to the number for bits in an output signal. The first computation cell includes a first comparison unit for subtracting a reference current from a first input current to generate a first current, and a second comparison unit for subtracting a second input current from the reference current to generate a second current. The second computation cell includes first and second comparison units having the same configurations as those in the first computation cell. The computation cells of latter stages have the same configurations as the second computation cell. Current mirror circuits included in the first and second comparison units of each computation cell generate the first and second currents. Each computation cell outputs a current having an absolute value in accordance with one of the first and second currents.

Abstract: A web material feeding apparatus has a suction plate 24 provided near an outlet of a reservoir box 2. The suction plate 24 can be shifted in the direction across a feeding path for tip paper C, by operation of a motor 76. The feeding apparatus also has a sensor unit 96 provided at the upstream side of a receiving drum 12. The sensor unit 96 supplies a detection signal to a controller 120. When the controller 120 detects meandering of the tip paper C on the basis of the detection signal supplied from the sensor unit 96, the controller 120 actuates the motor 76 to shift the suction plate 24 to thereby correct the meandering of the tip paper C.

Abstract: In a piezoelectric element having a piezoelectric film sandwiched between a lower electrode and an upper electrode, the lower electrode and/or the upper electrode and the piezoelectric film comprise perovskite oxide and a contact interface between the lower electrode and/or the upper electrode and the piezoelectric film does not exist and a region where crystals of the lower electrode and/or the upper electrode and crystals of the piezoelectric film are mixed exists between the lower electrode and/or the upper electrode and the piezoelectric film.

Abstract: A level shift circuit for sustaining the activation and inactivation response of a transistor with respect to an input signal in a preferable manner. The level shift circuit includes a shift circuit for converting an input signal having a first voltage to an output signal having a second voltage that is higher than the first voltage. The voltage generation circuit includes a control voltage generation circuit, for generating control voltage having a generally constant voltage level irrespective of the level of a power supply voltage, and a bias generation circuit. The bias generation circuit generates bias voltage so that the node voltage of the shift circuit is substantially equalized with the control voltage.