Patents by Inventor Hisao Suzuki
Hisao Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20040129917Abstract: A composition for forming piezoelectric film comprising a dispersoid obtained from a metal compound, wherein the total content of the elemental halogens, halogen ions and halogen compounds contained in the composition is 10 ppm or less.Type: ApplicationFiled: September 22, 2003Publication date: July 8, 2004Applicants: Canon Kabushiki Kaisha, Fuji Chemical Co. Ltd.Inventors: Makoto Kubota, Motokazu Kobayashi, Hisao Suzuki, Fumio Uchida, Chiemi Shimizu, Kenji Maeda
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Publication number: 20040124482Abstract: In a piezoelectric element having a piezoelectric film sandwiched between a lower electrode and an upper electrode, the lower electrode and/or the upper electrode and the piezoelectric film comprise perovskite oxide and a contact interface between the lower electrode and/or the upper electrode and the piezoelectric film does not exist and a region where crystals of the lower electrode and/or the upper electrode and crystals of the piezoelectric film are mixed exists between the lower electrode and/or the upper electrode and the piezoelectric film.Type: ApplicationFiled: September 16, 2003Publication date: July 1, 2004Applicants: CANON KABUSHIKI KAISHA, FUJI CHEMICAL CO. LTDInventors: Motokazu Kobayashi, Makoto Kubota, Hisao Suzuki, Fumio Uchida, Chiemi Shimizu, Kenji Maeda
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Publication number: 20040108351Abstract: A web material feeding apparatus has a suction plate 24 provided near an outlet of a reservoir box 2. The suction plate 24 can be shifted in the direction across a feeding path for tip paper C, by operation of a motor 76. The feeding apparatus also has a sensor unit 96 provided at the upstream side of a receiving drum 12. The sensor unit 96 supplies a detection signal to a controller 120. When the controller 120 detects meandering of the tip paper C on the basis of the detection signal supplied from the sensor unit 96, the controller 120 actuates the motor 76 to shift the suction plate 24 to thereby correct the meandering of the tip paper C.Type: ApplicationFiled: December 5, 2003Publication date: June 10, 2004Inventors: Hisao Suzuki, Syozo Horikawa, Hiroshi Okamoto, Takayuki Irikura, Hiroyuki Yoshinari
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Patent number: 6719239Abstract: An automatic splicing system is provided that includes a motor (20a) for rotating an active roll (R1) while a web (P1) is drawn from the roll (R1) toward a cigarette rod-manufacturing machine, a motor (20b) for rotating a standby roll (R2) when a residual of the roll (R1) reaches a predetermined amount or less so that a web (P2) is fed from the roll (R2), a splicing section (70) splicing the webs (P1; P2) and changing over the feeding of web from the roll (R1) to the roll (R2) when feed speeds of the webs match each other, and suction casings (42) disposed on feed paths of the webs, respectively, the suction casings drawing the webs thereinto temporarily. The rotational speeds of the motors (20a and 20b) are controlled so as to maintain drawn amounts of the webs in the respective suction casings (42) within a predetermined range.Type: GrantFiled: April 16, 2003Date of Patent: April 13, 2004Assignee: Japan Tobacco Inc.Inventors: Hisao Suzuki, Fumio Kubo, Shozo Horikawa
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Patent number: 6707412Abstract: There is provided an A/D converter circuit capable of high-speed operation without fluctuation of reference voltage due to comparison operation by high-order comparators influencing voltage level of reference voltage of voltage comparison by low-order comparators. First switches SW11A, SW12A, and SW13A and second switches SW11B, SW12B, and SW13B are arranged between reference voltage terminals (REF) of high-order comparators COMP 11, 12, and 13 and voltage-divided terminals (N1), (N2), and (N3) of ladder-resistance-element array, respectively. Voltage holding capacitance elements C11, C12, and C13 are connected to connection points between the first switches SW11A, SW12A, and SW13A and the second switches SW11B, SW12B, and SW13B. When input voltage VAIN is fetched, the first switches SW11A, SW12A, and SW13A are turned on so as to fetch high-order reference voltage VN1, VN2, and VN3 to the voltage holding capacitance elements C11, C12, and C13.Type: GrantFiled: October 2, 2002Date of Patent: March 16, 2004Assignee: Fujitsu LimitedInventor: Hisao Suzuki
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Publication number: 20030222806Abstract: This invention provides an AD converter circuit and an AD conversion method capable of executing AD conversion up to the lowest bit properly even under a high-speed operation. The AD converter circuit 1 comprises high-order-comparators D1-D3, low-order comparator D0 and a comparison reference voltage source 10 having seven reference voltage output points V1-V3, Va-Vd. The reference voltage output points V1-V3 are connected to the reference voltage terminals of the high-order-comparators D1-D3. The reference voltage output points Va-Vd are connected to a point A having parasitic capacitance through analog switches SWA-SWD. The point A is connected to the reference voltage terminal of the low-order comparator D0 through an analog switch SW2 and an input voltage VIN through an analog switch SWE.Type: ApplicationFiled: February 10, 2003Publication date: December 4, 2003Applicant: FUJITSU LIMITEDInventors: Shogo Ito, Hisao Suzuki
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Publication number: 20030218559Abstract: It is intended to provide an A/D converter circuit with which, by using a clock signal, on the basis of an analog voltage inputted a predetermined time past, it is possible to select suitably comparators to be operated and comparators to be rested, and which has small consumed power. A parallel-type A/D-converter circuit 200 converts an analog voltage VIN to a digital value DOUT at intervals of a predetermined period by means of a clock signal CLK using chopper-type comparators 1-7. The comparators 1-7 can each be set by first and second setting signals CONT1A etc. to either of an operating state and a resting state. A comparator control circuit section 211 performs logical processing on the comparator outputs OUT1-OUT7 in the preceding conversion to generate the first and second setting signals CONT1A etc., and brings some of the comparators to the operating state and holds the remaining comparators in the resting state.Type: ApplicationFiled: May 1, 2003Publication date: November 27, 2003Applicant: FUJITSU LIMITEDInventors: Hisao Suzuki, Shogo Itoh
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Patent number: 6651615Abstract: A direct fuel injection-type spark-ignition internal combustion engine is disclosed. The engine comprises a fuel injector for injecting fuel as a spray in nearly the shape of a fan having a relative small thickness, a spark plug and a cavity formed on the top surface of a piston. The cavity has a long and narrow groove-like shape. The spray is injected by the fuel injector such that the spray is almost parallel with the center axis of the piston, and impinges in the cavity. The spark plug is arranged in the upper portion of the cylinder to face the cavity.Type: GrantFiled: August 1, 2001Date of Patent: November 25, 2003Assignee: Toyota Jidosha Kabushiki KaishaInventors: Hisao Suzuki, Terutoshi Tomoda, Mutsumi Kanda, Toshimi Kashiwagura, Fumito Chiba, Sachio Mori, Satoshi Taniguchi
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Publication number: 20030206059Abstract: An operational amplifier circuit includes a first differential pair, which includes first and second transistors, and a second differential pair, which includes third and fourth transistors. A fifth transistor is connected to the first and third transistors. A sixth transistor is connected to the second and fourth transistors. A first current source is connected to the first differential pair to provide a first bias current. A second current source is connected to the second differential pair to provide a second bias current. A third current source is connected to the fifth transistor to provide a third bias current. A fourth current source is connected to the sixth transistor provide a fourth bias current. A control circuit controls the first to fourth current sources such that the sum of the first and second bias currents is constant and the second to fourth bias currents become substantially equal.Type: ApplicationFiled: June 4, 2003Publication date: November 6, 2003Applicant: Fujitsu LimitedInventor: Hisao Suzuki
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Publication number: 20030206060Abstract: An operational amplifier circuit includes a first differential pair, which includes first and second transistors, and a second differential pair, which includes third and fourth transistors. A fifth transistor is connected to the first and third transistors. A sixth transistor is connected to the second and fourth transistors. A first current source is connected to the first differential pair to provide a first bias current. A second current source is connected to the second differential pair to provide a second bias current. A third current source is connected to the fifth transistor to provide a third bias current. A fourth current source is connected to the sixth transistor provide a fourth bias current. A control circuit controls the first to fourth current sources such that the sum of the first and second bias currents is constant and the second to fourth bias currents become substantially equal.Type: ApplicationFiled: June 4, 2003Publication date: November 6, 2003Applicant: Fujitsu LimitedInventor: Hisao Suzuki
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Publication number: 20030194107Abstract: The method of assembling a speaker includes disposing a quantity of volatile magnetic fluid containing a pre-determined amount of lubricating oil into a radial gap of a driver unit, aligning a vibration system having a diaphragm and a voice coil to the driver unit such that the voice coil is movably mounted into the radial gap, fixing the vibration system to the driver unit, and removing the volatile component of the volatile magnetic fluid. The speaker includes a driver unit having a magnetic pole case defining a radial gap, a vibration system having a diaphragm and a voice coil where the vibration system is fixed to the drive unit and the voice coil is movably mounted into the radial gap, and a residual magnetic fluid layer disposed on the surfaces of one or more of the magnetic pole case and the voice coil where an air gap exists between the voice coil and the magnetic pole case.Type: ApplicationFiled: June 17, 2002Publication date: October 16, 2003Inventors: Shiro Tsuda, Hisao Suzuki
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Publication number: 20030194106Abstract: The method of assembling a micro-speaker includes disposing a quantity of volatile magnetic fluid into a radial gap of a driver unit, aligning a vibration system having a diaphragm and a voice coil to the driver unit such that the voice coil is accommodated into the radial gap, fixing the vibration system to the driver unit, and removing the volatile component of the volatile magnetic fluid. The micro-speaker includes a driver unit having a housing, a magnet disposed within the housing forming a radial gap between the magnet and the circumferential walls of the housing, and a magnetic plate disposed on the magnet, a vibration system having a diaphragm and a voice coil where the vibration system is fixed to the drive unit and the voice coil protrudes into the radial gap, and a volatile magnetic fluid in the radial gap about the voice coil.Type: ApplicationFiled: April 11, 2002Publication date: October 16, 2003Inventors: Shiro Tsuda, Hisao Suzuki
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Publication number: 20030184465Abstract: There is provided an A/D converter circuit capable of high-speed operation without fluctuation of reference voltage due to comparison operation by high-order comparators influencing voltage level of reference voltage of voltage comparison by low-order comparators. First switches SW11A, SW12A, and SW13A and second switches SW11B, SW12B, and SW13B are arranged between reference voltage terminals (REF) of high-order comparators COMP 11, 12, and 13 and voltage-divided terminals (N1), (N2), and (N3) of ladder-resistance-element array, respectively. Voltage holding capacitance elements C11, C12, and C13 are connected to connection points between the first switches SW11A, SW12A, and SW13A and the second switches SW11B, SW12B, and SW13B. When input voltage VAIN is fetched, the first switches SW11A, SW12A, and SW13A are turned on so as to fetch high-order reference voltage VN1, VN2, and VN3 to the voltage holding capacitance elements C11, C12, and C13.Type: ApplicationFiled: October 2, 2002Publication date: October 2, 2003Applicant: Fujitsu LimitedInventor: Hisao Suzuki
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Publication number: 20030173450Abstract: There is provided an automatic splicing system comprising a motor (20a) for rotating an active roll (R1) while a web (P1) is drawn from the roll (R1) toward a cigarette rod-manufacturing machine, a motor (20b) for rotating a standby roll (R2) when a residual of the roll (R1) reaches a predetermined amount or less so that a web (P2) is fed from the roll (R2), a splicing section (70) splicing the webs (P1; P2) and changing over the feeding of web from the roll (R1) to the roll (R2) when feed speeds of the webs match each other, and suction casings (42) disposed on feed paths of the webs, respectively, the suction casings drawing the webs thereinto temporarily; wherein rotational speeds of the motors (20a and 20b) are controlled so as to maintain drawn amounts of the webs in the respective suction casings (42) within a predetermined range.Type: ApplicationFiled: April 16, 2003Publication date: September 18, 2003Inventors: Hisao Suzuki, Fumio Kubo, Shozo Horikawa
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Patent number: 6621322Abstract: A level shift circuit which reliably shifts the level of a low-voltage input signal by using a high breakdown voltage element. The level shift circuit includes an input inverter circuit which receives an input signal and inverts the input signal to generate a first inverter signal, a voltage generating circuit which generates at least one intermediate voltage by voltage-dividing a voltage higher than a voltage of the input signal, a level shift inverter circuit which receives the intermediate voltage and the input signal, and an output inverter circuit. The level shift inverter circuit inverts the input signal to generate a level shift signal having an intermediate voltage. The output inverter circuit inverts the level shift signal to generate a level shift output signal.Type: GrantFiled: March 25, 2002Date of Patent: September 16, 2003Assignee: Fujitsu LimitedInventor: Hisao Suzuki
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Patent number: 6605993Abstract: An operational amplifier circuit includes a first differential pair, which includes first and second transistors, and a second differential pair, which includes third and fourth transistors. A fifth transistor is connected to the first and third transistors. A sixth transistor is connected to the second and fourth transistors. A first current source is connected to the first differential pair to provide a first bias current. A second current source is connected to the second differential pair to provide a second bias current. A third current source is connected to the fifth transistor to provide a third bias current. A fourth current source is connected to the sixth transistor provide a fourth bias current. A control circuit controls the first to fourth current sources such that the sum of the first and second bias currents is constant and the second to fourth bias currents become substantially equal.Type: GrantFiled: January 26, 2001Date of Patent: August 12, 2003Assignee: Fujitsu LimitedInventor: Hisao Suzuki
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Patent number: 6590514Abstract: A D/A converter circuit that converts a digital signal to an analog signal within a short period of time. The A/D converter circuit has a plurality of resistors, which are connected in series between a high potential power supply and a low potential power supply, a first switch group, and a second switch group. The first switch group is formed. by switches, which are connected to nodes between the resistors. The second switch group is formed by switches, which are also connected to the nodes. A decoder circuit is connected to the switch groups to selectively close one of the first switches and one of the second switches.Type: GrantFiled: October 10, 2001Date of Patent: July 8, 2003Assignee: Fujitsu LimitedInventor: Hisao Suzuki
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Publication number: 20030094988Abstract: A level shift circuit which reliably shifts the level of a low-voltage input signal by using a high breakdown voltage element. The level shift circuit includes an input inverter circuit which receives an input signal and inverts the input signal to generate a first inverter signal, a voltage generating circuit which generates at least one intermediate voltage by voltage-dividing a voltage higher than a voltage of the input signal, a level shift inverter circuit which receives the intermediate voltage and the input signal, and an output inverter circuit. The level shift inverter circuit inverts the input signal to generate a level shift signal having an intermediate voltage. The output inverter circuit inverts the level shift signal to generate a level shift output signal.Type: ApplicationFiled: March 25, 2002Publication date: May 22, 2003Applicant: FUJITSU LIMITEDInventor: Hisao Suzuki
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Patent number: 6508253Abstract: A belt-type compression molding apparatus for a tobacco stream includes a compression belt integral with a tobacco band for forming the tobacco stream, and the compression belt extends from the tobacco band toward a wrapping section of a cigarette manufacturing machine. The compression belt defines a compression molding passage for the tobacco stream in cooperation with a molding groove of a molding bed for guiding wrapping paper. The compression belt travels at the same speed as the tobacco band and serves as a movable ceiling wall of the compression molding passage.Type: GrantFiled: February 6, 2001Date of Patent: January 21, 2003Assignee: Japan Tobacco Inc.Inventors: Yutaka Okumoto, Hisao Suzuki
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Publication number: 20020158787Abstract: A D/A converter circuit that converts a digital signal to an analog signal within a short period of time. The A/D converter circuit has a plurality of resistors, which are connected in series between a high potential power supply and a low potential power supply, a first switch group, and a second switch group. The first switch group is formed by switches, which are connected to nodes between the resistors. The second switch group is formed by switches, which are also connected to the nodes. A decoder circuit is connected to the switch groups to selectively close one of the first switches and one of the second switches.Type: ApplicationFiled: October 10, 2001Publication date: October 31, 2002Applicant: Fujitsu LimitedInventor: Hisao Suzuki