Abstract: An imaging element incorporates a memory and a processor. The memory stores image data obtained by performing imaging at a first frame rate. The processor is configured to output the image data at a second frame rate. In addition, the processor derives shake degree information indicating a degree of shake included in an image indicated by the image data, using the image data, and outputs the derived shake degree information at a rate greater than or equal to the second frame rate. The first frame rate is a frame rate greater than or equal to the second frame rate.

Abstract: A key exchange technique of performing a key exchange among N (?2) parties, which can conceal metadata on communication, is provided. A key exchange method includes: a first key generation step in which a communication device Ui generates a first key; a first anonymous broadcast step in which the communication device Ui anonymously broadcasts the first key with a set R?{Ui} being designated for i?{1, . . . , n} and the communication device Ui anonymously broadcasts the first key with ? being designated for i?{n+1, . . . , N}; a second key generation step in which the communication device Ui generates a second key; a second anonymous broadcast step in which the communication device Ui anonymously broadcasts the second key with the set R?{Ui} being designated for i?{1, . . . , n} and the communication device Ui anonymously broadcasts the second key with ? being designated for i?{n+1, . . . , N}; and a session key generation step in which the communication device Ui generates a session key SK for i?{1, . . .

Abstract: A battery monitoring device includes: a pair of terminals for measuring voltage or current of a battery, and to which a filter unit including a capacitive element is connected; an AD converter that measures a waveform of voltage between the terminals during charging or discharging of the capacitive element; and a time constant calculation unit that calculates a time constant of the filter unit based on the waveform measured. The AD converter is, for example, a first AD converter or a second AD converter. The filter unit is, for example, a first filter unit or a second filter unit.

Abstract: The present invention relates to a medicament for treating or preventing central nervous system disease whose cause is related to abnormal aggregation of proteins in the brain, which comprises as an active ingredient a compound of formula (1) or a pharmaceutically acceptable salt thereof, wherein R1 and R2 are hydrogen, etc., R3 and R4 are hydrogen, C1-6 alkyl, etc., R5 is halogen, C1-6 alkyl, etc., R6 is hydrogen, halogen, etc., X is oxygen, etc., Y is carbon, etc., m and n are an integer of 0, 1, etc., r and s are 0, 1, 2, etc., Hy is pyridine ring, etc., which has an action of suppressing or reducing the accumulation of abnormal aggregation of proteins in the brain.

Abstract: An analog-to-digital conversion circuit includes: a first variable gain amplifier connected to an input terminal; a first AD converter connected to the first variable gain amplifier; a second variable gain amplifier connected to the input terminal; a second AD converter connected to the second variable gain amplifier; a selection circuit to which an output of the first AD converter and an output of the second AD converter are input, and which selects one of the outputs; and a control circuit that controls a gain change period of the first variable gain amplifier and a gain change period of the second variable gain amplifier in a relative manner.

Abstract: A printing device includes: a printing unit printing on a recording paper; a feeder unit having a roller that rotates about a shaft and feeds the recording paper and a motor that rotates the shaft; a detection unit detecting the rotation of the shaft; and a control unit controlling the printing unit. The control unit calculates an electrifying time during which the printing unit is electrified and a non-electrifying time during which the printing unit is not electrified following the electrifying time, based on a detection signal from the detection unit. When the calculated non-electrifying time is less than a predetermined time, the control unit corrects the non-electrifying time in such a way that the non-electrifying time becomes equal to or longer than the predetermined time, and causes the printing unit to print.

Abstract: A battery anomaly detection device includes: an alternating-current (AC) impedance measurer that measures AC impedance of a battery cell; and an anomaly determiner that determines whether the AC impedance is within a reference range, and when the AC impedance is not within the reference range, determines that the battery cell is an anomalous cell.

Abstract: An imaging element includes a reading circuit that reads out pixel data obtained by imaging a subject at a first frame rate, a memory that stores the read pixel data, and an output circuit that outputs image data based on the stored pixel data at a second frame rate. The first frame rate is a frame rate higher than the second frame rate. The pixel data includes phase difference pixel data and non-phase difference pixel data different from the phase difference pixel data. The reading circuit reads out the pixel data of each of a plurality of frames in parallel within an output period defined by the second frame rate as a period in which the image data of one frame is output, and performs reading of the non-phase difference pixel data and a plurality of reading of the phase difference pixel data within the output period.

Abstract: A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.

Abstract: A semiconductor device of an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first electrode film provided on the first insulating film, a second electrode film provided on the first electrode film, and a first field plate electrode provided on the second electrode film. A lower end of the first field plate electrode is located on a second surface of the first electrode film, the second surface being in contact with the second electrode film, rather than a first surface of the first electrode film, the first surface being in contact with the first insulating film.

Abstract: A semiconductor device includes a nitride semiconductor element, a first diode, and a second diode; the nitride semiconductor element includes a conductive mounting bed, a semiconductor substrate formed on the mounting bed, a first nitride semiconductor layer, a second nitride semiconductor layer, a first major electrode, a second major electrode, a first gate electrode, and a second gate electrode; the first diode includes a first anode electrode electrically connected to the mounting bed, and a first cathode electrode electrically connected to the first major electrode; and the second diode includes a second anode electrode electrically connected to the mounting bed, and a second cathode electrode electrically connected to the second major electrode.

Abstract: A battery state estimation device includes: a first state of charge (SOC) calculator that calculates a first SOC using a first method that uses the battery model parameter of a battery; a second SOC calculator that calculates a second SOC using a second method different from the first method; an alternating-current (AC) impedance measurement unit that measures the AC impedance of the battery when the error between the first SOC and the second SOC is greater than a predetermined threshold; and a battery model parameter calculator that calculates a battery model parameter using the measured AC impedance. The first SOC calculator recalculates the first SOC using the battery model parameter calculated.

Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.

Abstract: A battery management circuit includes: a reference signal generator that generates a first reference frequency signal and a second reference frequency signal having a phase different from a phase of the first reference frequency signal; an alternating-current superimposer that superimposes an alternating current on the secondary battery, the alternating current having a frequency component of the first reference frequency signal; a voltage measurer that measures a voltage of the secondary battery by performing sampling using a frequency; a current measurer that measures a current of the secondary battery by performing sampling using a frequency; and a converter that converts each of results of measurements by the voltage measurer and the current measurer into a complex voltage and a complex current, by multiplying the result of the measurement by the first reference frequency signal and the second reference frequency signal.

Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor layer having a heterojunction, a second semiconductor layer on the first semiconductor layer and having another heterojunction, a drain electrode on the second semiconductor layer, a source electrode provided on the first semiconductor layer, a gate electrode provided on the first semiconductor layer between the drain electrode and the source electrode, and a first insulating film between the gate electrode and the drain electrode covering the first semiconductor layer and the second semiconductor layer. The second semiconductor layer being separated from the gate electrode by a portion of the insulating film. A distance from the second semiconductor layer to the gate electrode is shorter than a distance from the drain electrode to the gate electrode.

Abstract: The present disclosure relates to a medium processing apparatus, including: a banknote device configured to process a banknote, including a banknote device door arranged at an opening of a safe box and being movable between an open position and a closed position; a banknote device lock configured to switch the banknote device door between a locked state and an unlocked state, a loose coin device configured to process a loose coin, including a loose coin device door arranged at an opening of a safe box and being movable between an open position and a closed position; a loose coin device lock configured to switch the loose coin device door between a locked state and an unlocked state, wherein the banknote device lock and the loose coin device lock perform a switching between the locked state and the unlocked state independently from each other.

Abstract: An imaging apparatus includes a storage portion that stores captured image data obtained by imaging a subject by an imaging element and is incorporated in the imaging element, an output portion that is incorporated in the imaging element, and a plurality of signal processing portions that are disposed outside the imaging element, in which the output portion includes a plurality of output lines each disposed in correspondence with each of the plurality of signal processing portions and outputs each of a plurality of pieces of image data into which the captured image data stored in the storage portion is divided, to a corresponding signal processing portion among the plurality of signal processing portions from the plurality of output lines, and any of the plurality of signal processing portions combines the plurality of pieces of image data.

Abstract: A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.

Abstract: An analog-to-digital conversion circuit includes: a variable gain amplifier; a delta-sigma modulator that modulates an output of the variable gain amplifier to a pulse density modulation (PDM) signal; and a decimation filter that downsamples the PDM signal to output a first digital signal that is converted into a multi-bit digital signal. The decimation filter includes: a weight change unit that converts the PDM signal into a second digital signal that is weighted by multiplying a weight of the PDM signal by a reciprocal of an amplification factor of the variable gain amplifier; and a first digital filter that receives the second digital signal as an input, and outputs the first digital signal.

Abstract: A cell stack management system includes a cell monitoring unit that measures an output voltage of a plurality of power storage cells, a battery management unit that manages a cell stack, and a first communication network that connects the cell monitoring unit and the battery management unit. The battery management unit includes: a first communication circuit connected to the first communication network; a second communication circuit connected to a second communication network for connecting to a higher-level system; a control circuit that controls the battery management unit; and a control circuit power supply. The cell stack management system includes a normal mode and a low-power mode as modes of operation. During transition from the low-power mode to the normal mode, the first communication circuit activates at least one of the control circuit power supply, the control circuit, or the second communication circuit.