Patents by Inventor Hitoshi Kobayashi

Hitoshi Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11464150
    Abstract: The information processing device is a device used in a mounting system configured as a production line including a mounting device configured to mount components on a board. The information processing device comprises: a control section configured to obtain the operator workload to be performed within a time block between a first point-in-time and a second point-in-time based on correspondence information linking work content and operator working time required for the work content, and the production job of the production line; create a workload table linking the time block and the workload; and output the created workload table.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: October 4, 2022
    Assignee: FUJI CORPORATION
    Inventors: Hitoshi Kobayashi, Junichi Kako
  • Publication number: 20220310490
    Abstract: A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.
    Type: Application
    Filed: September 2, 2021
    Publication date: September 29, 2022
    Inventors: Akira YOSHIOKA, Hung HUNG, Yasuhiro ISOBE, Toru SUGIYAMA, Hitoshi KOBAYASHI
  • Publication number: 20220302294
    Abstract: A semiconductor device of an embodiment includes: a semiconductor layer including an element region and an element isolation region; a first insulation film provided on the semiconductor layer; a first electrode provided on the first insulation film and extending in a first direction; a second electrode provided on the semiconductor layer, arranged in a second direction intersecting with the first direction, and extending in the first direction; a third electrode provided on the semiconductor layer, arranged in the second direction, and extending in the first direction; second insulation films provided between the first insulation film and the semiconductor layer, and interposing the third electrode in the second direction; a first field plate electrode provided on the first electrode and connected to the first electrode; a second field plate electrode provided on the first field plate electrode and connected to the second electrode; and a third field plate electrode provided on the third electrode and connec
    Type: Application
    Filed: September 9, 2021
    Publication date: September 22, 2022
    Inventors: Hitoshi KOBAYASHI, Yasuhiro ISOBE, Hung HUNG
  • Publication number: 20220292931
    Abstract: The present disclosure relates to a medium processing apparatus, including: a banknote device configured to process a banknote, including a banknote device door arranged at an opening of a safe box and being movable between an open position and a closed position; a banknote device lock configured to switch the banknote device door between a locked state and an unlocked state; a loose coin device configured to process a loose coin, including a loose coin device door arranged at an opening of a safe box and being movable between an open position and a closed position; a loose coin device lock configured to switch the loose coin device door between a locked state and an unlocked state, wherein the banknote device lock and the loose coin device lock perform a switching between the locked state and the unlocked state independently from each other.
    Type: Application
    Filed: March 10, 2021
    Publication date: September 15, 2022
    Inventors: Kazuhiko Takahashi, Takaaki Imoto, Hirofumi Tougo, Hitoshi Kobayashi
  • Patent number: 11364806
    Abstract: Provided is a control apparatus for an electric vehicle, which is capable of suppressing simultaneous slip of front and rear wheels. The control apparatus for an electric vehicle includes a control portion configured to control a front electric motor and a rear electric motor so that an achievement rate of a torque command with respect to a target torque in one motor of the front and rear electric motors is lower than the achievement rate in the other motor of the front and rear electric motors.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: June 21, 2022
    Inventors: Keisuke Suzuki, Hitoshi Kobayashi, Kazuya Takahashi
  • Publication number: 20220190622
    Abstract: A power storage system includes: a power storage device including a cell stack including power storage cells connected in series; and a charging device that supplies a charging current to the power storage device. The power storage system further includes: an alternating current excitating circuit in the power storage device or the charging device that excitates the charging current using an alternating current; a complex impedance measuring unit in the power storage device that measures a current value of the alternating current used to excitate the charging current and a voltage value of each of the power storage cells, and measures a complex impedance of each of the power storage cells from the measured current and voltage values; and a charging control unit in the power storage device or the charging device that controls the charging current based on the complex impedance.
    Type: Application
    Filed: March 1, 2022
    Publication date: June 16, 2022
    Inventor: Hitoshi KOBAYASHI
  • Publication number: 20220120817
    Abstract: A battery management circuit includes: a reference signal generator that generates a first reference frequency signal and a second reference frequency signal having a phase different from a phase of the first reference frequency signal; an alternating-current superimposer that superimposes an alternating current on the secondary battery, the alternating current having a frequency component of the first reference frequency signal; a voltage measurer that measures a voltage of the secondary battery by performing sampling using a frequency; a current measurer that measures a current of the secondary battery by performing sampling using a frequency; and a converter that converts each of results of measurements by the voltage measurer and the current measurer into a complex voltage and a complex current, by multiplying the result of the measurement by the first reference frequency signal and the second reference frequency signal.
    Type: Application
    Filed: December 21, 2021
    Publication date: April 21, 2022
    Inventors: Yu OKADA, Hitoshi KOBAYASHI, Keiichi FUJII
  • Patent number: 11290100
    Abstract: Provided is a semiconductor device including a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode, a fourth electrode, and a second control electrode, a first capacitor having a first end and a second end, a Zener diode having a first anode and a first cathode, a first resistor having a third end and a fourth end, a first diode having a second anode and a second cathode, a second resistor having a fifth end and a sixth end, a second diode having a third anode and a third cathode, and a second capacitor having a seventh end and an eighth end.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: March 29, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hitoshi Kobayashi, Tetsuya Ohno
  • Publication number: 20220093747
    Abstract: A semiconductor device has a first and a second nitride semiconductor layer and a first and a second electrode thereon. A gate electrode is between the first and second electrodes. A gate field plate is on the gate electrode. A first field plate is above a position between the gate field plate and the second electrode. A second field plate is between the first field plate and the gate field plate. A distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to the portion of the gate field plate that protrudes the most towards the second electrode. The distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to an end surface of the first field plate on a first electrode side.
    Type: Application
    Filed: March 3, 2021
    Publication date: March 24, 2022
    Inventors: Tetsuya OHNO, Akira Yoshioka, Toru Sugiyama, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi
  • Publication number: 20220093542
    Abstract: A semiconductor device includes a first electrode on a semiconductor element at a first location and a second electrode on the semiconductor element at a second location spaced from the first location. And insulating film covers the first electrode, the second electrode and a third electrode. First and second pads are on the insulating film. The first electrode contacts the first pad through an opening in a first portion of the insulating film. The second electrode contacts the second pad each through an opening in a second portion of the insulating film. A bonding surface of the first pad is at a first distance above one portion of the insulating film, and a second distance above another. A bonding surface of the second pad likewise at different distances above the insulating film depending on location.
    Type: Application
    Filed: March 2, 2021
    Publication date: March 24, 2022
    Inventor: Hitoshi KOBAYASHI
  • Publication number: 20220085175
    Abstract: A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.
    Type: Application
    Filed: March 2, 2021
    Publication date: March 17, 2022
    Inventors: Akira YOSHIOKA, Yasuhiro ISOBE, Hung HUNG, Hitoshi KOBAYASHI, Tetsuya OHNO, Toru SUGIYAMA
  • Publication number: 20220084916
    Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on t
    Type: Application
    Filed: March 10, 2021
    Publication date: March 17, 2022
    Inventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
  • Publication number: 20220077131
    Abstract: A semiconductor device according to an embodiment includes: a first nitride semiconductor layer having a first surface and a second surface; a first source electrode provided on the first surface; a first drain electrode provided on the first surface; a first gate electrode provided on the first surface between the first source electrode and the first drain electrode; a second nitride semiconductor layer having a third surface and a fourth surface, the third surface being provided on the second surface and facing the second surface, and the second nitride semiconductor layer having a smaller band gap than the first nitride semiconductor layer; and a first semiconductor device having a fifth surface provided on the fourth surface and facing the fourth surface with a size equal to or smaller than a size of the fourth surface, the first semiconductor device including a first semiconductor material having a smaller band gap than the second nitride semiconductor layer.
    Type: Application
    Filed: September 7, 2021
    Publication date: March 10, 2022
    Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA, Toru SUGIYAMA, Hitoshi KOBAYASHI, Tetsuya OHNO, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA
  • Publication number: 20210398053
    Abstract: A work content analyzing apparatus of the present embodiment includes a first database storing state information indicating a state of each of one or a plurality of workers in association with time information and identification information of the worker, an estimation unit estimating the work content executed by the worker on the basis of at least two pieces of state information associated with same time in the state information stored in the first database, a specification unit specifying work time spent for the estimated work content on the basis of the state information stored in the first database and the time information associated with the state information, and an analysis unit analyzing the work content on the basis of the estimated work content and the specified work time.
    Type: Application
    Filed: June 18, 2021
    Publication date: December 23, 2021
    Applicants: DENSO CORPORATION, Toshiba Digital Solutions Corporation
    Inventors: Kazuki YAMAMOTO, Toshiyuki MORISHITA, Jun TAKAHASHI, Hiroki TAKENOUCHI, Ken ISHII, Hitoshi KOBAYASHI, Takashi KUSAKABE, Yuto AKIMOTO
  • Patent number: 11201220
    Abstract: A semiconductor device includes a first nitride semiconductor layer; a second nitride semiconductor layer provided on the first nitride semiconductor layer and having a bandgap larger than a bandgap of the first nitride semiconductor layer; a nitride insulating layer provided between the first nitride semiconductor layer and the second nitride semiconductor layer; a plurality of first drain electrodes each having a part provided on the nitride insulating layer and a part provided beneath the nitride insulating layer; a plurality of second drain electrodes each having a part provided on the nitride insulating layer and a part provided beneath the nitride insulating layer; a plurality of third drain electrodes each having a part provided on the nitride insulating layer and a part provided beneath the nitride insulating layer; a plurality of fourth drain electrodes each having a part provided on the nitride insulating layer and a part provided beneath the nitride insulating layer; a plurality of first source ele
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: December 14, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Hitoshi Kobayashi
  • Patent number: 11186283
    Abstract: Provided is control apparatus for an electric vehicle, which is capable of suppressing simultaneous slip of front and rear wheels. The control apparatus for an electric vehicle controls a front electric motor and a rear electric motor so that a difference between a torque command value of the front electric motor and a torque command value of the rear electric motor is larger than a predetermined value.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: November 30, 2021
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Keisuke Suzuki, Hitoshi Kobayashi, Kazuya Takahashi
  • Patent number: 11188062
    Abstract: A work management device manages a board work line having multiple board work machines for performing work on a board. The work management device includes a problem detection section configured to detect that a problem has occurred in any of the multiple board work machines; a handling method database configured to accumulate handling methods for problems; an updating section configured to update handling methods for problems at any time; and a work instruction section configured to extract and indicate to an operator a handling method for a problem from the handling method database when the problem detection section detects that the problem has occurred.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: November 30, 2021
    Assignee: FUJI CORPORATION
    Inventors: Hitoshi Kobayashi, Junichi Kako, Shinichi Naka, Yusuke Kikuchi
  • Publication number: 20210313815
    Abstract: A battery control system is provided with battery monitoring control circuits for measuring an output voltage of an individual or secondary battery cells, which are connected in an assembled battery divided into blocks; and a control circuit for controlling the battery monitoring control circuits. Each of the batter monitoring control circuits includes a communication interface for communications between the battery monitoring control circuits or communications with the control circuit; a power converter for converting a start-up signal into a DC voltage; and a start-up circuit that receives the DC voltage and generates a start-up control signal for starting the battery monitoring control circuit.
    Type: Application
    Filed: June 16, 2021
    Publication date: October 7, 2021
    Inventor: Hitoshi KOBAYASHI
  • Publication number: 20210257468
    Abstract: A semiconductor device includes a first nitride semiconductor layer; a second nitride semiconductor layer provided on the first nitride semiconductor layer and having a bandgap larger than a bandgap of the first nitride semiconductor layer; a nitride insulating layer provided between the first nitride semiconductor layer and the second nitride semiconductor layer; a plurality of first drain electrodes each having a part provided on the nitride insulating layer and a part provided beneath the nitride insulating layer; a plurality of second drain electrodes each having a part provided on the nitride insulating layer and a part provided beneath the nitride insulating layer; a plurality of third drain electrodes each having a part provided on the nitride insulating layer and a part provided beneath the nitride insulating layer; a plurality of fourth drain electrodes each having a part provided on the nitride insulating layer and a part provided beneath the nitride insulating layer; a plurality of first source ele
    Type: Application
    Filed: September 11, 2020
    Publication date: August 19, 2021
    Inventor: Hitoshi Kobayashi
  • Publication number: 20210194475
    Abstract: Provided is a semiconductor device including: a normally-off transistor having a first electrode, a second electrode, and a first control electrode; a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode; a first capacitor having a first end and a second end electrically connected to the second control electrode; a Zener diode having a first anode and a first cathode, the first anode being electrically connected to the second end and the second control electrode, and the first cathode being electrically connected to the third electrode; a first resistor having a third end and a fourth end electrically connected to the first control electrode; a first diode having a second anode and a second cathode, the second anode being electrically connected to the third end; a second resistor having a fifth end electrically connected to the second cathode and a sixth end electrically connected to the fourth end and the first cont
    Type: Application
    Filed: September 4, 2020
    Publication date: June 24, 2021
    Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hitoshi Kobayashi, Tetsuya Ohno