Abstract: The invention and method enable the astigmatism correction at each crossing point of a cross hatch pattern, thereby making high-resolution display possible. An appropriate voltage or current for controlling the magnetic field adjusting coils are generated from the correction data stored in a memory. The voltage or current generated are then applied to two poles, four poles or six poles during scanning of the screen.

Abstract: There is provided a method for forming a capacitor of a semiconductor device capable of improving an oxygen diffusion prevention characteristic and preventing leak current from increasing. The invention is characterized that a lower electrode is formed from a double layer comprising a Pt film and Ir film in forming a dielectric layer having a high dielectric characteristic on a lower electrode.

Abstract: Disclosed is a digitally controlled dynamic convergence correction device for correcting arbitrary convergence astigmatism on a screen in a deflection yoke of a CRT picture device. The invention provides a method for controlling digital dynamic convergence and a system thereof to perform individual and independent correction of the convergence for each crossing point of a cross hatch pattern on a screen by receiving correction data from outside and storing the same in memory, reading the correction data from the memory, and converting the correction data to a voltage or a current so as to have a structure of outputting to magnetic field adjusting coils. The invention enables a worker to approach controlling of the convergence with respect to the control points defined by each crossing point on a screen of a cross hatch pattern.

Abstract: The present invention discloses a method of manufacturing a capacitor in a semiconductor device which is directed to solve the problem of reduction of capacitance occurring when manufacturing a capacitor of a MIS structure using poly-silicon as an underlying electrode and metal as an upper electrode in a capacitor using Ta2O5 as a dielectric film. In order to solve the problem, the present invention forms an underlying electrode using metal having a good oxide-resistant such as TiSiN. Thus, the present invention could not only lower the thickness of the effective oxide film of Ta2O5 when depositing Ta2O5 or performing a thermal process for crystallization but also prevent increase of a leak current due to oxidization of the underlying electrode and the diffusion prevention film, thus securing the capacitance of the capacitor and improving the electric characteristic of the capacitor.

Abstract: The present invention provides a method for fabricating a ferroelectric memory device to reduce manufacturing cost and to obtain the electric characteristic of capacitor. The method comprises the steps of: forming an intermetal insulating layer provided with a contact hole exposing a junction region formed on a semiconductor layer having the junction region; forming a contact plug within the contact hole; forming a barrier layer and a metal layer for lower electrode on the intermetal insulating layer successively; forming a lower electrode by patterning selected portions of the metal layer for lower electrode and the barrier layer; forming a high dielectric layer on the substrate on which the lower electrode is formed; and forming an upper electrode on the high dielectric layer, wherein during forming the upper electrode, an F ion layer to be trapped by dangling bonds formed at an interface between the upper electrode and the high dielectric layer, is formed at the interface.

Abstract: The present invention provides a method for fabricating a ferroelectric memory device capable of preventing formation of an oxide layer between a BST layer and a storage node electrode with using a general electrode that is easy to etch, as a storage node electrode. The method comprises the steps of: forming successively a barrier layer and a metal layer for storage node electrode on the intermetal insulating layer; forming a storage node electrode by patterning the metal layer for storage node electrode and the barrier layer to be contact with the contact plug; depositing a ferroelectric layer on the storage node electrode and the intermetal insulating layer at a temperature that the storage node electrode is not oxidized; crystallizing the ferroelectric layer; and forming a plate electrode on the ferroelectric layer, wherein the ferroelectric layer is deposited at temperature of 100˜400° C. according to the MOCVD method.

Abstract: The present invention provides a method for fabricating a capacitor of a semiconductor memory device to improve the characteristic of step coverage during depositing upper electrode, and simultaneously to prevent impurities remained between upper electrode and high dielectric layer.