Patents by Inventor Hoon Han

Hoon Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11912804
    Abstract: A core-shell copolymer, a method of making the same, and a thermoplastic resin composition including the same are disclosed herein. In some embodiments, a core-shell copolymer includes a core and a shell surrounding the core, the core includes a conjugated diene-based monomer-derived repeating unit and a phosphate-based cross-linking agent-derived cross-linking part represented by Formula 1, and the shell includes a first alkyl (meth)acrylate monomer-derived repeating unit, a second alkyl (meth)acrylate monomer-derived repeating unit, and a sulfonate-based ionic monomer-derived repeating unit represented by Formula 2. The core is 68 parts to 92 parts and the shell is 8 parts to 32 parts, based on 100 parts of the core-shell copolymer, the core has a swell index of 2.7 to 10.9, the shell includes 1 wt % to 16 wt % of the sulfonate-based ionic monomer-derived repeating unit, and the shell has a weight average molecular weight of 105,000 g/mol to 645,000 g/mol.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: February 27, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Kwang Jin Lee, Yoon Ho Kim, Sang Il Nam, Kyung Bok Sun, Chang No Lee, Sang Hoon Han
  • Publication number: 20240063279
    Abstract: A semiconductor device includes a gate stack including a gate insulating layer and a gate electrode on the gate insulating layer. The gate insulating layer includes a first dielectric layer and a second dielectric layer on the first dielectric layer, and a dielectric constant of the second dielectric layer is greater than a dielectric constant of the first dielectric layer. The semiconductor device also includes a first spacer on a side surface of the gate stack, and a second spacer on the first spacer, wherein the second spacer includes a protruding portion extending from a level lower than a lower surface of the first spacer towards the first dielectric layer, and a dielectric constant of the second spacer is greater than the dielectric constant of the first dielectric layer and less than a dielectric constant of the first spacer.
    Type: Application
    Filed: October 27, 2023
    Publication date: February 22, 2024
    Inventors: Doosan Back, Dongoh Kim, Gyuhyun Kil, Jung-Hoon Han
  • Publication number: 20240062808
    Abstract: A nonvolatile memory device includes a first lower interlayer insulation layer and a second lower interlayer insulation layer that are sequentially stacked in a first direction; a lower metal layer disposed in the first lower interlayer insulation layer; and a plurality of lower bonding metals disposed in the first lower interlayer insulation layer and the second lower interlayer insulation layer and spaced apart from each other in a second direction that intersects the first direction. An uppermost surface in the first direction of the lower metal layer is lower than an uppermost surface in the first direction of the plurality of lower bonding metals, and the lower metal layer is placed between the plurality of lower bonding metals.
    Type: Application
    Filed: September 4, 2023
    Publication date: February 22, 2024
    Inventors: Kohji KANAMORI, Sang Youn JO, Jee Hoon HAN
  • Patent number: 11910613
    Abstract: A semiconductor memory device includes a mold structure including a plurality of wordlines on a front side of a first substrate, and a string selection line and a stopper line on the plurality of wordlines. A channel structure extends in a vertical direction to penetrate the mold structure. A block separation area extends in a first direction to cut the mold structure. A protective structure is interposed between the block separation area and the stopper line and not between the block separation area and the string selection line and not between the block separation area and the plurality of wordlines. A string separation structure extends in the first direction to cut the string selection line and the stopper line. A bitline extends in a second direction on the mold structure. A bitline contact connects the channel structure and the bitline.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo Joon Ryu, Hee Suk Kim, Jeong Yong Sung, Jee Hoon Han
  • Patent number: 11907690
    Abstract: Disclosed are an electronic terminal apparatus and an operating method thereof. The present invention relates to an electronic terminal apparatus equipped with a UI development tool, which is able to provide an automatic UI component creation function through an image analysis of a UI design plan, and an operating method thereof.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: February 20, 2024
    Assignee: TOBESOFT CO., LTD.
    Inventor: Jung Hoon Han
  • Publication number: 20240057336
    Abstract: A semiconductor memory device includes; a lower stacked structure including lower metallic lines stacked in a first direction on a substrate, an upper stacked structure including a first upper metallic line and a second upper metallic line sequentially stacked on the lower stacked structure, a vertical structure penetrating the upper stacked structure and lower stacked structure and including a channel film, a connection pad disposed on the vertical structure, contacted with the channel film and doped with N-type impurities, a first cutting line cutting the lower metallic lines, the first upper metallic line and the second upper metallic line, a second cutting line spaced apart from the first cutting line in a second direction different from the first direction, and cutting the lower metallic lines, the first upper metallic line and the second upper metallic line, and sub-cutting lines cutting the first upper metallic line and the second upper metallic line between the first cutting line and the second cuttin
    Type: Application
    Filed: October 23, 2023
    Publication date: February 15, 2024
    Inventors: Kohji Kanamori, Jee Hoon Han, Seo-Goo Kang, Hyo Joon Ryu
  • Patent number: 11899025
    Abstract: The present invention relates to a pharmaceutical composition for preventing or treating neurodegenerative diseases comprising a COX2 acetylating agent as an active ingredient and, more particularly, to a pharmaceutical composition for preventing or treating neurodegenerative diseases comprising, as an active ingredient, a COX2 acetylating agent which exhibits an effect of inhibiting the deposition of amyloid-? in brain neurons, reducing excessive neuroinflammatory responses, and increasing the phagocytosis of amyloid-? in microglial cells. The pharmaceutical composition for preventing or treating neurodegenerative diseases comprising the COX2 acetylating agent as an active ingredient has the effects of alleviating neuroinflammation by promoting COX2 acetylation in neurons and secreting specialized pro-resolving mediators (SPMs) and thus, can be very useful in the development of a preventive or therapeutic agent for neurodegenerative diseases.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: February 13, 2024
    Assignee: KYUNGPOOK NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Jae-Sung Bae, Hee Kyung Jin, Ju Youn Lee, Seung Hoon Han
  • Patent number: 11895833
    Abstract: A semiconductor memory device includes a substrate including a cell region, a core region, and a boundary region between the cell region and the core region, a boundary element isolation layer in the boundary region, the boundary element isolation layer being in a boundary element isolation recess and including first and second boundary liner layers extending along a profile of the boundary element isolation recess and a first gate structure on the core region and at least a part of the boundary element isolation layer, wherein the first gate structure includes a first high dielectric layer, and a first gate insulating pattern below the first high dielectric layer, with a top surface of the substrate being a base reference level, the first gate insulating pattern does not overlap a top surface of the first boundary liner layer, and wherein the first gate insulating pattern includes a first_1 gate insulating pattern between a top surface of the second boundary liner layer and a bottom surface of the first high
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: February 6, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong Oh Kim, Gyu Hyun Kil, Jung Hoon Han, Doo San Back
  • Publication number: 20240025410
    Abstract: Disclosed is a hybrid electric vehicle and a method for controlling a creep torque for the hybrid electric vehicle that includes: a first motor connected to an engine, a second motor directly connected to a transmission input terminal, and an engine clutch connected to an engine shaft and the second motor. The method for controlling a creep torque includes: determining an expected charging power that is expected when a target creep torque is generated through a regenerative braking of the second motor; discharging a battery by idling the engine with the first motor while the engine clutch is open when an expected charging power is equal to or greater than a battery charging limit power; and generating the target creep torque via the regenerative braking of the second motor.
    Type: Application
    Filed: December 6, 2022
    Publication date: January 25, 2024
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Hoon Han, Seo Ho Lee, Kwon Chae Chung, Han Nah Song
  • Patent number: 11882688
    Abstract: A semiconductor memory device comprises a substrate, first and second lower electrode groups on the substrate and including a plurality of first and second lower electrodes, respectively, and first and second support patterns on side walls of and connecting each of the first and second lower electrodes, respectively. The first lower electrodes include a first center lower electrode arranged within a hexagonal shape defined by first edge lower electrodes. The second lower electrodes include a second center lower electrode arranged within a hexagonal shape defined by second edge lower electrodes. The first center lower electrode is spaced apart from each of the first edge lower electrodes in different first to third directions. The first support pattern is immediately adjacent to the second support pattern. The first center lower electrode is spaced apart from the second center lower electrode in a fourth direction different from the first to third directions.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: January 23, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hoon Han, Je Min Park
  • Publication number: 20240010184
    Abstract: A method of controlling an electrified vehicle may include determining a traveling environment level; determining a regenerative braking continuation range and a regenerative braking retention amount according to the traveling environment level when a preset deceleration condition is satisfied; and determining whether to maintain a regenerative braking amount as the regenerative braking retention amount based on whether a vehicle speed is included in the regenerative braking continuation range when the vehicle speed is lower than or equal to a preset regenerative braking termination vehicle speed.
    Type: Application
    Filed: December 6, 2022
    Publication date: January 11, 2024
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Min Gyun Jo, Jae Young Choi, Gwang Il Du, Han Nah Song, Chun Hyuk Lee, Hoon Han
  • Publication number: 20240004622
    Abstract: Disclosed are an electronic terminal apparatus and an operating method thereof. The present invention relates to an electronic terminal apparatus equipped with a UI development tool, which is able to provide an automatic UI component creation function through an image analysis of a UI design plan, and an operating method thereof.
    Type: Application
    Filed: March 20, 2023
    Publication date: January 4, 2024
    Applicant: TOBESOFT CO., LTD.
    Inventor: Jung Hoon HAN
  • Publication number: 20240002652
    Abstract: The present invention relates to a graft copolymer, and to a core-shell type graft copolymer comprising: a core comprising a rubbery polymer; and a shell formed by graft polymerizing a graft monomer to the rubbery polymer, wherein the graft copolymer comprises the core in 72 wt % to 83 wt %, the core has an average particle diameter of 250 nm or more, and the shell has a weight average molecular weight of 40,000 g/mol or less, a curable resin composition including the same, and methods of preparing them.
    Type: Application
    Filed: March 2, 2022
    Publication date: January 4, 2024
    Applicant: LG Chem, Ltd.
    Inventors: Min Ah Jeong, Ki Hyun Yoo, Sang Hoon Han, Hye Rim Lee
  • Patent number: 11864384
    Abstract: A nonvolatile memory device includes a mold structure having a stack of word lines on a substrate and first and second string selection lines on the word lines, a first cutting structure through the mold structure, a second cutting structure through the mold structure, the second cutting structure being spaced apart from the first cutting structure, a channel structure penetrating the mold structure to be connected to the substrate, the channel structure being between the first and second cutting structures, a first cutting line cutting through the first string selection line but not through the second string selection line, the first cutting line being between the first and second cutting structures, and a second cutting line cutting through the second string selection line but not through the first string selection line, the second cutting line being between the second cutting structure and the channel structure.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je Suk Moon, Seo-Goo Kang, Young Hwan Son, Kohji Kanamori, Jee Hoon Han
  • Patent number: 11856778
    Abstract: A semiconductor memory device includes; a lower stacked structure including lower metallic lines stacked in a first direction on a substrate, an upper stacked structure including a first upper metallic line and a second upper metallic line sequentially stacked on the lower stacked structure, a vertical structure penetrating the upper stacked structure and lower stacked structure and including a channel film, a connection pad disposed on the vertical structure, contacted with the channel film and doped with N-type impurities, a first cutting line cutting the lower metallic lines, the first upper metallic line and the second upper metallic line, a second cutting line spaced apart from the first cutting line in a second direction different from the first direction, and cutting the lower metallic lines, the first upper metallic line and the second upper metallic line, and sub-cutting lines cutting the first upper metallic line and the second upper metallic line between the first cutting line and the second cuttin
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: December 26, 2023
    Inventors: Kohji Kanamori, Jee Hoon Han, Seo-Goo Kang, Hyo Joon Ryu
  • Publication number: 20230405649
    Abstract: The moving assembly for a recovery guard includes a recovery vessel, including a first recovery vessel surrounding a substrate support, a second recovery vessel, and a lifting driver connected to the first and second recovery vessels and elevating the first and second recovery vessels. The lifting driver includes a first motor and a second motor, a first shaft connected to the first motor and the first recovery vessel and moving in a first direction by driving the first motor, a second shaft connected to the second motor and the second recovery vessel and moving in the first direction by driving the second motor, a first connecting portion connecting the first shaft and the first recovery vessel, and a second connecting portion connecting the second shaft and the second recovery vessel, the second connecting portion including a passage hole through which the first shaft passes.
    Type: Application
    Filed: May 25, 2023
    Publication date: December 21, 2023
    Inventors: Won Sik SON, Sae Hoon HAN, In Ki JUNG, Se Hoon OH, Hyeon Jun LEE
  • Publication number: 20230413453
    Abstract: A circuit board including a contact terminal on a side thereof, a method of fabricating the circuit board, and an electronic device including the circuit board are provided. The circuit board includes: a base layer; a wiring layer formed on the base layer; and a terminal section formed at a level corresponding to the wiring layer, on a first surface and a side surface of one end portion of the base layer.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 21, 2023
    Applicant: STEMCO CO., LTD.
    Inventors: Sung Jin LEE, Kang Dong KIM, Chang Hoon HAN, Chul Ho YOON, Ho Byung KIM, Hyun Woo KIM, Gun Woo SHIN
  • Patent number: 11845403
    Abstract: A roof rack apparatus for a vehicle includes a roof rack mounting bracket, a roof rack stanchion, a roof rack side rail, and a roof rack pad, such that it is possible to ensure structural durability further improved by a fastening force between an insert bolt and a bracket fixing bolt at the time of assembling the roof rack apparatus with a vehicle body. The roof rack mounting bracket is symmetric in a forward/rearward direction and a leftward/rightward direction with respect to a center of the insert bolt, such that the roof rack apparatus may be used in common. An operator may replace the roof rack with a new roof rack without detaching an interior material (head lining) in the vehicle, such that it is possible to prevent damage to the interior material at the time of replacing and repairing the roof rack.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: December 19, 2023
    Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION, JIN WON CO., LTD
    Inventors: Soo Nam Kim, Jin Ho Lee, Sung Min Eom, Chi Ho Han, Sang Hoon Han
  • Patent number: 11847258
    Abstract: There is disclosed an augmented reality (AR) glasses device including: a camera, a transparent display, a communication circuit, a memory storing images of a plurality of external electronic devices, and a processor. The processor may be configured to control the AR glasses device to: acquire an image including an image of at least one external electronic device, acquire running application information of the at least one external electronic device, identify a first external electronic device corresponding to a gaze from among the at least one external electronic device from the acquired image, determine whether a specified application is running in the first external electronic device based on the running application information, and connect to the first external electronic device using a communication circuit, based on the specified application running.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: December 19, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Insik Myung, Shinjae Jung, Inyoung Choi, Hoon Han
  • Patent number: 11843039
    Abstract: A semiconductor device includes a gate stack including a gate insulating layer and a gate electrode on the gate insulating layer. The gate insulating layer includes a first dielectric layer and a second dielectric layer on the first dielectric layer, and a dielectric constant of the second dielectric layer is greater than a dielectric constant of the first dielectric layer. The semiconductor device also includes a first spacer on a side surface of the gate stack, and a second spacer on the first spacer, wherein the second spacer includes a protruding portion extending from a level lower than a lower surface of the first spacer towards the first dielectric layer, and a dielectric constant of the second spacer is greater than the dielectric constant of the first dielectric layer and less than a dielectric constant of the first spacer.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: December 12, 2023
    Inventors: Doosan Back, Dongoh Kim, Gyuhyun Kil, Jung-Hoon Han