Patents by Inventor Hsin-Liang Chen

Hsin-Liang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145398
    Abstract: A carrier structure is provided, in which at least one positioning area is defined on a chip-placement area of a package substrate, and at least one alignment portion is disposed on the positioning area. Therefore, the precision of manufacturing the alignment portion is improved by disposing the positioning area on the chip-placement area, such that the carrier structure can provide a better alignment mechanism for the chip placement operation.
    Type: Application
    Filed: December 8, 2022
    Publication date: May 2, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Cheng-Liang HSU, Wan-Rou CHEN, Hsin-Yin CHANG, Tsung-Li LIN, Hsiu-Jung LI, Chiu-Lien LI, Fu-Quan XU, Yi-Wen LIU, Chih-Chieh SUN
  • Publication number: 20240088195
    Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Yu WEI, Yen-Liang LIN, Kuo-Cheng LEE, Hsun-Ying HUANG, Hsin-Chi CHEN
  • Publication number: 20240071888
    Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
  • Publication number: 20240047552
    Abstract: The present disclosure provides an embodiment of a method. The method includes patterning a substrate to form trenches; etching the substrate, thereby modifying the trenches with round tips; forming a stack including conductive layers and dielectric layers in the trenches, wherein the conductive layers and the dielectric layers alternate with one another within the stack; forming an insulating compressive film in the first trenches, thereby sealing voids in the trenches; and forming conductive plugs connected to the conductive layers, respectively.
    Type: Application
    Filed: May 17, 2023
    Publication date: February 8, 2024
    Inventors: Fu-Chiang Kuo, Hsin-Liang Chen, Hsin-Li Cheng, Ting-Chen Hsu
  • Publication number: 20230352404
    Abstract: The present disclosure describes a structure with a substrate, a circuit element, a first metallization layer, and a second metallization layer. The circuit element is formed on the substrate. The first metallization layer is disposed over the substrate and includes a first metal line electrically connected to the circuit element and first dummy metal lines extending along a first direction. The second metallization layer is disposed directly above the first metallization layer and includes a second metal line electrically connected to the first metal line and second dummy metal lines extending along a second direction. The second direction is perpendicular to the first direction.
    Type: Application
    Filed: August 15, 2022
    Publication date: November 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Chiang KUO, Guan Yu Chen, Hsin-Liang Chen
  • Publication number: 20220359169
    Abstract: The present disclosure provides a method for fabricating a semiconductor structure, including placing a wafer on a chuck, wherein the wafer is surrounded by a focus ring, the focus ring is supported by a first actuator, wherein the first actuator is in a cavity defined by the chuck and the edge ring, wherein the first actuator includes an outer ring disposed in the cavity, a piezoelectric layer apart from a top surface of the cavity, wherein an edge of the piezoelectric layer is fixed by the outer ring, and an inner ring disposed in the chamber at a center portion of the piezoelectric layer, performing plasma etch on a surface of the wafer, and controlling a distance between a gas distribution plate and a top surface of the focus ring to be less than a threshold value by the first actuator.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 10, 2022
    Inventors: KEITH KUANG-KUO KOAI, SHIH-KUO LIU, WEN-CHIH WANG, HSIN-LIANG CHEN
  • Publication number: 20220344133
    Abstract: A method for forming a layer includes following operations. A workpiece is received in an apparatus for deposition. The apparatus for deposition includes a chamber, a pedestal disposed in the chamber to accommodate the workpiece, and a ring disposed on the pedestal. The ring includes a ring body having a first top surface and a second top surface and a barrier structure disposed between the first top surface and the second top surface. A vertical distance is defined by a top surface of the barrier structure and a top surface of the workpiece. The vertical distance is between approximately 0 mm and approximately 50 mm. A target disposed in the apparatus for deposition is sputtered. A sputtered material is deposited onto a top surface of the workpiece to form a layer. The barrier structure alters an electrical density distribution during the depositing the sputter material.
    Type: Application
    Filed: July 12, 2022
    Publication date: October 27, 2022
    Inventors: HSIN-LIANG CHEN, WEN-CHIH WANG, CHIA-HUNG LIAO, CHENG-CHIEH CHEN, YI-MING YEH, HUNG-TING LIN, YUNG-YAO LEE
  • Patent number: 11443923
    Abstract: The present disclosure provides an apparatus for fabricating a semiconductor structure, including a chuck, an edge ring surrounding the chuck, wherein the edge ring comprises a cavity, a focus ring adjacent to an edge of the chuck and over the edge ring, and a first actuator in the cavity of the edge ring and engaging with the focus ring.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Keith Kuang-Kuo Koai, Shih-Kuo Liu, Wen-Chih Wang, Hsin-Liang Chen
  • Publication number: 20220139833
    Abstract: A semiconductor device includes: a first conductive structure that comprises a first portion having sidewalls and a bottom surface, wherein the first conductive structure is embedded in a first dielectric layer; and an isolation layer comprising a first portion and a second portion, wherein the first portion of the isolation layer lines the sidewalls of the first portion of the first conductive structure, and the second portion of the isolation layer lines at least a portion of the bottom surface of the first portion of the first conductive structure.
    Type: Application
    Filed: January 6, 2022
    Publication date: May 5, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Liang Chen, Chun-Yen Yeh, Yu-Hsin Fang, Han-Tang Lo
  • Patent number: 11226564
    Abstract: In a method of diagnosing an RF generator of a laser produced plasma extreme ultra violet (LPP EUV) radiation source apparatus, a testing system is connected to the RF generator of the LPP EUV radiation source apparatus. An output power is measured by the testing system with changing an input power of the RF generator. Using a computer system, the measured output power is analyzed. Based on the analyzed measured output power, whether the RF generator is operating properly is determined.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: January 18, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jhan-Hong Yeh, Cheng-Chieh Chen, Jeng-Yann Tsay, Li-Jui Chen, Henry Yee Shian Tong, Wen-Chih Wang, Hsin-Liang Chen
  • Patent number: 11158989
    Abstract: A device includes a laser source, an amplifier, an optical sensor and a spectrometer. The laser source is configured to produce a seed laser beam. The amplifier includes gain medium and a discharging unit. The discharging unit is configured to pump the gain medium for amplifying power of the seed laser beam. The optical sensor is coupled to the amplifier and configured for sensing an optical emission generated in the amplifier while the gain medium is discharging. The spectrometer is coupled with the optical sensor and configured to measure a spectrum of the optical emission.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: October 26, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Henry Yee-Shian Tong, Wen-Chih Wang, Hsin-Liang Chen, Louis Chun-Lin Chang, Cheng-Chieh Chen, Li-Jui Chen, Po-Chung Cheng, Jeng-Yann Tsay
  • Publication number: 20210143078
    Abstract: A semiconductor structure is disclosed. In one example, the semiconductor structure includes: a device region having at least one semiconductor device; a dummy region in contact with the device region; and at least one thermal conductor embedded in the dummy region.
    Type: Application
    Filed: January 22, 2021
    Publication date: May 13, 2021
    Inventors: S.L. Hsin-Liang CHEN, Chen-Hsuan YEN, Han-Tang LO
  • Publication number: 20210090935
    Abstract: The present disclosure provides an apparatus for fabricating a semiconductor structure, including a chuck, an edge ring surrounding the chuck, wherein the edge ring comprises a cavity, a focus ring adjacent to an edge of the chuck and over the edge ring, and a first actuator in the cavity of the edge ring and engaging with the focus ring.
    Type: Application
    Filed: September 25, 2019
    Publication date: March 25, 2021
    Inventors: KEITH KUANG-KUO KOAI, SHIH-KUO LIU, WEN-CHIH WANG, HSIN-LIANG CHEN
  • Publication number: 20200245443
    Abstract: A device includes a laser source, an amplifier, an optical sensor and a spectrometer. The laser source is configured to produce a seed laser beam. The amplifier includes gain medium and a discharging unit. The discharging unit is configured to pump the gain medium for amplifying power of the seed laser beam. The optical sensor is coupled to the amplifier and configured for sensing an optical emission generated in the amplifier while the gain medium is discharging. The spectrometer is coupled with the optical sensor and configured to measure a spectrum of the optical emission.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Henry Yee-Shian TONG, Wen-Chih WANG, Hsin-Liang CHEN, Louis Chun-Lin CHANG, Cheng-Chieh CHEN, Li-Jui CHEN, Po-Chung CHENG, Jeng-Yann TSAY
  • Publication number: 20200161100
    Abstract: An apparatus for PVD is provided. The apparatus includes a chamber, a pedestal disposed in the chamber to accommodate a wafer, and a ring. The ring includes a ring body having a first top surface and a second top surface, and a barrier structure disposed between the first top surface and the second top surface. The barrier structure can further include at least a first portion and a second portion separated from each other. The second vertical distance is equal to or greater than the first vertical distance.
    Type: Application
    Filed: October 15, 2019
    Publication date: May 21, 2020
    Inventors: HSIN-LIANG CHEN, WEN-CHIH WANG, CHIA-HUNG LIAO, CHENG-CHIEH CHEN, YI-MING YEH, HUNG-TING LIN, YUNG-YAO LEE
  • Publication number: 20200132095
    Abstract: A fool-proof housing is configured for a first mounting piece which includes a first fool-proof recess or a second mounting piece which includes a second fool-proof recess to be disposed thereon. The fool-proof housing includes a casing and a fool-proof element. The fool-proof element includes a fool-proof protrusion. The fool-proof element is movably disposed on the casing and includes a first position and a second position. When the fool-proof element is in the first position, the casing is configured for the first mounting piece to be mounted thereon, and the fool-proof protrusion blocks the second mounting piece from mounted on the casing. When the fool-proof element is in the second position, the casing is configured for the second mounting piece to be mounted thereon, and the fool-proof protrusion blocks the first mounting piece from mounted on the casing.
    Type: Application
    Filed: December 1, 2018
    Publication date: April 30, 2020
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Hsin-Liang CHEN, Chih-Wei CHIANG, Yu Wen LEE
  • Patent number: 10624196
    Abstract: A device includes a laser source, an amplifier, an optical sensor and a spectrometer. The laser source is configured to produce a seed laser beam. The amplifier includes gain medium and a discharging unit. The discharging unit is configured to pump the gain medium for amplifying power of the seed laser beam. The optical sensor is coupled to the amplifier and configured for sensing an optical emission generated in the amplifier while the gain medium is discharging. The spectrometer is coupled with the optical sensor and configured to measure a spectrum of the optical emission.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: April 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Henry Yee-Shian Tong, Wen-Chih Wang, Hsin-Liang Chen, Louis Chun-Lin Chang, Cheng-Chieh Chen, Li-Jui Chen, Po-Chung Cheng, Jeng-Yann Tsay
  • Publication number: 20200107428
    Abstract: A device includes a laser source, an amplifier, an optical sensor and a spectrometer. The laser source is configured to produce a seed laser beam. The amplifier includes gain medium and a discharging unit. The discharging unit is configured to pump the gain medium for amplifying power of the seed laser beam. The optical sensor is coupled to the amplifier and configured for sensing an optical emission generated in the amplifier while the gain medium is discharging. The spectrometer is coupled with the optical sensor and configured to measure a spectrum of the optical emission.
    Type: Application
    Filed: January 8, 2019
    Publication date: April 2, 2020
    Inventors: Henry Yee-Shian TONG, Wen-Chih WANG, Hsin-Liang CHEN, Louis Chun-Lin CHANG, Cheng-Chieh CHEN, Li-Jui CHEN, Po-Chung CHENG, Jeng-Yann TSAY
  • Patent number: 10600775
    Abstract: An electrostatic discharge protection device includes: a semiconductor substrate; an N-type doped well on the substrate, the N-type doped well including a first N+ region and a first P+ region; a P-type doped well on the substrate, the P-type doped well including a second N+ region, a third N+ region, and a second P+ region between the second N+ region and the third N+ region; and a first contact positioned above a surface of the N-type doped well between the first N+ region and the first P+ region.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: March 24, 2020
    Assignee: Macronix International Co., Ltd.
    Inventors: Hsin-Liang Chen, Tzu-Yi Hung, Min-Hsin Wu
  • Publication number: 20200004159
    Abstract: In a method of diagnosing an RF generator of a laser produced plasma extreme ultra violet (LPP EUV) radiation source apparatus, a testing system is connected to the RF generator of the LPP EUV radiation source apparatus. An output power is measured by the testing system with changing an input power of the RF generator. Using a computer system, the measured output power is analyzed. Based on the analyzed measured output power, whether the RF generator is operating properly is determined.
    Type: Application
    Filed: May 7, 2019
    Publication date: January 2, 2020
    Inventors: Jhan-Hong YEH, Cheng-Chieh CHEN, Jeng-Yann TSAY, Li-Jui CHEN, Yee-Shian Henry TONG, Wen-Chih WANG, Hsin-Liang CHEN