Abstract: A method for digital phase detection, comprises the steps of: providing a reference clock; receiving a feedback clock; determining a timing difference between the reference clock and the feedback clock; determining a polarity that indicates the leading or lagging relationship between the reference clock and the feedback clock; adaptively selecting one of at least two operating modes for generating a quantized level indicative of the timing difference, wherein in a first operating mode the quantized level is a constant maximum value and wherein in a second operating mode the quantized level is proportional to the timing difference; and generating a digital phase detection output as a combination of the polarity and the quantized level.

Abstract: A power control circuit for supplying power for a computer component of a computer includes first to sixth switches. In response to the computer changing to a normal work state, a power state signal changes from low level to high level and a motherboard state signal is at high level, the fourth switch is turned on, the fifth switch is turned off, and the sixth switch is turned on, and power of the computer component is stably supplied by a system power supply. The motherboard state signal and the power state signal are at low level in response to the computer changing to a sleep state, the second switch is turned off, the first and third switches are turned on, and power of the computer component is stably supplied by a standby power supply.

Abstract: An exemplary power supply system and method for a motherboard includes a power circuit providing power for a south bridge, and a controller having first and second transistors. An input terminal of the power circuit is connected to a power supply. An output terminal of the power circuit is connected to a reset pin of the south bridge. A first terminal of the first transistor is configured for receiving a control signal from the south bridge. A second terminal of the first transistor is connected to a first terminal of the second transistor. A second terminal of the second transistor is connected to the reset pin of the south bridge. Each of the first and second transistors has a third terminal grounded.

Abstract: The invention provides a radiation-curable alkoxy silanized hyperbranched polyester acrylate, characterized in that the radiation-curable alkoxy silanized hyperbranched polyester acrylate is produced by using a hyperbranched molecule with at least 16 functionalities as a core; acrylating or methacrylating a portion of the terminal groups of the hyperbranched molecule; and terminating a portion of the end groups of the hyperbranched molecule with an isocyanated silane coupling agent. The acrylate of the invention can be formed into a coating on polar substrates, such as glass or metal, or used as an adhesive.

Abstract: An exemplary power supply control circuit includes a first electric switch, a second electric switch, a third electric switch, a power supply, and an output terminal. The first electric switch has a first terminal connected to an SIO chip to receive a control signal. When the control signal is at a high level, the first electric switch is turned on, the second electric switch is turned off, the third electric switch is turned off, and the output terminal outputs no power supply. When the control signal is at a low level, the first electric switch is turned off, the second electric switch is turned on, the third electric switch is turned on, and the output terminal outputs the power supply.

Abstract: An exemplary voltage regulating circuit for a motherboard includes a selecting switch and a first switch module, the selecting switch comprising a first input terminal arranged to receive a standby power provided by a power supply, a first control terminal arranged to receive a state signal from the motherboard via a first switch module controlled by a power good signal generated by the power supply, and an output terminal, wherein, when the motherboard is turned off, the state signal is at a high level and the first switch module is turned on by the power good signal for turning off the selecting switch to stop outputting the standby power.

Abstract: A computer system includes a power supply, a timing control circuit including a delay module, and a south bridge chip. The power supply outputs necessary voltages to the computer system and a first power good signal. The necessary voltages include a system voltage. The timing control circuit generates a second power good signal to the south bridge chip according to the first power good signal. The first power good signal is delayed a first time to be effective after voltages of the system voltage rise to a rated value. The second power good signal is generated after the first power good signal is delayed a second time by the delay module. The first power good signal indicates that the necessary voltages are ready in response to being effective. The second power good signal indicates that necessary input powers of the south bridge chip are ready in response to being effective.

Abstract: An exemplary method for controlling rotation speed of a computer fan includes: judging the type of a fan by comparing two rotation speeds detected before and after changing a duty cycle of a PWM signal respectively; controlling the computer fan as a 4-pin fan the PWM signals if the rotation speeds are different; and controlling the computer fan as a 3-pin fan via voltage signals converted from the PWM signals if the rotation speeds are equal. And an exemplary circuit for controlling rotation speed of a computer fan is capable of controlling rotation speed of the 4-pin fan via PWM signals, and controlling rotation peed of the 3-pin fan via voltage signals converted from PWM signals.

Abstract: A circuit for controlling rotation speed of a computer fan includes a fan connector providing for controlling the rotation speed of the computer fan, a rotation speed detector providing for detecting the rotation speed of the computer fan, a BIOS chip connected to the fan connector via the rotation speed detector and provided for receiving, and comparing rotation speed signals from the rotation speed detector, a super I/O chip connected to the BIOS chip and provided for outputting either a PWM signal or another PWM signal to be converted to a voltage signal to control rotation speed of the computer fan according to the result of the comparison, a integrated circuit connected to the super I/O chip and the fan connector and configured for converting the another PWM signal to an analog voltage signal.

Abstract: A network overclock control circuit for a computer includes an RC circuit, first and second comparator circuits, and first and second switch circuits. A signal pin of a network indicating lamp is connected to input terminals of the first and second comparator circuits via the RC circuit. Output terminals of the first and second comparator circuits are respectively connected to first and second clock pins of a clock chip via the first and second switch circuits. When network has little traffic, the first and second comparator circuits control the first and second switch circuits to output low level signals. When network has medium to high traffic, the first and second comparator circuits control the first and second switch circuits to output high and low level signals. When network is overloaded, the first and second comparator circuits control the first and second switch circuits to output high level signals.

Abstract: A power control circuit for supplying power for a computer component of a computer includes first to sixth switches. In response to the computer changing to a normal work state, a power state signal changes from low level to high level and a motherboard state signal is at high level, the fourth switch is turned on, the fifth switch is turned off, and the sixth switch is turned on, and power of the computer component is stably supplied by a system power supply. The motherboard state signal and the power state signal are at low level in response to the computer changing to a sleep state, the second switch is turned off, the first and third switches are turned on, and power of the computer component is stably supplied by a standby power supply.

Abstract: A circuit for controlling rotation speed of a computer fan includes a fan header for connecting to a 4-pin fan or a 3-pin fan, a jumper device, an amplifier, and a controller. The jumper device has a first pin for receiving a controlling signal, and connected to a first power source, a second pin connected to the fan header, and a third pin connected to the first power source. The amplifier has an input terminal connected to the third pin of the jumper device via an integrator. The controller has a first terminal connected to an output terminal of the amplifier, a second terminal connected to a second power source, and a third terminal connected to the fan header and connected to a positive input terminal of the amplifier via a resistor. The first pin of the jumper device is selectively connected to the second or third pin.

Abstract: A power supply circuit for a pulse width modulation controller includes a first resistor and an electric switch having first, second, and third terminals. The first terminal is capable of receiving a control signal of a computer. The second terminal is connected to a stand-by power supply of the computer. The third terminal is connected to the pulse width modulation controller via the first resistor.

Abstract: An exemplary device for controlling rotation speed of a computer fan includes an identifying device and a control circuit. The identifying device is configured for identifying the type of the computer fan. The control circuit configured for controlling rotation speed of the computer fan includes an electric switch, an integrated circuit, a first output terminal, and a second output terminal. The electric switch has a first terminal coupled to the identifying device to receive an identifying signal, a second terminal coupled to a super I/O chip to receive a PWM signal. The integrated circuit is configured to convert the PWM signal to an analog voltage signal. The first output terminal is configured to output the PWM signal to a PWM control pin of a fan header. The second output terminal is configured to output the analog voltage signal to a power pin of the fan header.

Abstract: An exemplary power supply control circuit includes a first electric switch, a second electric switch, a third electric switch, a power supply, and an output terminal. The first electric switch has a first terminal connected to an SIO chip to receive a control signal. When the control signal is at a high level, the first electric switch is turned on, the second electric switch is turned off, the third electric switch is turned off, and the output terminal outputs no power supply. When the control signal is at a low level, the first electric switch is turned off, the second electric switch is turned on, the third electric switch is turned on, and the output terminal outputs the power supply.

Abstract: An exemplary power supply system and method for a motherboard includes a power circuit providing power for a south bridge, and a controller having first and second transistors. An input terminal of the power circuit is connected to a power supply. An output terminal of the power circuit is connected to a reset pin of the south bridge. A first terminal of the first transistor is configured for receiving a control signal from the south bridge. A second terminal of the first transistor is connected to a first terminal of the second transistor. A second terminal of the second transistor is connected to the reset pin of the south bridge. Each of the first and second transistors has a third terminal grounded.

Abstract: An exemplary device for controlling rotation speed of a computer fan includes an identifying device and a control circuit. The identifying device is configured for identifying the type of the computer fan. The control circuit configured for controlling rotation speed of the computer fan includes an electric switch, an integrated circuit, a first output terminal, and a second output terminal. The electric switch has a first terminal coupled to the identifying device to receive an identifying signal, a second terminal coupled to a super I/O chip to receive a PWM signal. The integrated circuit is configured to convert the PWM signal to an analog voltage signal. The first output terminal is configured to output the PWM signal to a PWM control pin of a fan header. The second output terminal is configured to output the analog voltage signal to a power pin of the fan header.

Abstract: A circuit for controlling rotation speed of a computer fan includes a fan header for connecting to a 4-pin fan or a 3-pin fan, a jumper device, an amplifier, and a controller. The jumper device has a first pin for receiving a controlling signal, and connected to a first power source, a second pin connected to the fan header, and a third pin connected to the first power source. The amplifier has an input terminal connected to the third pin of the jumper device via an integrator. The controller has a first terminal connected to an output terminal of the amplifier, a second terminal connected to a second power source, and a third terminal connected to the fan header and connected to a positive input terminal of the amplifier via a resistor. The first pin of the jumper device is selectively connected to the second or third pin.

Abstract: A circuit for controlling rotation speed of a computer fan includes a fan connector providing for controlling the rotation speed of the computer fan, a rotation speed detector providing for detecting the rotation speed of the computer fan, a BIOS chip connected to the fan connector via the rotation speed detector and provided for receiving, and comparing rotation speed signals from the rotation speed detector, a super I/O chip connected to the BIOS chip and provided for outputting either a PWM signal or another PWM signal to be converted to a voltage signal to control rotation speed of the computer fan according to the result of the comparison, a integrated circuit connected to the super I/O chip and the fan connector and configured for converting the another PWM signal to an analog voltage signal.

Abstract: A network overclock control circuit for a computer includes an RC circuit, first and second comparator circuits, and first and second switch circuits. A signal pin of a network indicating lamp is connected to input terminals of the first and second comparator circuits via the RC circuit. Output terminals of the first and second comparator circuits are respectively connected to first and second clock pins of a clock chip via the first and second switch circuits. When network has little traffic, the first and second comparator circuits control the first and second switch circuits to output low level signals. When network has medium to high traffic, the first and second comparator circuits control the first and second switch circuits to output high and low level signals. When network is overloaded, the first and second comparator circuits control the first and second switch circuits to output high level signals.