Abstract: An Android penetration method and device for implementing silent installation based on accessibility services. The method includes: acquiring a second target application by adding a load program to a first target application and adding penetration permissions using an Android decompilation technology; and implementing silent installation of the second target application using an accessibility service technology.

Abstract: Provided are a display substrate, a preparation method thereof and a display apparatus. The display substrate includes a first semi-conductive layer, a first conductive layer, a second conductive layer, a second semi-conductive layer, a third conductive layer, an interlayer insulating layer and an organic layer stacked on a substrate. The first semi-conductive layer includes an active layer of a polysilicon transistor, the first conductive layer includes a gate electrode of a polysilicon transistor and a first electrode plate of a storage capacitor, the second conductive layer includes a second electrode plate of a storage capacitor, the second semi-conductive layer includes an active layer of an oxide transistor, and the third conductive layer includes a gate electrode of an oxide transistor.

Abstract: A light-emitting diode display panel, a manufacturing method thereof, and an organic light-emitting diode display device are provided. The light-emitting diode display panel includes: a base substrate including a display region and a peripheral region surrounding the display region; a plurality of sub-pixels located in the display region and located at a side of the base substrate; a color-resistance layer located at a side of a second electrode in the sub-pixel away from the base substrate; and a light-blocking structure located in the peripheral region and being an annular structure surrounding the plurality of sub-pixels. The light-blocking structure includes a first light-blocking structure and a second light-blocking structure. The first light-blocking structure includes at least one interval extending in a direction from the display region pointing to the peripheral region. The second light-blocking structure at least fully fills the interval.

Abstract: Disclosed are a Nested Named Entity Recognition method based on part-of-speech awareness, system, device and storage medium therefor. The method uses a BiLSTM model to extract a feature of text word data in order to obtain a text word depth feature, and each text word of text to be recognized is initialized into a corresponding graph node, and a text heterogeneous graph of the text to be recognized is constructed according to a preset part-of-speech path, the text word data of the graph nodes is updated by an attention mechanism, and the features of all graph nodes of the text heterogeneous graph are extracted using the BiLSTM model, and a nested named entity recognition result is obtained after decoding and annotating. The present disclosure can recognize ordinary entities and nested entities accurately and effectively, and enhance the performance and advantages of the nested named entity recognition model.

Abstract: The flexible circuit board includes: a substrate layer; a first conductive layer; a second conductive layer; a first cover film, a second cover film, a first electromagnetic shielding layer, and a second electromagnetic shielding layer. The part of the first cover film overlapping a first conductive portion has first hollow portions. The part of the second cover film overlapping a second conductive portion has second hollow portions. The orthographic projection of each first hollow portion on the substrate layer has an overlapping area with the orthographic projection of at least one second hollow portion on the substrate layer. The first electromagnetic shielding layer is coupled to the first conductive portion through the first hollow portions. The second electromagnetic shielding layer is coupled to the second conductive portion through the second hollow portions.

Abstract: Provided are a high temperature-resistant composite nanofiltration membrane and a preparation method thereof. The high temperature-resistant composite nanofiltration membrane includes a base membrane and a polyamide membrane arranged on the base membrane; wherein the polyamide membrane is prepared from raw materials comprising: an amine, an inorganic salt, a silane additive, a polyacyl chloride, and an oil phase solvent; and the silane additive is at least one selected from the group consisting of 3-aminopropyltriethoxysilane, divinyltriaminopropyltrimethoxysilane, N-cyclohexyl-?-aminopropyltrimethoxysilane, and trimethoxy[3-(phenylamino)propyl]silane.

Abstract: In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.

Abstract: A biochemical analysis system capable of sample preparation and processing can include at least one inlet channel having a non-fouling, slippery surface to autonomously transport a fluid sample to a chamber by a geometry of the at least one inlet channel. The at least one inlet channel can include a first end, which is open and exposed, and a second end connected to the chamber for mixing and reaction of the fluid sample, and the at least one inlet channel can include a converging or diverging angle.

Abstract: Systems and methods are provided for predicting microhardness properties of a weld that defines a weld joint between at least two workpieces. The system includes a processor programmed to: receive temperature data that includes temperature values each attributed to a corresponding one of a plurality of points of the weld at corresponding times during a welding process used to produce the weld, determine peak temperature values and cooling rate values for each of the points of the weld based on the temperature values, predict a three-dimensional (3D) distribution of microhardness values of the weld based on a machine learning method that evaluates the peak temperature values and the cooling rate values, and generate display data based on the 3D distribution of microhardness values.

Abstract: A display substrate and a display device are provided. The display substrate includes a plurality of driving circuits, wherein each of the driving circuits includes: a first sub-circuit, respectively coupled to a gate signal terminal, a data signal terminal and a light-emitting power source terminal, and configured to store a drive voltage based on a voltage at the data signal terminal when the gate signal terminal receives a gate drive signal, and output a drive current to a light-emitting device based on the stored drive voltage under power supply provided by the light-emitting power source terminal; and a second sub-circuit, configured to regulate an equivalent resistance value of the second sub-circuit in an output path through which the drive current is output to the light-emitting device, based on a voltage division control signal received by the voltage division control signal terminal.

Abstract: Provided are use of a rare earth amino acid complex, a polylactic acid composition and a preparation method thereof. The rare earth amino acid complex is formed by complexing a rare earth metal ion with an amino acid; a rare earth element corresponding to the rare earth metal ion is one or more selected from the group consisting of lanthanum, cerium and samarium; and the amino acid is at least one selected from the group consisting of proline, L-phenylalanine, tyrosine and tryptophan.

Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.

Abstract: A package structure includes a package substrate, a first semiconductor package and a second semiconductor package, an underfill material, a gap filling structure and a heat dissipation structure. The first semiconductor package and the second semiconductor package are electrically bonded to the package substrate. The underfill material is disposed to fill a first space between the first semiconductor package and the package substrate and a second space between the second semiconductor package and the package substrate. The gap filling structure is disposed over the package substrate and in a first gap laterally between the first semiconductor package and the second semiconductor package. The heat dissipation structure is disposed on the package substrate and attached to the first semiconductor package and the second semiconductor package through a thermal conductive layer.

Abstract: A circuit protection device includes a first temperature sensitive resistor, a second temperature sensitive resistor, an electrically insulating multilayer, a first and second electrode layer, and at least one external electrode. The first temperature sensitive resistor and the second temperature sensitive resistor are electrically connected in parallel, and have a first upper electrically conductive layer and a second lower electrically conductive layer, respectively. The electrically insulating multilayer includes an upper insulating layer, a middle insulating layer, and a lower insulating layer. The upper insulating layer is between the first upper electrically conductive layer and the first electrode layer. The middle layer is laminated between the first temperature sensitive resistor and the second temperature sensitive resistor. The lower insulating layer is between the second lower electrically conductive layer and the second electrode layer.

Abstract: A display apparatus includes a display panel and an emission time control chip. The display panel has a plurality of sub-pixels, and each sub-pixel includes a light emitting device, a pixel driving circuit, and an emission time control circuit. The pixel driving circuit is configured to provide a driving signal for driving the light emitting device to emit light. The emission time control circuit is configured to connect the pixel driving circuit to the light emitting device in response to an emission control signal to control a duration of transmission of the driving signal to the light emitting device. The light emitting time control chip includes at least one output terminal. The emission time control chip is configured to transmit emission time control signals to the light emitting time control circuits of the plurality of sub-pixels through the at least one output terminal.

Abstract: A digital control method is to accurately calculate the real-time addition amount of each dye in the solution replenishment system in the whole dyeing process based on the initial dyeing rate of each dye, and replenish the dye solution according to the real-time addition amount. A digital control system includes an automatic calculation K0,n value unit, a central processing unit and a replenishment pump. The automatic calculation K0,n value unit is composed of a dye solution concentration detection instrument, a sensor I and a BP neural network model. The BP neural network model is a BP neural network trained by a dye database. The automatic calculation K0,n value unit transmits the K0,n value to the central processing unit, calculates the replenishment amount through the central processing unit, and controls the replenishment pump to replenish the solution.

Abstract: A display substrate, a display panel and a display apparatus are provided. The display substrate includes a base substrate, a first display region, and a second display region, and a light transmittance of the first display region is greater than that of the second display region A plurality of sub-pixels are arranged on the base substrate and in the first display region, wherein the sub-pixels include a first pixel driving circuit and a first light-emitting device, and the first pixel driving circuit includes a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region. An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor, the switching transistor and the light-emitting device initialization transistor on the base substrate.

Abstract: A display substrate includes first and second display regions, and a base substrate. A plurality of sub-pixels are arranged on a side of the base substrate, where the-sub-pixels include a first pixel driving circuit and a first light-emitting device connected to each other in the first display region, and the first pixel driving circuit includes at least a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region. An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor and the light-emitting device initialization transistor, or that of the active layer of each of the switching transistor and the light-emitting device initialization transistor on the base substrate.

Abstract: A shift register, comprising an input circuit, a first control circuit, a second control circuit and an output circuit. The input circuit is configured to transmit a first voltage signal from a first voltage signal terminal to a first node under the control of an input signal from a signal input terminal. The first control circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a second node under the control of a first clock signal from a first clock signal terminal and the voltage of the first node. The second control circuit is configured to transmit a second clock signal from a second clock signal terminal to a third node under the control of the voltage of the second node. The output circuit is configured to transmit the first voltage signal from the first voltage signal terminal to a scan signal output terminal under the control of the voltage of the third node.