Patents by Inventor Hui Su

Hui Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230370396
    Abstract: A method and an apparatus for a messaging service are disclosed. A method of operating a terminal on which an application for a messaging service is installed includes detecting a keyword from a text input through a message input window, cumulatively displaying the detected keyword on a suggest area, setting information about a link to a selected keyword in the text, and separately displaying the selected keyword from a non-selected keyword on the suggest area.
    Type: Application
    Filed: May 12, 2023
    Publication date: November 16, 2023
    Inventors: Dong Hyun BAN, Han Wool CHA, Dong Hee HONG, Hui Su KIM, Na Young KIM
  • Publication number: 20230370397
    Abstract: A messaging service method and apparatus are disclosed. An operating method of a terminal on which an application for a messaging service is installed includes displaying a keyword of a first type in a chat interface, wherein the keyword of the first type is detected from a text input into a message input window of the chat interface in a first input mode, based on a request corresponding to a keyword of a second type detected from the text, changing an input mode of the chat interface to a second input mode, and in response to the input mode being changed, replacing displaying of the keyword of the first type with displaying of an interfacing object corresponding to the keyword of the second type.
    Type: Application
    Filed: May 12, 2023
    Publication date: November 16, 2023
    Inventors: Dong Hyun BAN, Han Wool CHA, Dong Hee HONG, Hui Su KIM, Na Young KIM
  • Patent number: 11785226
    Abstract: Adaptive composite intra-prediction may include in response to a determination that a first prediction pixel from a first block immediately adjacent to a first edge of a current block is available for predicting a current pixel of the current block, determining whether a second prediction pixel from a second block immediately adjacent to a second edge of the current block is available for predicting the current pixel, wherein the second edge is opposite the first edge, and, in response to a determination that the second prediction pixel is available, generating a prediction value for the current pixel based on at least one of the first prediction pixel or the second prediction pixel. Adaptive composite intra-prediction may include generating a reconstructed pixel corresponding to the current pixel based on the prediction value, including the reconstructed pixel in the decoded current block, and outputting or storing the decoded current block.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: October 10, 2023
    Assignee: GOOGLE INC.
    Inventors: Yaowu Xu, Hui Su
  • Patent number: 11780447
    Abstract: A torque vectoring system for a hub motor drive system uses a motor control unit instead of a vehicle control unit to conduct torque vectoring calculation, so that a target motor torque can be obtained more reasonably and the real-time property is improved. In addition, as it is unnecessary to conduct calculation with the vehicle control unit, torque distribution and torque change can be evaluated on a testbed of the motor control unit prior to integrating the torque vectoring system into the vehicle.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: October 10, 2023
    Assignee: Schaeffler Technologies AG & Co. KG
    Inventors: Jin Wang, Hui Su
  • Publication number: 20230317521
    Abstract: The present disclosure relates to a method for forming an integrated chip. The method includes performing a first dicing cut along a first direction and extending into a semiconductor substrate from a first side of the semiconductor substrate. The method includes performing a second dicing cut along the first direction and extending into the semiconductor substrate from a second side of the semiconductor substrate, opposite the first side. The method includes performing a third dicing cut, separate from the second dicing cut, along the first direction and extending into the semiconductor substrate from the second side of the semiconductor substrate.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Inventor: Shu-Hui Su
  • Patent number: 11776912
    Abstract: A method for preparing a semiconductor device structure is provided. The method includes forming a first conductive layer over a semiconductor substrate, and forming a first dielectric layer over the first conductive layer. The first conductive layer includes copper. The method also includes etching the first dielectric layer to form a first opening exposing the first conductive layer, and forming a first lining layer and a first conductive plug in the first opening. The first lining layer includes manganese, the first conductive plug includes copper, and the first conductive plug is surrounded by the first lining layer. The method further includes forming a second conductive layer over the first dielectric layer, the first lining layer and the first conductive layer. The second conductive layer includes copper.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: October 3, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Kuo-Hui Su
  • Patent number: 11769792
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a substrate comprising sidewalls that define a trench. A capacitor comprising a plurality of conductive layers and a plurality of dielectric layers that define a trench segment is disposed within the trench. A width of the trench segment continuously increases from a front-side surface of the substrate in a direction towards a bottom surface of the trench.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su, Ting-Chen Hsu, Tuo-Hsin Chien, Felix Ying-Kit Tsui, Shi-Min Wu, Yu-Chi Chang
  • Publication number: 20230291925
    Abstract: Video coding in accordance with an inter-intra prediction model may include coding an inter-prediction motion vector for a current block of a current frame, obtaining spatial block-context pixels oriented relative to the current block, generating an inter-prediction block, generating a corresponding set of reference block-context pixels oriented relative to the inter-prediction block, identifying inter-intra prediction parameters that correspond with minimizing error between the spatial block-context pixels and the reference block-context pixels, generating a prediction block for the current block by, for a current pixel of the current block, obtaining an inter-prediction pixel, determining a predictor for the current pixel using a combination of the inter-prediction pixel and the inter-intra prediction parameters, and including the predictor in the prediction block.
    Type: Application
    Filed: July 1, 2020
    Publication date: September 14, 2023
    Applicant: Google LLC
    Inventors: Debargha Mukherjee, Yue Chen, Urvang Joshi, Sarah Parker, Elliott Karpilovsky, Hui Su
  • Publication number: 20230286317
    Abstract: A wheel hub driving system, including a housing, an electric motor, two planetary gear sets and a wheel hub bearing. The wheel hub bearing has a middle axle and an outer ring, the middle axle is fixed relative to the housing, and both a primary sun gear and a secondary sun gear are sleeved around the periphery of the wheel hub bearing. A stator of the electric motor, a primary geared ring and a secondary geared ring are all fixed to the housing. A rotor of the electric motor is anti-torsionally connected to the primary sun gear. A primary planet carrier is anti-torsionally connected to the secondary sun gear, a secondary planet carrier is anti-torsionally connected to the outer ring and the outer ring is configured to be anti-torsionally connected to a wheel rim so as to transmit power from the electric motor to the wheel rim.
    Type: Application
    Filed: August 7, 2020
    Publication date: September 14, 2023
    Applicant: Schaeffler Technologies AG & Co. KG
    Inventors: Xiangyang CAI, Hui SU
  • Patent number: 11756885
    Abstract: The present application discloses a method for fabricating a semiconductor device with metal spacers. The method includes providing a substrate; forming a plurality of plugs above the substrate; forming a plurality of metal spacers above the plurality of plugs; and, forming a plurality of air gaps positioned between the plurality of plugs; wherein the step of forming wherein the plurality of metal spacers comprises forming a first set of metal spacers, forming a second set of metal spacers, forming a third set of metal spacers, and forming a fourth set of metal spacers; wherein the second set of metal spacers is formed between the first set of metal spacers and the third set of metal spacers, and the third set of metal spacers is formed between the second set of metal spacers and the fourth set of metal spacers.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: September 12, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Kuo-Hui Su
  • Patent number: 11734066
    Abstract: Generally discussed herein are devices, systems, and methods for scheduling tasks to be completed by resources. A method can include identifying features of the task, the features including a time-dependent feature and a time-independent feature, the time-dependent feature indicating a time the task is more likely to be successfully completed by the resource, converting the features to feature values based on a predefined mapping of features to feature values in a first memory device, determining, by a gradient boost tree model and based on a first current time and the feature values, a likelihood the resource will successfully complete the task, and scheduling the task to be performed by the resource based on the determined likelihood.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: August 22, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Jinchao Li, Yu Wang, Karan Srivastava, Jianfeng Gao, Prabhdeep Singh, Haiyuan Cao, Xinying Song, Hui Su, Jaideep Sarkar
  • Publication number: 20230260263
    Abstract: The present disclosure relates to systems and methods for object recognition. The systems may obtain an image associated with an object. The systems may determine, using a recognition model, an initial recognition result of the object based on the image. The initial recognition result may include a plurality of initial recognition values corresponding to a plurality of predetermined categories respectively. Each of the plurality of initial recognition values may indicate an initial probability that the object corresponds to a corresponding predetermined category. In response to determining that the initial recognition result satisfies a preset condition, for each of the plurality of predetermined categories, the systems may obtain a reference probability corresponding to the predetermined category.
    Type: Application
    Filed: April 23, 2023
    Publication date: August 17, 2023
    Applicant: ZHEJIANG DAHUA TECHNOLOGY CO., LTD.
    Inventors: Yongtao YANG, Xingming ZHANG, Huadong PAN, Bangjie TANG, Hui SU, Jun YIN
  • Publication number: 20230261061
    Abstract: A method for preparing a recessed gate structure includes forming a recessed structure, wherein the recessed structure comprises a substrate with the recess extending into the substrate from a topmost surface of the substrate; forming a first functional layer to at least cover a sidewall of a recess of the recessed structure; forming a second functional layer to cover the first functional layer; performing a rapid thermal treatment to form an interfacial layer extending along an interface between the first functional layer and the second functional layer; and forming a conductive feature to fill up the recess.
    Type: Application
    Filed: February 15, 2022
    Publication date: August 17, 2023
    Inventor: KUO-HUI SU
  • Publication number: 20230261072
    Abstract: A recessed gate structure includes a recessed structure, wherein the recessed structure comprises a substrate with the recess extending into the substrate from a topmost surface of the substrate; a conductive feature, filled in the recess of the recessed structure; a first functional layer, extending between the conductive feature and the recessed structure, and comprising a first element; a second functional layer, extending between the first functional layer and the conductive feature, and comprising a second element; and an interfacial layer, extending along an interface between the first functional layer and the second functional layer, and comprising the first element and the second element.
    Type: Application
    Filed: February 15, 2022
    Publication date: August 17, 2023
    Inventor: KUO-HUI SU
  • Publication number: 20230246014
    Abstract: A semiconductor device is provided. The semiconductor device comprises a first semiconductor die comprising a first capacitor, and a second semiconductor die in contact with the first semiconductor die and comprises a diode. The first semiconductor die and the second semiconductor die are arranged along a first direction, and a diode is configured to direct electrons accumulated at the first capacitor to a ground.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 3, 2023
    Inventors: HSIN-LI CHENG, SHU-HUI SU, YU-CHI CHANG, YINGKIT FELIX TSUI, SHIH-FEN HUANG
  • Publication number: 20230223259
    Abstract: A method for preparing a semiconductor device structure includes forming a target layer over a semiconductor substrate, and forming a first energy-sensitive pattern over the target layer. The method also includes forming a lining layer covering the first energy-sensitive pattern, and forming a second energy-sensitive pattern over the lining layer. The first energy-sensitive pattern and the second energy-sensitive pattern are staggered. The method further includes performing an etching process to form a first opening and a second opening in the target layer. The first opening and the second opening have different depths.
    Type: Application
    Filed: January 7, 2022
    Publication date: July 13, 2023
    Inventor: KUO-HUI SU
  • Publication number: 20230223260
    Abstract: A method for preparing a semiconductor device structure includes forming a target layer over a semiconductor substrate, and forming a first energy-sensitive pattern over the target layer. The method also includes performing an energy treating process to transform an upper portion of the first energy-sensitive pattern into a treated portion, forming a lining layer covering the first energy-sensitive pattern, and forming a second energy-sensitive pattern over the lining layer. The first energy-sensitive pattern and the second energy-sensitive pattern are staggered. The method further includes performing an etching process to form a first opening and a second opening in the target layer. The first opening and the second opening have different depths.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 13, 2023
    Inventor: Kuo-Hui SU
  • Publication number: 20230192860
    Abstract: The present application relates to antibodies specifically binding to the V-domain immunoglobulin-containing suppressor of T-cell activation (VISTA) at acidic pH and their use in cancer treatment. In some embodiments, the antibodies bind specifically to human VISTA at acidic pH, but do not significantly bind to human VISTA at neutral or physiological pH.
    Type: Application
    Filed: September 18, 2020
    Publication date: June 22, 2023
    Applicant: Bristol-Myers Squibb Company
    Inventors: Lin Hui Su, Sabrina Mueller
  • Publication number: 20230172843
    Abstract: Disclosed is a method of preparing a pH-sensitive controlled-release emulsion hydrogel using chitosan and pectin. More particularly, disclosed is a method of preparing a pH-sensitive controlled-release emulsion hydrogel that is capable of entrapping various substances to be encapsulated and is stable in gastrointestinal conditions, but upon exposure to neutral pH after passing through the stomach, releases the entrapped emulsion in response to the pH.
    Type: Application
    Filed: July 6, 2022
    Publication date: June 8, 2023
    Applicant: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Pahn Shick CHANG, Hui Su KIM, Hyun Jong YU, Eun Hye YANG
  • Publication number: 20230147848
    Abstract: A method includes depositing a silicon layer over a semiconductor region, forming dielectric isolation regions extending into the silicon layer and the semiconductor region, and recessing the dielectric isolation regions. A first portion of the silicon layer and a second portion of the semiconductor region are between the dielectric isolation regions, and protrude higher than top surfaces of the dielectric isolation regions to form a semiconductor fin. The semiconductor fin is thinned, and after the first semiconductor fin is thinned, the first portion of the silicon layer remains. A gate stack is formed on the semiconductor fin.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 11, 2023
    Inventors: Tsu-Hui Su, Ssu-Yu Liao, Chun-Hsiang Fan, Kuo-Bin Huang