Abstract: A micro multi-color LED device includes two or more LED structures for emitting a range of colors. The two or more LED structures are vertically stacked to combine light from the two more LED structures. Light from the micro multi-color LED device is emitted horizontally from each of the LED structures and reflected upward via some reflective structures. In some embodiments, each LED structure is connected to a pixel driver and/or a common electrode. The LED structures are bonded together through bonding layers. In some embodiments, planarization layers enclose each of the LED structures or the micro multi-color LED device. In some embodiments, one or more of reflective layers, refractive layers, micro-lenses, spacers, and reflective cup structures are implemented in the device to improve the LED emission efficiency. A display panel comprising an array of the micro tri-color LED devices has a high resolution and a high illumination brightness.

Abstract: A micro three-dimensional printing device is provided. The micro three-dimensional printing device includes a micro-LED display projector configured to emit image light; a material platform facing the micro-LED display projector and configured to receive the image light; a movable printing plate configured to hold a three-dimensional printed object; and a moving mechanism connected with the movable printing plate and configured to move the movable printing plate.

Abstract: A micro display module, a projector, and a system are provided. The micro display module includes a micro LED display device including at least one micro LED (light emitting diode) panel, wherein the at least one micro LED panel includes an IC back plane and a micro LED array area having one or more micro LEDs, the micro LED array area is formed on the IC back plane and each of the micro LEDs is electrically connected with the IC (integrated circuit) back plane; and an image light rotating element including a transmission lens arranged facing the micro LED array area and a lens position rotating actuator configured to rotate the transmission lens based on at least one preset axis, wherein the preset axis is parallel to the micro LED array area.

Abstract: A controller is configured to program the memory cells to a first set of data states in a first programming pass and to a greater second set of data states in a second programming pass. The controller performs the first programming pass on the first word line. The controller then repeats the process of programming a portion of another word line and then comparing an upper tail of an erased data state of the first word line to a critical voltage until the upper tail of the erased data state of the first word line exceeds the critical voltage by a threshold. In response to the upper tail of the erased data state exceeding the critical voltage by the threshold, the controller then alternates between the first and second programming passes until the first programming pass is completed on the remaining word lines of the memory block.

Abstract: The memory device that includes a memory block memory cells arranged in word lines. A controller is in electrical communication with the memory cells and is configured to program the memory cells to a first set of data states in a first programming pass and then to a greater second set of data states in a second programming pass. During programming of a first set of memory cells in at least one of the first and second programming passes, the controller is further configured to determine programming statuses of a second set of memory cells that is adjacent the first set of memory cells. The controller is further configured to read the first set of memory cells using a read voltage that is adjusted from a base read voltage based on the determined programming statuses of the second set of memory cells.

Abstract: An apparatus disclosed herein comprises: a plurality of memory cells and a control circuit coupled to the plurality of memory cells. The control circuit is configured to: erase a block; verify, using a first erase verify level, that the block was properly erased; verify, using a second erase verify level, that the block was properly erased; determine whether there are any mismatches in a plurality of verify statuses between neighboring wordlines of the block from verifying the block using the second erase verify level; and identify, based on the determination, whether the block has failed.

Abstract: A micro LED includes a light emitting structure; an electrical conductive layer formed on the light emitting structure; and a reflective layer formed on the electrical conductive layer, wherein a top surface of the reflective layer is lower than a top surface of the electrical conductive layer.

Abstract: A micro LED includes a first type semiconductor layer; a light emitting layer formed on the first type semiconductor layer; a second type semiconductor layer formed on the light emitting layer; wherein, at least one part of a sidewall of the second type semiconductor layer is not aligned with a sidewall of the first type semiconductor layer.

Abstract: A micro LED includes a light emitting structure; a passivation layer formed on the light emitting structure; a reflective layer formed on the passivation layer; and an electrical conductive layer formed on the top surface of the passivation layer and on the top surface of the reflective layer.

Abstract: A micro LED includes a first type semiconductor layer; a light emitting layer formed on the first type semiconductor layer; and a second type semiconductor layer formed on the light emitting layer; wherein a bottom sidewall of the second type semiconductor layer is aligned with a sidewall of the first type semiconductor layer; and a sidewall of the second type semiconductor layer does not conform a straight line.

Abstract: The memory device includes a control circuitry that is communicatively coupled to memory cells are arranged in a plurality of word lines. The control circuitry is configured to perform a first programming pass on a selected word line. The first programming pass includes a plurality of programming loops, each of which includes the application of a programming pulse (Vpgm). The programming pulse voltage is increased between programming loops of the first programming pass by a step size. The step size is a first step size between two programming loops of the first programming pass and is a second step size that is different than the first step size between two other programming loops of the first programming pass. The control circuitry is also configured to perform a second programming pass to further program the memory cells of the selected word line to the plurality of data states.

Abstract: Technology for sensing non-volatile memory cells in which one or more sense nodes are charged to a sense voltage having a magnitude that improves sensing accuracy. One sense node may be charged to different sense voltages when sensing different memory cells at different times. Multiple sense nodes may be charged to a corresponding multiple different sense voltages when sensing different memory cells at the same time. The one or more sense nodes are allowed to discharge based on respective currents of memory cells for a pre-determined time while applying a reference voltage to the memory cells. The Vts of the selected memory cells are assessed based on respective voltages on the one or more of sense nodes after the pre-determined time. Different sensing voltages may be used based on bit line voltage, bit line resistance, distance of memory cells from the sense node, or other factors.

Abstract: A kinetic sculpture and an intelligent control system are provided which comprise a plurality of movable bases (500), and the movable bases are arranged radially along a circumferential direction around a centerline disposed vertically; a bearing unit (400) is mounted on each of the movable bases (500), a vertical column (100) is mounted on the bearing unit (400), and a blade unit (200) is disposed on the column (100); the bearing units (400) move the columns (100) along the moving paths on the respective movable bases toward the position of the centerline or away from the position of the centerline to achieve combination or separation; the column systems correspondingly control each of the columns (100) to move. The kinetic sculpture enables the blades (201) of the kinetic sculpture to present a contour shape in gathered and separated states.

Abstract: A micro multi-color LED device includes two or more LED structures for emitting a range of colors. The two or more LED structures are vertically stacked to combine light from the two more LED structures vertically, and/or horizontally and reflected upward via some reflective structures. In some embodiments, each LED structure is connected to a pixel driver and/or a common electrode. The LED structures are bonded together through bonding layers. In some embodiments, planarization layers enclose each of the LED structures or the micro multi-color LED device. In some embodiments, one or more of reflective layers, refractive layers, micro-lenses, spacers, and reflective cup structures are implemented in the device to improve the LED emission efficiency. A display panel comprising an array of the micro tri-color LED devices has a high resolution and a high illumination brightness.

Abstract: Technology for sensing non-volatile memory cells in which one or more sense nodes are charged to a sense voltage having a magnitude that improves sensing accuracy. One sense node may be charged to different sense voltages when sensing different memory cells at different times. Multiple sense nodes may be charged to a corresponding multiple different sense voltages when sensing different memory cells at the same time. The one or more sense nodes are allowed to discharge based on respective currents of memory cells for a pre-determined time while applying a reference voltage to the memory cells. The Vts of the selected memory cells are assessed based on respective voltages on the one or more of sense nodes after the pre-determined time. Different sensing voltages may be used based on bit line voltage, bit line resistance, distance of memory cells from the sense node, or other factors.

Abstract: Apparatuses and techniques are described for optimizing a program operation in a memory device in which groups of memory cells are programmed from checkpoint states to respective data states. In a first program pass, groups of memory cells are programmed to respective checkpoint states with verify tests. Each checkpoint state is associated with a set of data states. In a second program pass, the memory cells are programmed closer to their assigned data state with a specified number of program pulses. In a third program pass, the memory cells are programmed to their assigned data state by applying program pulses and performing verify tests. The number of checkpoint states and the number of data states associated with each checkpoint state can be optimized based on a spacing between the verify voltages of the data states.

Abstract: A micro multi-color LED device includes two or more LED structures for emitting a range of colors. The two or more LED structures are vertically stacked to combine light from the two more LED structures. Light from the micro multi-color LED device is emitted substantially vertically upward through each of the LED structures. In some embodiments, each LED structure is connected to a pixel driver and/or a common electrode. The LED structures are bonded together through bonding layers. In some embodiments, planarization layers enclose each of the LED structures or the micro multi-color LED device. In some embodiments, one or more of reflective layers, refractive layers, micro-lenses, spacers, and reflective cup structures are implemented in the device to improve the LED emission efficiency. A display panel comprising an array of the micro tri-color LED devices has a high resolution and a high illumination brightness.

Abstract: A micro multi-color LED device includes two or more LED structures for emitting a range of colors. The two or more LED structures are vertically stacked to combine light from the two more LED structures. Light from the micro multi-color LED device is emitted horizontally from each of the LED structures and reflected upward via some reflective structures. In some embodiments, each LED structure is connected to a pixel driver and/or a common electrode. The LED structures are bonded together through bonding layers. In some embodiments, planarization layers enclose each of the LED structures or the micro multi-color LED device. In some embodiments, one or more of reflective layers, refractive layers, micro-lenses, spacers, and reflective cup structures are implemented in the device to improve the LED emission efficiency. A display panel comprising an array of the micro tri-color LED devices has a high resolution and a high illumination brightness.

Abstract: A semiconductor apparatus includes a driver circuit wafer including a plurality of driver circuits arranged in an array, a bonding metal layer formed over the driver circuit wafer, and a horizontally continuous functional device epi-structure layer formed over the bonding metal layer and covering the driver circuits.

Abstract: An LED chip comprises: an operation substrate; a first conductive layer disposed on a functional surface of the operation substrate; a die disposed on the first conductive layer, wherein the die comprises a first semiconductor layer and a second semiconductor layer; a first electrode layer electrically connected with the first conductive layer; and a second electrode layer electrically connected with the second semiconductor layer, wherein a first isolation layer is disposed between the second electrode layer and the first conductive layer. In embodiments of the present disclosure, the first electrode layer and the second electrode layer are disposed on the bottom surface of the operation substrate, and are formed after the LED die is formed. Therefore, a dicing process and a packaging process are not required, thus, process steps are simplified and process cost is reduced, which is conducive to achieve “free packaging” technology.