Abstract: Titanium boride (TiBx), zirconium boride (ZrBx) and hafnium boride (HfBx) barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The barriers protect cell dielectrics from diffusion and other interaction with surrounding materials during subsequent thermal processing.

Abstract: A high surface area capacitor comprising a double metal layer (an electrode metal and barrier material) deposited on hemispherical grain (HSG) silicon, wherein a high dielectric constant (HDC) material is deposited over the double metal layer. The high surface area capacitor is complete with an upper cell plate electrode deposited over the HDC material. The double metal layer preferably comprises one noble metal, such as platinum or palladium, for the electrode metal and an oxidizable metal, such as ruthenium, iridium, or molybdenum, for the barrier material. The noble metal, such as platinum metal, alone would normally allow oxygen to diffuse into and oxidize any adhesion layer (making the adhesion layer less conductive) and/or undesirably oxidize any silicon-containing material during the deposition of the HDC material. Thus, the barrier metal is used to form a conducting oxide layer or a conducting layer which stops the oxygen diffusion.

Abstract: A method and apparatus for preventing N2O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N2O as it enters the high pressure oxidation furnace. This catalyst is used in an environment of between five atmosphere to 25 atmosphere N2O and a temperature range of 600° to 750° C., which are the conditions that lead to the N2O going super critical. By preventing the N2O from becoming super critical, the reaction is controlled that prevents both temperature and pressure spikes. The catalyst can be selected from the group of noble transition metals and their oxides. This group can comprise palladium, platinum, iridium, rhodium, nickel, silver, and gold.

Abstract: A high surface area capacitor comprising a double metal layer (an electrode metal and barrier material) deposited on hemispherical grain (HSG) silicon, wherein a high dielectric constant (HDC) material is deposited over the double metal layer. The high surface area capacitor is complete with an upper cell plate electrode deposited over the HDC material. The double metal layer is preferably comprises one noble metal, such as platinum or palladium, for the electrode metal and an oxidizable metal, such as ruthenium, iridium, or molybdenum, for the barrier material. The noble metal, such as platinum metal, alone would normally allow oxygen diffusion into and oxidize any adhesion layer (making the adhesion layer less conductive) and/or undesirably oxidize any silicon-containing material during the deposition of the HDC material. Thus, the barrier metal is used to form a conducting oxide layer or a conducting layer which stops the oxygen diffusion.

Abstract: A capacitor has a tantalum oxynitride film. One method for making the film comprises forming a bottom plate electrode and then forming a tantalum oxide film on the bottom plate electrode. Nitrogen is introduced to form a tantalum oxynitride film. A top plate electrode is formed on the tantalum oxynitride film.

Abstract: A method and apparatus for preventing N2O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace is disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N2O as it enters the high pressure oxidation furnace. This catalyst is used in an environment of between five atmosphere to 25 atmosphere N2O and a temperature range of 600° to 750° C., which are the conditions that lead to the N2O going super critical. By preventing the N2O from becoming super critical, the reaction is controlled that prevents both temperature and pressure spikes. The catalyst can be selected from the group of noble transition metals and their oxides. This group can comprise palladium, platinum, iridium, rhodium, nickel, silver, and gold.

Abstract: A method for ion implantation of high dielectric constant materials with dopants to reduce film leakage and improve resistance degradation is disclosed. Particularly, the invention relates to ion implantation of (Ba,Sr)TiO3 (BST) with donor dopants to reduce film leakage and improve resistance degradation of the BST film. The invention also relates to varying the ion implantation angle of the dopant to uniformly dope the high dielectric constant materials when they have been fabricated over a stepped structure. The invention also relates to integrated circuits having a doped thin film high dielectric material used as an insulating layer in a capacitor structure.

Abstract: In accordance with one implementation the invention, a capacitor comprises two conductive capacitor electrodes separated by a capacitor dielectric layer, with at least one of the capacitor electrodes comprising at least one of Pt and Pd, and also comprising another metal which is capable of forming a conductive metal oxide when exposed to oxidizing conditions. In accordance with another. implementation, integrated circuitry includes a conductive silicon containing electrode projecting from a circuit node. A capacitor is received over the silicon containing electrode and comprises a first capacitor electrode having at least one of Pt and Pd, and also comprising another metal which is capable of forming a conductive metal oxide when exposed to oxidizing conditions. A high K capacitor dielectric layer received over the first capacitor electrode. A second capacitor electrode is received over the high K capacitor dielectric layer.

Abstract: In accordance with one implementation the invention, a capacitor comprises two conductive capacitor electrodes separated by a capacitor dielectric layer, with at least one of the capacitor electrodes comprising at least one of Pt and Pd, and also comprising another metal which is capable of forming a conductive metal oxide when exposed to oxidizing conditions. In accordance with another implementation, integrated circuitry includes a conductive silicon containing electrode projecting from a circuit node. A capacitor is received over the silicon containing electrode and comprises a first capacitor electrode having at least one of Pt and Pd, and also comprising another metal which is capable of forming a conductive metal oxide when exposed to oxidizing conditions. A high K capacitor dielectric layer received over the first capacitor electrode. A second capacitor electrode is received over the high K capacitor dielectric layer.

Abstract: Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175° C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode comprises a conductive metal oxide. A more preferred second capacitor electrode comprises a conductive silicon comprising layer, over a conductive titanium comprising layer, over a conductive metal oxide layer. A preferred first capacitor electrode comprises a conductively doped Si-Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.

Abstract: In a capacitor forming method, a first capacitor electrode is formed over a substrate. A high K oxygen containing capacitor dielectric layer is formed over the first capacitor electrode. A first annealing of the high K capacitor dielectric layer is conducted at a temperature of at least about 500.degree. C. in a substantially non-oxidizing atmosphere. After the first annealing, second annealing the high K capacitor dielectric layer occurs at a temperature of less than or equal to about 500.degree. C. in an oxidizing atmosphere. A second capacitor electrode is formed over the high K oxygen containing capacitor dielectric layer, preferably after the second annealing. In another considered implementation, the capacitor dielectric layer is annealed in multiple steps including at least two different temperatures.

Abstract: An integrated capacitor is provided, incorporating a high dielectric constant material. In a disclosed method, a high k capacitor dielectric is formed in the shape of a container above a protective layer. After the dielectric is formed, inner and outer electrodes are formed, representing storage and reference electrodes of a memory cell. Contact is separately made through the protective layer from a storage electrode layer, which lines the inner surface of the dielectric, to an underlying polysilicon plug. The contact can be a thin layer lining the interior of the storage electrode layer, or can completely fill the container capacitor. In the latter instance, the contact can form part of the storage electrode and contribute to capacitance of the cell. Volatile dielectric materials can thus be formed prior to the electrodes, avoiding oxidation of the electrodes and underlying polysilicon plug, while also minimizing oxygen depletion through diffusion from the high dielectric constant material.

Abstract: Titanium boride (TiB.sub.x), zirconium boride (ZrB.sub.x) and hafnium boride (HfB.sub.x) barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The barriers protect cell dielectrics from diffusion and other interaction with surrounding materials during subsequent thermal processing.

Abstract: The invention encompasses methods of processing internal surfaces of a chemical vapor deposition reactor. In one implementation, material is deposited over internal surfaces of a chemical vapor deposition reactor while processing semiconductor substrates therein. The deposited material is treated with atomic oxygen. After the treating, at least some of the deposited material is etched from the reactor internal surfaces. In one embodiment, first etching is conducted of some of the deposited material from the reactor internal surfaces. After the first etching, remaining deposited material is treated with atomic oxygen. After the treating, second etching is conducted of at least some of the remaining deposited material from the reactor internal surfaces. In one embodiment, the deposited material is first treated with atomic oxygen. After the first treating, first etching is conducted of some of the deposited material from the reactor internal surfaces.

Abstract: Ferroelectric capacitors with hybrid electrodes including both a conducting oxide and a noble metal may be used to achieve devices having improved performance over capacitors with either platinum or ruthenium oxide electrodes. These hybrid electrode structures can improve capacitor performance both in terms of fatigue and leakage current. Accordingly, these ferroelectric capacitors with hybrid electrodes can be used as elements of an integrated circuit such as a non-volatile memory or dynamic random access memory.