Abstract: A probe card assembly is provided as follows. A tile fixing substrate is disposed on a printed circuit board. A plurality of ceramic tiles is detachably attached to the tile fixing substrate. Each of the plurality of ceramic tiles comprises a plurality of probes. A plurality of alignment marks is fixed to the tile fixing substrate.

Abstract: A display device is disclosed. In one aspect, the display device includes a substrate including a display area and a non-display area and an input wiring portion and an output wiring portion formed in the non-display area. The display device also includes a driver integrated circuit (IC) formed over the substrate and electrically connected to the input and output wiring portions. Each of the input and output wiring portions includes a metal layer and a metal carbide layer that covers the metal layer.

Abstract: The financial device comprises a medium depositing and withdrawing module, a discrimination module for discriminating the medium, a first transfer module for guiding the medium of the medium depositing and withdrawing module to the discrimination module, a temporary staking module in which a medium to be withdrawn is temporarily stacked, a first connection module transferring a medium between the discrimination module and the temporary staking module, a medium storage unit for storing a medium to be deposited or to be withdrawn, a second connection module for guiding a medium passing through the first connection module to the medium storage unit, a first frame in which the second connection module is installed, and a second frame in which the first connection module and the discrimination module are installed, and rotatably connected to the first frame. When rotating the second frame with respect to the first frame, the second connection module is exposed.

Abstract: Disclosed are an adsorption type cooling apparatus using nanoporous aluminophosphate as a water vapor adsorbent, and an operation method thereof. Specifically, the adsorption type cooling apparatus uses nanoporous aluminophosphate exhibiting a high dynamic water vapor adsorption capacity as a water vapor adsorbent. The adsorption type cooling apparatus includes at least two adsorption towers containing a water vapor adsorbent, a condenser alternately connected to the adsorption towers, and an evaporator alternately connected to the adsorption towers, wherein the water vapor adsorbent is nanoporous aluminophosphate containing aluminum, phosphorous, and oxygen.

Abstract: Disclosed are a multi-axial force sensor capable of measuring multi-axial force and a grasper for sensing multi-axial force using the same. The multi-axial force sensor includes: a first operating section which includes a first member, and a first protrusion module formed protruding from one side of the first member; an elastic section which is formed at one end of the first member; a second operating section which includes a second member formed with one end to face one end of the first member with the elastic section therebetween, and a second protrusion module formed protruding from one side of the second member to face the first protrusion module; and an electrode section which is formed in the first protrusion module. With this, there is provided a force sensor capable of precisely measuring force through a simple structure.

Abstract: A semiconductor integrated circuit includes a scan enable (SE) inverter and a clock (CK) inverter on a substrate, a first multiplex part, and a second multiplex part. The SE inverter and the CK inverter are aligned in a first direction. The first multiplex part includes a first wiring and a first transistor, the first wiring is connected to a power supply voltage part of the SE inverter, and the first wiring and the first transistor share a source region contacting the first wiring. The second multiplex part includes a second wiring and a second transistor, the second wiring is connected to a power supply voltage part of the CK inverter, and the second wiring and the second transistor share a source region contacting the second wiring. The SE inverter and the CK inverter are aligned in a first direction to each other.

Abstract: Disclosed is a smart factory platform for processing data obtained in a continuous process including a first process and a second process following the first process. The smart factory platform includes a distributed parallel processing system including at least one processing unit that generates mapping data by mapping a process identification (ID) to collection data collected from the continuous process and sorts the mapping data to generate sorting data, the process ID defining a process where the collection data occurs and the sorting data being generated for association processing between pieces of collection data collected from different processes; and a big data analysis system storing the sorting data with respect to the process ID.

Abstract: A semiconductor device includes a substrate, a tunnel insulation pattern on the substrate, a charge storage pattern on the tunnel insulation pattern, a dielectric pattern having a width smaller than a width of the charge storage pattern on the charge storage pattern, a control gate having a width greater than the width of the dielectric pattern on the dielectric pattern, and a metal-containing gate on the control gate.

Abstract: The path switching structure according to the present disclosure includes a branch part from which a plurality of transfer paths along which a medium is transferred is branched, and a medium branch apparatus having a diverter guiding the medium introduced to the branch part along any one of the plurality of transfer paths to another transfer path among the plurality of transfer paths, wherein the plurality of transfer paths include a first transfer path along which the medium is introduced to the branch part, a second transfer path in which the medium is introduced to the branch part or the medium is discharged from the branch part, and a third transfer path in which the medium is introduced to the branch part or the medium is discharged from the branch part, and the diverter is rotated between a first position a second position.

Abstract: A semiconductor device can include a plurality of landing pads arranged according to a layout on a substrate, wherein a cross-sectional shape of each of the landing pads has a diamond shape so that opposing interior angles of the diamond shape are equal to one another and adjacent interior angles of the diamond shape are unequal to one another.

Abstract: A semiconductor device is provided. The semiconductor includes a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked in a first direction on a substrate. The plurality of interlayer insulating layers and the plurality of gate electrodes constitute a side surface extended in the first direction. A gate dielectric layer is disposed on the side surface. A channel pattern is disposed on the gate dielectric layer. The gate dielectric layer includes a protective pattern, a charge trap layer, and a tunneling layer. The protective pattern includes a portion disposed on a corresponding gate electrode of the plurality of gate electrodes. The charge trap layer is disposed on the protective pattern. The tunneling layer is disposed between the charge trap layer and the channel pattern. The protective pattern is denser than the charge trap layer.

Abstract: Provided herein is a method and apparatus describing a force sensor that includes a ground unit that is a grounded conductor that changes its position according to an external force, and including a flat panel module that is a conductor of a flat panel shape, and a protruding module that is a conductor protruding from a lower surface of the flat panel module, a substrate of a flat panel shape arranged in a predetermined distance from the lower surface of the flat panel module, and having a hole through which the protruding module may be inserted, a first electrode formed on an upper surface of the substrate, to generate a capacitance together with the flat panel module upon receiving power, and a second electrode formed on the substrate, to generate a capacitance together with the protruding module upon receiving power.

Abstract: An integrated circuit includes a complex logic cell. The complex logic cell includes a first logic circuit providing a first output signal from a first input signal group and a common input signal group, and a second logic circuit providing a second output signal from a second input signal group and the common input signal group. The first and second logic circuits respectively include first and second transistors formed from a gate electrode, the gate electrode extending in a first direction and receiving a first common input signal of the common input signal group.

Abstract: A semiconductor device can include a plurality of landing pads arranged according to a layout on a substrate, wherein a cross-sectional shape of each of the landing pads has a diamond shape so that opposing interior angles of the diamond shape are equal to one another and adjacent interior angles of the diamond shape are unequal to one another.

Abstract: A semiconductor device includes a substrate, a tunnel insulation pattern on the substrate, a charge storage pattern on the tunnel insulation pattern, a dielectric pattern having a width smaller than a width of the charge storage pattern on the charge storage pattern, a control gate having a width greater than the width of the dielectric pattern on the dielectric pattern, and a metal-containing gate on the control gate.

Abstract: A semiconductor device includes: first through fourth active regions spaced apart from one another; a first gate line disposed to overlap with the first and second active regions, but not with the third and fourth active regions, and to extend in a first direction; a second gate line disposed to overlap with the third and fourth active regions, but not with the first and second active regions, and to extend in the first direction while being spaced apart from the first gate line; and a dummy gate line disposed to overlap with the first through fourth active regions and a field region, to be spaced apart from the first and second gate lines in a second direction, and to extend in the first direction, wherein a signal input to the first or second active region is transmitted to the third or fourth active region.

Abstract: An integrated circuit includes a plurality of positive edge-triggered master-slave flip-flop circuits sharing a clock signal. At least one of the positive edge-triggered master-slave flip-flop circuits includes; an input stage that provides a first output signal generated from an input signal in response to the clock signal and an inverted clock signal, a first inverting circuit that generates the inverted clock signal by delaying the clock signal, a transmission gate that receives a second output signal and generates a final output signal, and a second inverting circuit that receives the first output signal and generates the second output signal from the first output signal. The clock signal is applied to an NMOS transistor of the transmission gate and a PMOS transistor of the input stage, and the inverted clock signal is applied to a PMOS transistor of the transmission gate and an NMOS transistor of the input stage.

Abstract: A fastening-type pipe supporting apparatus capable of supporting a curved pipe against loads acting on a curved portion of the pipe via clamps having curved surfaces and being easily attached to and detached from the curved portion of the pipe. The fastening-type pipe supporting apparatus includes: a first clamp having a semicircular cross-sectional shape and a curved surface with a curvature to surround the curved portion of a pipe; a second clamp having a semicircular cross-sectional shape and a curved surface with a curvature to surround the curved portion of the pipe, the second clamp being coupled to the first clamp; a connection bolt coupling the first clamp with the second clamp; and a washer placed around the connection bolt.

Abstract: A semiconductor device includes a substrate, a tunnel insulation pattern on the substrate, a charge storage pattern on the tunnel insulation pattern, a dielectric pattern having a width smaller than a width of the charge storage pattern on the charge storage pattern, a control gate having a width greater than the width of the dielectric pattern on the dielectric pattern, and a metal-containing gate on the control gate.

Abstract: The present invention relates to a method for preparing a population of antibodies to have high purity and high quality by removing antibody isoforms and impurities through the use of a cation exchange column, a hydrophobic interaction column, and an anion exchange column successively, without using a protein A column; and to a population of antibodies prepared by the above method.