Abstract: A semiconductor device includes a substrate, a ferroelectric layer disposed on the substrate, a gate insulation layer disposed on the ferroelectric layer, metal particles disposed in the gate insulation layer, and a gate electrode layer disposed on the gate insulation layer.

Abstract: A semiconductor device includes a substrate, a ferroelectric layer disposed on the substrate in a vertical direction, a charge trap layer disposed on the ferroelectric layer, a gate insulation layer disposed on the charge trap layer, and a gate electrode layer disposed on the gate insulation layer. The charge trap layer includes a metal-organic framework layer and metal particles embedded in the metal-organic framework layer.

Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.

Abstract: A ferroelectric component includes a first electrode, a tunnel barrier layer disposed on the first electrode to include a ferroelectric material, a tunneling control layer disposed on the tunnel barrier layer to control a tunneling width of electric charges passing through the tunnel barrier layer, and a second electrode disposed on the tunneling control layer.

Abstract: A method for operating an apparatus for predicting confirmed cases of an infectious disease is provided. The method comprises predicting infectious disease information per country, including an infection risk per country, expected number of entrants per country, and number of imported cases per country, based on collected epidemic statistics data per country and inflow data between a corresponding country and a destination country, grouping two or more countries based on geographic or economic relevance, and correcting the infectious disease information per country of countries within a grouped group according to a contagion risk impact set depending on a correlation between the countries within the group, and predicting total number of imported cases flowing into the destination country by re-correcting the infectious disease information per country through applying a correlation for the confirmed cases of the infectious disease between groups to the infectious disease information per country.

Abstract: A display device and a tiled display including the same are provided. The display device includes a bottom plate, and a display panel including an active area on the bottom plate and including a plurality of pixels, and a plurality of dummy areas near the active area and including a plurality of dummy pixels, wherein the plurality of dummy pixels is on at least one side surface of the bottom plate, wherein the plurality of pixels includes a first sub-pixel, a second sub-pixel, and a third sub-pixel configured to emit lights of different colors, and wherein the plurality of dummy pixels is configured to emit light of a same color as one of the first sub-pixel, the second sub-pixel, and the third sub-pixel.

Abstract: A method of providing information on a social networking service (SNS) activity to a chatroom, performed by a server, includes: providing an SNS for each of a plurality of anonymous profiles created to be interlinked with an account for an instant messaging service (IMS); receiving information on an SNS activity performed through a first anonymous profile selected corresponding to a chatroom of the IMS, among the plurality of anonymous profiles of a user participating in the chatroom; providing the information on the SNS activity performed through the first anonymous profile to the chatroom; receiving a request to change the profile of the user selected corresponding to the chatroom from the first anonymous profile to a second anonymous profile; receiving information on an SNS activity performed through the second anonymous profile; and providing the information on the SNS activity performed through the second anonymous profile to the chatroom.

Abstract: A nonvolatile memory device includes a substrate having an upper surface, and a gate structure disposed over the substrate. The gate structure includes at least one gate electrode layer pattern and at least one gate insulation layer pattern, which are alternately stacked along a first direction perpendicular to the upper surface. The gate structure extends in a second direction perpendicular to the first direction. The nonvolatile memory device includes a ferroelectric layer disposed on at least a portion of one sidewall surface of the gate structure. The one sidewall surface of the gate structure forms a plane substantially parallel to the first and second directions. The nonvolatile memory device includes a channel layer disposed on the ferroelectric layer, and a source electrode structure and a drain electrode structure disposed to contact the channel layer and spaced apart from each other in the second direction.

Abstract: A ferroelectric component includes a first electrode, a tunnel barrier layer disposed on the first electrode to include a ferroelectric material, a tunneling control layer disposed on the tunnel barrier layer to control a tunneling width of electric charges passing through the tunnel barrier layer, and a second electrode disposed on the tunneling control layer.

Abstract: A nonvolatile memory device according to an aspect of the present disclosure includes a substrate having a channel layer, a gate dielectric layer structure disposed on the channel layer, a ferroelectric layer disposed on the gate dielectric layer structure, and a gate electrode layer disposed on the ferroelectric layer. The gate dielectric layer structure has a positive capacitance. The ferroelectric layer has a negative capacitance. The gate dielectric layer structure includes a charge tunneling layer, a charge trap layer and a charge barrier layer disposed on the channel layer.

Abstract: A semiconductor device according to an embodiment includes a substrate, a source electrode layer and a drain electrode layer that are disposed to be spaced apart from each other on the substrate, an active layer disposed on the substrate to contact the source electrode layer and the drain electrode layer, and a gate electrode layer disposed on the active layer. The active layer includes metal oxide capable of exsolving and reincorporating metal particles. The electrical resistance in the active layer is configured to be reversibly changed by exsolution and reincorporation of the metal particles.

Abstract: A semiconductor device according to an embodiment includes a substrate, and a gate structure disposed over the substrate. The gate structure includes a hole pattern including a central axis extending in a direction perpendicular to a surface of the substrate. The gate structure includes a gate electrode layer and an interlayer insulation layer, which are alternately stacked along the central axis. The semiconductor device includes a ferroelectric layer disposed adjacent to a sidewall surface of the gate electrode layer inside the hole pattern, and a channel layer disposed adjacent to the ferroelectric layer inside the hole pattern. In this case, one of the gate electrode layer and the interlayer insulation layer protrudes toward the central axis of the hole pattern relative to the other one of the gate electrode layer and the interlayer insulation layer.

Abstract: A semiconductor device according to an embodiment of the present disclosure includes a substrate, a resistance change layer disposed on the substrate and including a plurality of carbon nanostructures, a channel layer disposed on the resistance change layer, a gate electrode layer disposed on the channel layer, and a source electrode layer and a drain electrode layer disposed to contact portions of the channel layer.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, and a gate structure disposed over the substrate. The gate structure includes at least one gate electrode layer pattern and at least one gate insulation layer pattern, which are alternately stacked along a first direction perpendicular to the upper surface. The gate structure extends in a second direction perpendicular to the first direction. The nonvolatile memory device includes a ferroelectric layer disposed on at least a portion of one sidewall surface of the gate structure. The one sidewall surface of the gate structure forms a plane substantially parallel to the first and second directions. The nonvolatile memory device includes a channel layer disposed on the ferroelectric layer, and a source electrode structure and a drain electrode structure disposed to contact the channel layer and spaced apart from each other in the second direction.

Abstract: A method for operating an apparatus for predicting confirmed cases of an infectious disease is provided. The method comprises predicting infectious disease information per country, including an infection risk per country, expected number of entrants per country, and number of imported cases per country, based on collected epidemic statistics data per country and inflow data between a corresponding country and a destination country, grouping two or more countries based on geographic or economic relevance, and correcting the infectious disease information per country of countries within a grouped group according to a contagion risk impact set depending on a correlation between the countries within the group, and predicting total number of imported cases flowing into the destination country by re-correcting the infectious disease information per country through applying a correlation for the confirmed cases of the infectious disease between groups to the infectious disease information per country.

Abstract: An outlier detection device sets a weight for a kernel center of a grid cell based on a distribution of the data disposed on the grid cell region, calculates a cumulative change of a weight for each corresponding kernel center, sets a stationary region in the grid cell region based on the cumulative change, maintains a density of a kernel center of the stationary region as a previous density, calculates a density of a kernel center excluding the stationary region to update the calculated density, estimates a density of multidimensional data at the current time, and detects an arbitrary number of outliers based on a relative difference between the density of the multidimensional data and a density of a kernel center nearest to the multidimensional data.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, a source electrode structure disposed on the substrate, and a channel structure disposed over the substrate and disposed to contact one sidewall surface of the source electrode structure. In addition, the nonvolatile memory device includes a drain electrode structure disposed to contact one sidewall surface of the channel structure over the substrate. In addition, the nonvolatile memory device includes a plurality of ferroelectric structures extending in a first direction perpendicular to the substrate in the channel structure and disposed to be spaced apart from each other along the second direction perpendicular to the first direction. In addition, the nonvolatile memory device includes a gate electrode structure disposed in each of the plurality of ferroelectric structure to extend along the first direction.

Abstract: A nonvolatile memory device according to an aspect of the present disclosure includes a substrate having a channel layer, a gate dielectric layer structure disposed on the channel layer, a ferroelectric layer disposed on the gate dielectric layer structure, and a gate electrode layer disposed on the ferroelectric layer. The gate dielectric layer structure has a positive capacitance. The ferroelectric layer has a negative capacitance. The gate dielectric layer structure includes a charge tunneling layer, a charge trap layer and a charge barrier layer disposed on the channel layer.

Abstract: In a method, a stack structure including a plurality of first interlayer sacrificial layers and a plurality of second interlayer sacrificial layers that are alternately stacked is formed over a substrate. A trench penetrating the stack structure is formed. A channel layer covering a sidewall surface of the trench is formed. The plurality of first interlayer sacrificial layers are selectively removed to form a plurality of first recesses. The plurality of first recesses are filled with a conductive material to form a plurality of channel contact electrode layers. The plurality of second interlayer sacrificial layers are selectively removed to form a plurality of second recesses. A plurality of interfacial insulation layers, a plurality of ferroelectric layers and a plurality of gate electrode layers are formed in the plurality of second recesses.

Abstract: A ferroelectric memory device according to an aspect of the present disclosure includes a substrate having a channel layer, a first ferroelectric layer disposed on the channel layer, a ferroelectric induction layer disposed on the first ferroelectric layer, the ferroelectric induction layer including an insulator, a second ferroelectric layer disposed on the ferroelectric induction layer, and a gate electrode layer disposed on the second ferroelectric layer.