Patents by Inventor Jae-gil Lee

Jae-gil Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9824667
    Abstract: An image processing apparatus is provided including: a plurality of buffers, a first buffer from a among the plurality of buffers storing a first frame; and a controller configured to obtain frame information of a second frame, which includes second object information about a second object added in the second frame and second object location information indicating a second object area that is an area of the second object in the second frame, detect a duplicate area in the first frame, copy the duplicate area stored in the first buffer to a second buffer from among the plurality of buffers, and draw the second object in the second buffer based on the frame information.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: November 21, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-young Jung, Tae-young Lee, Woo-ram Ann, Jae-gil Lee, Cheul-hee Hahm
  • Publication number: 20170249158
    Abstract: An electronic apparatus and a booting method thereof are provided. The electronic apparatus includes an inputter configured to receive a power-on command, and a memory configured to store task-processing information of tasks for each booting mode. The electronic apparatus further includes a processor configured to, in response to the reception of the power-on command, determine a booting mode, based on use information of the electronic apparatus, determine a priority order and an affinity of each of the tasks for the determined booting mode, based on the task-processing information of the tasks for the determined booting mode, and process the tasks for the determined booting mode, based on the determined priority order and affinity of each of the tasks for the determined booting mode, to boot the electronic apparatus.
    Type: Application
    Filed: January 13, 2017
    Publication date: August 31, 2017
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Surng-Kyo OH, Ju-hwan SONG, Hyung-joon KIM, Bong-won SEO, Jae-gil LEE, Cheul-hee HAHM
  • Publication number: 20170179225
    Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.
    Type: Application
    Filed: March 9, 2017
    Publication date: June 22, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jae-gil LEE, Jin-myung KIM, Kwang-won LEE, Kyoung-deok KIM, Ho-cheol JANG
  • Publication number: 20170054009
    Abstract: A superjunction semiconductor device includes a first semiconductor layer doped with a first conductivity type; an active region formed on the first semiconductor layer, the active region including a drift layer; and a termination region disposed to surround the active region, the termination region including a lower edge region disposed on a side surface of the drift layer and an upper edge region disposed on the lower edge region, wherein the upper edge region includes a lower charge balance region disposed on the lower edge region, the lower charge balance region having a second conductivity type different from the first conductivity type, and an upper charge balance region disposed on the lower charge balance region, the upper charge balance region having the first conductivity type.
    Type: Application
    Filed: August 19, 2016
    Publication date: February 23, 2017
    Inventors: Kwang-won LEE, Hye-min KANG, Jae-gil LEE
  • Publication number: 20160171957
    Abstract: An image processing apparatus is provided including: a plurality of buffers, a first buffer from a among the plurality of buffers storing a first frame; and a controller configured to obtain frame information of a second frame, which includes second object information about a second object added in the second frame and second object location information indicating a second object area that is an area of the second object in the second frame, detect a duplicate area in the first frame, copy the duplicate area stored in the first buffer to a second buffer from among the plurality of buffers, and draw the second object in the second buffer based on the frame information.
    Type: Application
    Filed: October 20, 2015
    Publication date: June 16, 2016
    Inventors: Joo-young JUNG, Tae-young LEE, Woo-ram ANN, Jae-gil LEE, Cheul-hee HAHM
  • Publication number: 20160110372
    Abstract: Provided is a method of providing a location-based social search service. The method includes collecting, from a social network system, one or more pieces of visit history information including at least one of visit information of social search service users in association with at least a place and review data associated with the place, and storing the collected information; selecting a topic for each topic category from the visit history information; when a location-based query is received from at least one of the users, extracting a topic for each topic category from the location-based query; analyzing, for each topic category, a relationship between the topic extracted from the location-based query and the topic selected from the visit history information, and selecting at least one of the users as an expert.
    Type: Application
    Filed: March 2, 2015
    Publication date: April 21, 2016
    Applicants: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-Sik CHO, Jae-Gil LEE, Min-Soo CHOY, Cheol-Ju HWANG
  • Publication number: 20160019264
    Abstract: A system joins predicate evaluated column bitmaps having varying lengths. The system includes a column unifier for querying column values with a predicate and generating an indicator bit for each of the column values that is then joined with the respective column value. The system also includes a bitmap generator for creating a column-major linear bitmap from the column values and indicator bits. The column unifier also determines an offset between adjacent indicator bits. The system also includes a converter for multiplying the column-major linear bitmap with a multiplier to shift the indicator bits into consecutive positions in the linear bitmap.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Applicant: International Business Machines Corporation
    Inventors: Ronald J Barber, Min-Soo Kim, Jae Gil Lee, Sam S. Lightstone, Guy M. Lohman, Lin Qiao, Vijayshankar Raman, Richard S. Sidle
  • Publication number: 20160011727
    Abstract: A display apparatus and a method for displaying a highlight thereof are provided. The method for displaying a highlight on a display apparatus includes determining a shape and a size of a menu item selected by a user, determining a plurality of source images to be used to generate a highlight with respect to the menu item according to whether the highlight has symmetry based on the shape of the menu item, and generating the highlight with respect to the menu item by magnifying a size of the plurality of source images according to the size of the menu item and displaying the generated highlight.
    Type: Application
    Filed: July 10, 2015
    Publication date: January 14, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-ram ANN, Tae-young LEE, Cheul-hee HAHM, Jae-gil LEE
  • Patent number: 9176999
    Abstract: A system joins predicate evaluated column bitmaps having varying lengths. The system includes a column unifier for querying column values with a predicate and generating an indicator bit for each of the column values that is then joined with the respective column value. The system also includes a bitmap generator for creating a column-major linear bitmap from the column values and indicator bits. The column unifier also determines an offset between adjacent indicator bits. The system also includes a converter for multiplying the column-major linear bitmap with a multiplier to shift the indicator bits into consecutive positions in the linear bitmap.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: November 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Ronald J. Barber, Min-Soo Kim, Jae Gil Lee, Sam S. Lightstone, Guy M. Lohman, Lin Qiao, Vijayshankar Raman, Richard S. Sidle
  • Patent number: 9171946
    Abstract: Exemplary embodiments of the present invention disclose a unidirectional heterojunction transistor including a channel layer made of a first nitride-based semiconductor having a first energy bandgap, a barrier layer made of a second nitride-based semiconductor having a second energy bandgap different from the first energy bandgap, the barrier layer including a recess, a drain electrode disposed on a first region of the barrier layer, and a recessed-drain Schottky electrode disposed in the recess of the barrier layer, the recessed-drain Schottky electrode contacting the drain electrode.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: October 27, 2015
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: June Sik Kwak, Young Do Jong, Ho Young Cha, Bong Ryeol Park, Jae Gil Lee, Kwan Hyun Lee
  • Patent number: 9070713
    Abstract: A power semiconductor device includes: a drain region of a first conductive type; a drift region of a first conductive type formed on the drain region; a first body region of a second conductive type formed below an upper surface of the drift region; a second body region of a second conductive type formed below the upper surface of the drift region and in the first body region; a third body region of a second conductive type formed by protruding downwards from a lower end of the first body region; a source region of a first conductive type formed below the upper surface of the drift region and in the first body region; and a gate insulating layer formed on channel regions of the first body region and on the drift region between the first body regions.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: June 30, 2015
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jin-myung Kim, Se-woong Oh, Jae-gil Lee, Young-chul Choi, Ho-cheol Jang
  • Publication number: 20150046548
    Abstract: A method for reproducing content by a terminal includes reproducing content received from a content providing system, receiving a first message through a user interface of the terminal while the content is being reproduced, and transmitting time information of the content at which the first message was input and the first message to a message management system.
    Type: Application
    Filed: December 4, 2012
    Publication date: February 12, 2015
    Inventors: Jae-Gil Lee, Juyup Sung
  • Publication number: 20140252370
    Abstract: Exemplary embodiments of the present invention disclose a unidirectional heterojunction transistor including a channel layer made of a first nitride-based semiconductor having a first energy bandgap, a barrier layer made of a second nitride-based semiconductor having a second energy bandgap different from the first energy bandgap, the barrier layer including a recess, a drain electrode disposed on a first region of the barrier layer, and a recessed-drain Schottky electrode disposed in the recess of the barrier layer, the recessed-drain Schottky electrode contacting the drain electrode.
    Type: Application
    Filed: March 5, 2014
    Publication date: September 11, 2014
    Applicant: Seoul Semiconductor Co., Ltd.
    Inventors: June Sik KWAK, Young Do Jong, Ho Young Cha, Bong Ryeol Park, Jae Gil Lee, Kwan Hyun Lee
  • Publication number: 20140149430
    Abstract: A method of detecting an overlapping community in a network including nodes and links between the nodes, includes calculating a similarity between the links, and generating a line graph of the network. The method further includes detecting one or more cores in the line graph, and growing a cluster for each of the one or more cores. The method further includes converting the cluster into a cluster of nodes of a node graph.
    Type: Application
    Filed: June 28, 2013
    Publication date: May 29, 2014
    Inventors: Seungwoo RYU, Sejeong KWON, Jae-Gil LEE, Sungsu LIM
  • Publication number: 20140141584
    Abstract: A power semiconductor device includes: a drain region of a first conductive type; a drift region of a first conductive type formed on the drain region; a first body region of a second conductive type formed below an upper surface of the drift region; a second body region of a second conductive type formed below the upper surface of the drift region and in the first body region; a third body region of a second conductive type formed by protruding downwards from a lower end of the first body region; a source region of a first conductive type formed below the upper surface of the drift region and in the first body region; and a gate insulating layer formed on channel regions of the first body region and on the drift region between the first body regions.
    Type: Application
    Filed: January 27, 2014
    Publication date: May 22, 2014
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventors: Jin-myung KIM, Se-woong OH, Jae-gil LEE, Young-chul CHOI, Ho-cheol JANG
  • Patent number: 8716085
    Abstract: A method of fabricating a high-voltage semiconductor device includes the following steps: providing a semiconductor layer; forming a plurality of trenches in the semiconductor layer to define a plurality of pillars of a first conductivity type in the semiconductor layer between adjacent trenches, wherein the trenches extend from a top surface of the semiconductor layer toward a bottom surface of the semiconductor layer; forming a charge compensation layer of a second conductivity type over at least sidewalls of each trench to a predetermined thickness thereby forming a groove in each trench; and substantially filling each groove with a charge compensation plug of the first conductivity type.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: May 6, 2014
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Jae-gil Lee, Chang-wook Kim, Ho-cheol Jang, Chong-man Yun
  • Patent number: 8674402
    Abstract: A power semiconductor device includes: a drain region of a first conductive type; a drift region of a first conductive type formed on the drain region; a first body region of a second conductive type formed below an upper surface of the drift region; a second body region of a second conductive type formed below the upper surface of the drift region and in the first body region; a third body region of a second conductive type formed by protruding downwards from a lower end of the first body region; a source region of a first conductive type formed below the upper surface of the drift region and in the first body region; and a gate insulating layer formed on channel regions of the first body region and on the drift region between the first body regions.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: March 18, 2014
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jin-myung Kim, Se-woong Oh, Jae-gil Lee, Young-chul Choi, Ho-cheol Jang
  • Publication number: 20140074818
    Abstract: A system joins predicate evaluated column bitmaps having varying lengths. The system includes a column unifier for querying column values with a predicate and generating an indicator bit for each of the column values that is then joined with the respective column value. The system also includes a bitmap generator for creating a column-major linear bitmap from the column values and indicator bits. The column unifier also determines an offset between adjacent indicator bits. The system also includes a converter for multiplying the column-major linear bitmap with a multiplier to shift the indicator bits into consecutive positions in the linear bitmap.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 13, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ronald J. Barber, Min-Soo Kim, Jae Gil Lee, Sam S. Lightstone, Guy M. Lohman, Lin Qiao, Vijayshankar Raman, Richard S. Sidle
  • Publication number: 20130138923
    Abstract: Described herein are methods, systems, apparatuses and products for multithreaded data merging for multi-core central and graphical processing units. An aspect provides for executing a plurality of threads on at least one central processing unit comprising a plurality of cores, each thread comprising an input data set (IDS) and being executed on one of the plurality of cores; initializing at least one local data set (LDS) comprising a size and a threshold; inserting IDS data elements into the at least one LDS such that each inserted IDS data element increases the size of the at least one LDS; and merging the at least one LDS into a global data set (GDS) responsive to the size of the at least one LDS being greater than the threshold. Other aspects are disclosed herein.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES
    Inventors: Ronald Jason Barber, Min-Soo Kim, Jae Gil Lee, Lin Qiao, Vijayshankar Raman, Richard S. Sidle
  • Publication number: 20120299094
    Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.
    Type: Application
    Filed: January 19, 2012
    Publication date: November 29, 2012
    Inventors: Jae-gil LEE, Jin-myung KIM, Kwang-won LEE, Kyoung-deok KIM, Ho-cheol JANG