Abstract: A printed circuit board includes a first insulating layer, a second insulating layer disposed on a lower surface of the first insulating layer, an electronic component embedded in the second insulating layer and at least partially in contact with the first insulating layer, a first wiring layer disposed on an upper surface of the first insulating layer, a second wiring layer disposed on a lower surface of the second insulating layer, and a first wiring via penetrating through the first and second insulating layers and connecting at least portions of the first and second wiring layers to each other.

Abstract: An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of the antenna. An uppermost wiring layer of the plurality of wiring layers is connected to the antenna through a connection via of an uppermost via layer of the plurality of via layers. The connection via penetrates at least a portion of the encapsulant.

Abstract: A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes a wiring substrate including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers and having a cavity penetrating through a portion of the plurality of insulating layers, a passive component disposed in the cavity and including an external electrode electrically connected to at least one of the plurality of wiring layers, and a bridge disposed on the passive component in the cavity and including one or more circuit layers electrically connected to the external electrode.

Abstract: A printed circuit board includes a wiring board including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers, a first die embedded in the plurality of insulating layers, a bridge embedded on the first die in the plurality of insulating layers, a second die mounted on the wiring board, and a third die mounted on the wiring board.

Abstract: A cooling device for a high voltage battery may include: a plurality of battery coolers mounted on the plurality of high voltage batteries, respectively, and configured to cool the high voltage batteries through cooling fluid; a fluid distributor configured to receive cooling fluid from outside, and distribute the cooling fluid to the battery coolers; and a flow control member coupled to the fluid distributor, and configured to control a flow rate of the cooling fluid distributed to the battery coolers.

Abstract: A connection structure embedded substrate includes a printed circuit board including a first insulating body and a plurality of first wiring layers disposed on at least one of an external region or an internal region of the first insulating body; and a connection structure embedded in the first insulating body and including first and second substrates. The first and second substrates are disposed adjacent to each other.

Abstract: The present disclosure relates to an autonomous vehicle system or a driver assistance system that detects an object in front of the vehicle, judges whether a condition calls for an operation of a lateral movement system for collision avoidance, determines a direction of the lateral movement, and executes the lateral movement.

Abstract: A semiconductor device with multiple zero differential transconductance includes: a conductive substrate; a first insulating layer and a second insulating layer disposed on the conductive substrate; a first semiconductor and a second semiconductor disposed on first portions of the first insulating layer and the second insulating layer, respectively; a first buffer layer and a second buffer layer disposed on electrode contact areas of the first semiconductor and the second semiconductor, respectively; and an anode electrode and a cathode electrode disposed on second portions, which are different from the first portions, of the first insulating layer and the second insulating layer and on the first buffer layer and the second buffer layer, respectively, wherein the first semiconductor and the second semiconductor are disposed in parallel with each other and connected by the anode electrode and the cathode electrode.

Abstract: A connection structure embedded substrate includes a printed circuit board including a first insulating body and a plurality of first wiring layers disposed on at least one of an external region or an internal region of the first insulating body; and a connection structure embedded in the first insulating body and including first and second substrates. The first and second substrates are disposed adjacent to each other.

Abstract: A multi-negative differential transconductance device includes a substrate conductive portion; a gate insulating layer formed by being laminated on the substrate conductive portion; a first semiconductor, a second semiconductor, and a third semiconductor which have different threshold voltages and are formed to be horizontally connected in series on the gate insulating layer; and an electrode formed at both ends of the first semiconductor and the third semiconductor. The multi-negative differential transconductance device forms a junction of three or more semiconductor materials in one device to have a plurality of peaks and valleys so that the multi-negative differential transconductance device is utilized to implement a multi-valued logic circuit which is capable of representing four or more logical states without significantly increasing an area of the negative differential transconductance device which occupies the chip.

Abstract: A radio frequency package includes a first connection member having a first stack structure including at least one first insulating layer and at least one first wiring layer; a second connection member having a second stack structure including at least one second insulating layer and at least one second wiring layer; a core member including a core insulating layer and disposed between the first and second connection members; and a first chip antenna disposed to be surrounded by the core insulating layer. The first chip antenna includes a first dielectric layer disposed to be surrounded by the core insulating layer; a patch antenna pattern disposed on an upper surface of the first dielectric layer; and a feed via disposed to at least partially penetrate the first dielectric layer, providing a feed path of the patch antenna pattern and connected to the at least one first wiring layer.

Abstract: A printed circuit board includes a core layer having a first through-portion, a coil structure disposed in the first through-portion and comprising a support member, a first coil pattern in a planar spiral form disposed on one surface of the support member, and a body comprising a magnetic substance, wherein the support member and the first coil pattern are accommodated in the body, a first build-up layer covering at least a portion the core layer and disposed in at least a portion of the first through-portion, a first wiring layer disposed on one surface of the first build-up layer, and a first via layer passing through at least a portion of the first build-up layer and connected to the first wiring layer. The first via layer comprises a first wiring via connecting at least a portion of the first wiring layer to the first coil pattern.

Abstract: An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; a heat dissipation structure disposed around the antenna on the upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of each of the antenna and the heat dissipation structure.

Abstract: An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of the antenna. An uppermost wiring layer of the plurality of wiring layers is connected to the antenna through a connection via of an uppermost via layer of the plurality of via layers. The connection via penetrates at least a portion of the encapsulant.

Abstract: A radio frequency package includes a first connection member having a first stack structure including at least one first insulating layer and at least one first wiring layer; a second connection member having a second stack structure including at least one second insulating layer and at least one second wiring layer; a core member including a core insulating layer and disposed between the first and second connection members; and a first chip antenna disposed to be surrounded by the core insulating layer. The first chip antenna includes a first dielectric layer disposed to be surrounded by the core insulating layer; a patch antenna pattern disposed on an upper surface of the first dielectric layer; and a feed via disposed to at least partially penetrate the first dielectric layer, providing a feed path of the patch antenna pattern and connected to the at least one first wiring layer.

Abstract: A printed circuit board includes a first insulating layer, a second insulating layer disposed on a lower surface of the first insulating layer, an electronic component embedded in the second insulating layer and at least partially in contact with the first insulating layer, a first wiring layer disposed on an upper surface of the first insulating layer, a second wiring layer disposed on a lower surface of the second insulating layer, and a first wiring via penetrating through the first and second insulating layers and connecting at least portions of the first and second wiring layers to each other.

Abstract: A printed circuit board includes a core layer having a through portion, a magnetic member disposed in the through portion and comprising a magnetic layer, a first coil pattern attached to one surface of the magnetic layer via an adhesive, and a first build-up layer covering at least a portion of the core layer, at least a portion of the magnetic member, and at least a portion of the first coil pattern, and disposed in at least a portion of the through portion.

Abstract: A printed circuit board includes a first core layer having a first coil pattern disposed on one surface of the first core layer, a second core layer disposed on the one surface of the first core layer and having a first recess, a first magnetic member disposed in the first recess and including a first magnetic layer, a first insulating layer disposed between the first and second core layers, and a second insulating layer disposed on the second core layer, covering at least a portion of the first magnetic member, and disposed in at least a portion of the first recess.

Abstract: A multi-negative differential transconductance device includes a substrate conductive portion; a gate insulating layer formed by being laminated on the substrate conductive portion; a first semiconductor, a second semiconductor, and a third semiconductor which have different threshold voltages and are formed to be horizontally connected in series on the gate insulating layer; and an electrode formed at both ends of the first semiconductor and the third semiconductor. The multi-negative differential transconductance device forms a junction of three or more semiconductor materials in one device to have a plurality of peaks and valleys so that the multi-negative differential transconductance device is utilized to implement a multi-valued logic circuit which is capable of representing four or more logical states without significantly increasing an area of the negative differential transconductance device which occupies the chip.

Abstract: A printed circuit board includes a first core layer having a first coil pattern disposed on one surface of the first core layer, a second core layer disposed on the one surface of the first core layer and having a first recess, a first magnetic member disposed in the first recess and including a first magnetic layer, a first insulating layer disposed between the first and second core layers, and a second insulating layer disposed on the second core layer, covering at least a portion of the first magnetic member, and disposed in at least a portion of the first recess.