Patents by Inventor Jae-Yoon Lee

Jae-Yoon Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11995887
    Abstract: A developed impact mark analysis apparatus includes: an image acquisition unit configured to obtain at least one first image by photographing impact marks that are developed, and to obtain a second image of impact marks at a crime scene that are developed from evidence at the crime scene; an outliner configured to outline the at least one first image to obtain at least one first outline image, and to outline the second image to obtain a second outline image; a database configured to store the first outline image corresponding to related tool characteristic information; a matching unit configured to search the database for the first outline image determined to be similar to the second outline image and match them with each other; a display unit; and a user input unit.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: May 28, 2024
    Assignee: REPUBLIC OF KOREA (NATIONAL FORENSIC SERVICE DIRECTOR MINISTRY OF THE INTERIOR AND SAFETY)
    Inventors: Nam Kyu Park, Byung Seon Moon, Jae Mo Goh, Jin Pyo Kim, Young Il Seo, Eun Ah Joo, Je Hyun Lee, Sang Yoon Lee
  • Patent number: 11991926
    Abstract: Disclosed is an organic electroluminescent device including a first electrode, one or more organic material layers, and a second electrode, wherein the organic material layer includes a light emitting layer, wherein one or more layers of the organic material layer contain a compound represented by Chemical Formula 1, wherein the light emitting layer contains a compound represented by Chemical Formula 2. The organic electroluminescent device has lowered drive voltage, and improved efficiency and lifespan characteristics.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: May 21, 2024
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Inbum Song, Seunghee Yoon, Sunghoon Kim, Seong-Min Park, Tae Wan Lee, Jae Ho Jeong, Jiwoong Yoo
  • Patent number: 11991646
    Abstract: A power management apparatus, includes an artificial intelligence (AI) controller configured to monitor a user pattern, based on frequency band selection information of all users using a base station, to predict the user pattern, and a DC-DC converter configured to output a supply voltage based on the predicted user pattern.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: May 21, 2024
    Assignees: SKAICHIPS CO., LTD., Research & Business Foundation Sungkyunkwan University
    Inventors: Kang Yoon Lee, Jong Wan Jo, Young Gun Pu, Dong Soo Park, Joon Hong Park, Jae Bin Kim, Yun Gwan Kim
  • Publication number: 20240138565
    Abstract: A shoe management apparatus including a cabinet including an inner space for storing shoes, an exhaust port disposed at a rear surface of the inner space and discharging air into the inner space, and a front discharge port disposed at an upper surface of the cabinet and discharging air from the inner space to outside of the shoe management apparatus.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Applicant: LG ELECTRONICS INC.
    Inventors: Hyunsun YOO, Jeong Guen CHOI, Joohyeon OH, Jae Myung LIM, Byoungjoon HAN, Sang Yoon LEE, Hyunju KIM, Jeaseok SEONG
  • Patent number: 11970566
    Abstract: Disclosed is a method of manufacturing a polyurethane filter foam having excellent air permeability, elasticity, and restoring force. In the method of manufacturing the polyurethane filter foam, the cell size of the filter foam is made regular by controlling the pressure by adjusting the diameter of the foaming head of a foaming machine, rather than adding a cell opener, cell irregularity caused by poor dispersion of the cell opener is alleviated, and air permeability, porosity, and compression set are excellent.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: April 30, 2024
    Assignees: HYUNDAI TRANSYS INC., CHIN YANG CO., LTD.
    Inventors: Jae Yong Ko, Seung Keon Woo, Young Tae Cho, Won Sug Choi, Sung Yoon Lee, Jae Kwang Lee, Jun Ho Song
  • Patent number: 11969397
    Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 30, 2024
    Assignee: THE CATHOLIC UNIVERSITY OF KOREA INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Mi-La Cho, Dong-Yun Shin, Jong-Young Choi, Chul-Woo Yang, Sung-Hwan Park, Seon-Yeong Lee, Min-Jung Park, Joo-Yeon Jhun, Se-Young Kim, Hyeon-Beom Seo, Jae-Yoon Ryu, Keun-Hyung Cho
  • Publication number: 20240129641
    Abstract: An image processing device including: a gain value manager for generating white gain values corresponding to a plurality of positions, based on a sensing result of a predetermined white image; a target pixel manager for detecting saturated pixels, based on pixel values received from an external device, and determining target pixels as saturated white pixels of which each have a pixel value that indicates that the saturated white pixel is saturated, based on peripheral pixels of the saturated white pixels among the detected saturated pixels; and a target pixel corrector for changing pixel values of the target pixels, based on the white gain values and pixel values of the peripheral pixels.
    Type: Application
    Filed: March 16, 2023
    Publication date: April 18, 2024
    Applicant: SK hynix Inc.
    Inventors: Jeong Yong SONG, Dong Gyun KIM, Jae Yoon YOO, Bo Ra LEE
  • Patent number: 11949881
    Abstract: The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: April 2, 2024
    Assignees: Electronics and Telecommunications Research Institute, Kwangwoon University Research Institute for Industry Cooperation, Industry-Academia Cooperation Group of Sejong University
    Inventors: Se-Yoon Jeong, Hae-Chul Choi, Jeong-Il Seo, Seung-Kwon Beack, In-Seon Jang, Jae-Gon Kim, Kyung-Ae Moon, Dae-Young Jang, Jin-Woo Hong, Jin-Woong Kim, Yung-Lyul Lee, Dong-Gyu Sim, Seoung-Jun Oh, Chang-Beom Ahn, Dae-Yeon Kim, Dong-Kyun Kim
  • Patent number: 11945864
    Abstract: A monoclonal antibody or an antigen-binding fragment thereof according to an embodiment of the present invention can bind to lymphocyte-activation gene 3 (LAG-3) including a heavy chain variable region and a light chain variable region and inhibit the activity thereof. Thus it is expected to be useful for the development of immunotherapeutic agents for various disorders that are associated with LAG-3.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: April 2, 2024
    Assignee: Y-BIOLOGICS INC.
    Inventors: Sang Pil Lee, Ji-Young Shin, Sunha Yoon, Yunseon Choi, Jae Eun Park, Ji Su Lee, Youngja Song, Gisun Baek, Seok Ho Yoo, Yeung-chul Kim, Dong Jung Lee, Bum-Chan Park, Young Woo Park
  • Patent number: 11944661
    Abstract: The present invention provides a pharmaceutical composition for prevention or treatment of a stress disease and depression, the pharmaceutical composition be safely useable without toxicity and side effects by using an extract of leaves of Vaccinium bracteatum Thunb., which is natural resource of Korea, so that the reduction of manufacturing and production costs and the import substitution and export effects can be expected through the replacement of a raw material for preparation with a plant inhabiting in nature.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: April 2, 2024
    Assignee: JEONNAM BIOINDUSTRY FOUNDATION
    Inventors: Chul Yung Choi, Dool Ri Oh, Yu Jin Kim, Eun Jin Choi, Hyun Mi Lee, Dong Hyuck Bae, Kyo Nyeo Oh, Myung-A Jung, Ji Ae Hong, Kwang Su Kim, Hu Won Kang, Jae Yong Kim, Sang O Pan, Sung Yoon Park, Rack Seon Seong
  • Publication number: 20240088021
    Abstract: There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of interlayer insulating layers and a plurality of gate conductive layers, which are stacked in an alternating manner; at least one support structure penetrating the stack structure in a substantially vertical manner, the at least one support structure being formed in a contact region; and a contact plug penetrating the stack structure in a substantially vertical manner, the contact plug being formed in the contact region, the contact plug being connected to a contact pad that is disposed on the bottom of the stack structure. The at least one support structure is formed of an oxide layer.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: SK hynix Inc.
    Inventors: Jae Yoon NOH, Tae Kyung KIM, Hyo Sub YEOM, Jeong Yun LEE
  • Patent number: 11918112
    Abstract: A shoe management apparatus capable of managing various types of shoes and including a cabinet defining an inner space for storing shoes; and a partition dividing the inner space into an upper first compartment and a lower second compartment, formed therein with a fluid path along which air is discharged into the inner space, and variable in length with respect to a front-to-rear direction of the shoe management apparatus.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: March 5, 2024
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyunsun Yoo, Jeong Guen Choi, Joohyeon Oh, Jae Myung Lim, Byoungjoon Han, Sang Yoon Lee, Hyunju Kim, Jeaseok Seong
  • Publication number: 20240070197
    Abstract: Provided is a method of providing a user interface for video retrieval performed by a computing device, the method including: receiving a search query, providing a search result interface displaying at least one search video content and search section searched by the search query, wherein the search video content and the search section are related with at least one of a plurality of video semantic search attributes corresponding to the search query, and providing a timeline view interface for the search video content when it is determined to display the search result interface according to a timeline view mode, wherein the timeline view interface has a visual characteristic indicating the degree of relevance to at least one of the plurality of video semantic search attributes corresponding to the search query.
    Type: Application
    Filed: November 10, 2022
    Publication date: February 29, 2024
    Inventors: Seung Joon Lee, Haram Jo, Eunkyung Yoon, Soyoung Lee, Jae Sung Lee
  • Patent number: 11158732
    Abstract: A 1T DRAM cell device having two or more heterojunction surfaces perpendicular to the channel length direction and a quantum well at the drain region side. The 1T DRAM cell device described herein may be driven by GIDL or band-to-band tunneling, so that low voltage and high speed operation can be performed, and retention time and read current margin can be dramatically increased. It can also be driven as a memory device in harsh environments with high temperatures. Furthermore, since the heterojunction surfaces can be formed by vertically stacking epitaxial layers on a semiconductor substrate such as silicon, the conventional CMOS process technology can be used, and the area occupied by the device can be reduced as much as possible without limiting the channel length.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: October 26, 2021
    Inventors: Seongjae Cho, EunSeon Yu, Jae Yoon Lee
  • Patent number: 11049569
    Abstract: An operating method of controller includes estimating, by a mean-bias manager, candidates of a mean bias voltage based on source read voltages corresponding to respective program states; determining, by a reliability interval manager, whether the candidates of the mean bias voltage are within confidence intervals respectively corresponding to the program states; selecting, by the reliability interval manager, the candidates of the mean bias voltage when the candidates of the mean bias voltage are within confidence intervals, respectively; deciding, by a read bias manager, target read voltages based on selected mean bias voltages or the selected candidates of the mean bias voltage; and reading, by a processor, target data according to the target read voltages.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: June 29, 2021
    Assignee: SK hynix Inc.
    Inventor: Jae-Yoon Lee
  • Patent number: 11017865
    Abstract: A memory controller for performing soft decoding according to a Cell Difference Probability (CDP) calculated based on a cell distribution controls a memory device. The memory controller for controlling the memory device, the memory controller comprising: an error corrector configured to correct an error in read data received from the memory device; a command generator configured to output, in response to failing an error correction operation of the error corrector, a cell distribution detection command for detecting threshold voltage distributions of memory cells included in the memory device; and a read voltage controller configured to determine, based on cell distribution detection data that the memory device provides in response to the cell distribution detection command, a number of read voltages for a read operation to be performed in the memory device and an interval between neighboring ones among the read voltages.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: May 25, 2021
    Assignee: SK hynix Inc.
    Inventor: Jae Yoon Lee
  • Publication number: 20210065816
    Abstract: A memory controller for performing soft decoding according to a Cell Difference Probability (CDP) calculated based on a cell distribution controls a memory device. The memory controller for controlling the memory device, the memory controller comprising: an error corrector configured to correct an error in read data received from the memory device; a command generator configured to output, in response to failing an error correction operation of the error corrector, a cell distribution detection command for detecting threshold voltage distributions of memory cells included in the memory device; and a read voltage controller configured to determine, based on cell distribution detection data that the memory device provides in response to the cell distribution detection command, a number of read voltages for a read operation to be performed in the memory device and an interval between neighboring ones among the read voltages.
    Type: Application
    Filed: December 27, 2019
    Publication date: March 4, 2021
    Inventor: Jae Yoon LEE
  • Patent number: 10908992
    Abstract: A controller for controlling a memory device includes a read control component suitable for controlling a recovery soft read operation of the memory device on bits contained in error correction-failed data groups, when error correction on data of a target data group and error correction on one or more of data of corresponding data groups failed; an error correction code (ECC) component suitable for performing the error correction, and performing a selective data recovery operation on the target data group depending on reliabilities of the respective bits, derived as a result of the recovery soft read operation; and a read bias determiner suitable for determining a recovery soft read voltage to maximize the number of bits recovered by the selective data recovery operation, among bits contained in the target data group.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: February 2, 2021
    Assignee: SK hynix Inc.
    Inventor: Jae-Yoon Lee
  • Patent number: 10866856
    Abstract: Designs of nonvolatile memory systems and memory operations that enable allocating reliability values associated with the hard data values from memory cells and performing an error correction operation for the hard data based on the reliability values. One example of a memory system includes a nonvolatile memory device including a plurality of memory cells, and a controller suitable for obtaining hard data by performing a hard read operation based on a hard read voltage for the memory cells, and performing an error correction operation for the hard data based on reliability values.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: December 15, 2020
    Assignee: SK hynix Inc.
    Inventor: Jae Yoon Lee
  • Publication number: 20200135905
    Abstract: A 1T DRAM cell device having two or more heterojunction surfaces perpendicular to the channel length direction and a quantum well at the drain region side. The 1T DRAM cell device described herein may be driven by GIDL or band-to-band tunneling, so that low voltage and high speed operation can be performed, and retention time and read current margin can be dramatically increased. It can also be driven as a memory device in harsh environments with high temperatures. Furthermore, since the heterojunction surfaces can be formed by vertically stacking epitaxial layers on a semiconductor substrate such as silicon, the conventional CMOS process technology can be used, and the area occupied by the device can be reduced as much as possible without limiting the channel length.
    Type: Application
    Filed: October 22, 2019
    Publication date: April 30, 2020
    Inventors: Seongjae Cho, EunSeon Yu, Jae Yoon Lee