Patents by Inventor Jan Willem Maes

Jan Willem Maes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10699899
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: June 30, 2020
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Publication number: 20200181769
    Abstract: Methods are disclosed herein for depositing a passivation layer comprising fluorine over a dielectric material that is sensitive to chlorine, bromine, and iodine. The passivation layer can protect the sensitive dielectric layer thereby enabling deposition using precursors comprising chlorine, bromine, and iodine over the passivation layer.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 11, 2020
    Inventors: Tom E. Blomberg, Eva E. Tois, Robert Huggare, Jan Willem Maes, Vladimir Machkaoutsan, Dieter Pierreux
  • Publication number: 20200176246
    Abstract: A method for forming ultraviolet (UV) radiation responsive metal-oxide containing film is disclosed. The method may include, depositing an UV radiation responsive metal oxide-containing film over a substrate by, heating the substrate to a deposition temperature of less than 400° C., contacting the substrate with a first vapor phase reactant comprising a metal component, a hydrogen component, and a carbon component, and contacting the substrate with a second vapor phase reactant comprising an oxygen containing precursor, wherein regions of the UV radiation responsive metal oxide-containing film have a first etch rate after UV irradiation and regions of the UV radiation responsive metal oxide-containing film not irradiated with UV radiation have a second etch rate, wherein the second etch rate is different from the first etch rate.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 4, 2020
    Inventors: Hannu Huotari, Jan Willem Maes
  • Patent number: 10665452
    Abstract: A method for improving source/drain performance through conformal solid state doping and its resulting device are disclosed. Specifically, the doping takes place through an atomic layer deposition of a dopant layer. Embodiments of the invention may allow for an increased doping layer, improved conformality, and reduced defect formation, in comparison to alternate doping methods, such as ion implantation or epitaxial doping.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: May 26, 2020
    Assignee: ASM IP Holdings B.V.
    Inventors: Qi Xie, David de Roest, Jacob Woodruff, Michael Eugene Givens, Jan Willem Maes, Timothee Blanquart
  • Patent number: 10643904
    Abstract: Methods for forming a semiconductor device and related semiconductor device structures are provided. In some embodiments, methods may include forming an NMOS gate dielectric and a PMOS gate dielectric over a substrate and forming a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. In some embodiments, methods may also include, removing the first work function metal over the NMOS gate dielectric and forming a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. In some embodiments, related semiconductor device structures may include an NMOS gate dielectric and a PMOS gate dielectric disposed over a semiconductor substrate. A PMOS gate electrode may be disposed over the PMOS gate dielectric and the PMOS gate electrode may include a first work function metal disposed over the PMOS gate dielectric and a second work function metal disposed over the first work function metal.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: May 5, 2020
    Assignee: ASM IP Holdings B.V.
    Inventors: Qi Xie, Michael Eugen Givens, Petri Raisanen, Jan Willem Maes
  • Patent number: 10607895
    Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: March 31, 2020
    Assignee: ASM IP Holdings B.V.
    Inventors: Qi Xie, Chiyu Zhu, Kiran Shrestha, Pauline Calka, Oreste Madia, Jan Willem Maes, Michael Eugene Givens
  • Patent number: 10566185
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: February 18, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen
  • Publication number: 20200051829
    Abstract: Processes are provided herein for deposition of organic films. Organic films can be deposited, including selective deposition on one surface of a substrate relative to a second surface of the substrate. For example, polymer films may be selectively deposited on a first metallic surface relative to a second dielectric surface. Selectivity, as measured by relative thicknesses on the different layers, of above about 50% or even about 90% is achieved. The selectively deposited organic film may be subjected to an etch process to render the process completely selective. Processes are also provided for particular organic film materials, independent of selectivity. Masking applications employing selective organic films are provided. Post-deposition modification of the organic films, such as metallic infiltration and/or carbon removal, is also disclosed.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Inventors: Eva E. Tois, Hidemi Suemori, Viljami J. Pore, Suvi P. Haukka, Varun Sharma, Jan Willem Maes, Delphine Longrie, Krzysztof Kachel
  • Patent number: 10553482
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: February 4, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen, Krzysztof Kachel, Harald Profijt
  • Patent number: 10551741
    Abstract: A method of forming a directed self-assembled (DSA) layer on a substrate by: providing a substrate; applying a layer comprising a self-assembly material on the substrate; and annealing of the self-assembly material of the layer to form a directed self-assembled layer by providing a controlled temperature and gas environment around the substrate. The controlled gas environment comprises molecules comprising an oxygen element with a partial pressure between 10-2000 Pa.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: February 4, 2020
    Assignees: ASM IP HOLDING B.V., IMEC vzw
    Inventors: Werner Knaepen, Jan Willem Maes, Maarten Stokhof, Roel Gronheid, Hari Pathangi Sriraman
  • Patent number: 10553424
    Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: February 4, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Suvi P. Haukka, Fu Tang, Michael E. Givens, Jan Willem Maes, Qi Xie
  • Patent number: 10513772
    Abstract: Methods are disclosed herein for depositing a passivation layer comprising fluorine over a dielectric material that is sensitive to chlorine, bromine, and iodine. The passivation layer can protect the sensitive dielectric layer thereby enabling deposition using precursors comprising chlorine, bromine, and iodine over the passivation layer.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: December 24, 2019
    Assignee: ASM International N.V.
    Inventors: Tom E. Blomberg, Eva E. Tois, Robert Huggare, Jan Willem Maes, Vladimir Machkaoutsan, Dieter Pierreux
  • Publication number: 20190378916
    Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.
    Type: Application
    Filed: June 26, 2019
    Publication date: December 12, 2019
    Inventors: Fu Tang, Qi Xie, Jan Willem Maes, Xiaoqiang Jiang, Michael Eugene Givens
  • Patent number: 10490475
    Abstract: In some embodiments, a semiconductor surface may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, native oxide is removed from the semiconductor surface and the surface is subsequently nitrided. In some other embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: November 26, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Qi Xie, Fu Tang, Michael Givens, Petri Raisanen, Jan Willem Maes, Xiaoqiang Jiang
  • Patent number: 10480064
    Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: November 19, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Delphine Longrie, Antti Juhani Niskanen, Han Wang, Qi Xie, Jan Willem Maes, Shang Chen, Toshiharu Watarai, Takahiro Onuma, Dai Ishikawa, Kunitoshi Namba
  • Patent number: 10453701
    Abstract: Processes are provided herein for deposition of organic films. Organic films can be deposited, including selective deposition on one surface of a substrate relative to a second surface of the substrate. For example, polymer films may be selectively deposited on a first metallic surface relative to a second dielectric surface. Selectivity, as measured by relative thicknesses on the different layers, of above about 50% or even about 90% is achieved. The selectively deposited organic film may be subjected to an etch process to render the process completely selective. Processes are also provided for particular organic film materials, independent of selectivity. Masking applications employing selective organic films are provided. Post-deposition modification of the organic films, such as metallic infiltration and/or carbon removal, is also disclosed.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: October 22, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Eva E. Tois, Hidemi Suemori, Viljami J. Pore, Suvi P. Haukka, Varun Sharma, Jan Willem Maes, Delphine Longrie, Krzysztof Kachel
  • Publication number: 20190259605
    Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
    Type: Application
    Filed: January 22, 2019
    Publication date: August 22, 2019
    Inventors: Suvi P. Haukka, Fu Tang, Michael E. Givens, Jan Willem Maes, Qi Xie
  • Patent number: 10367080
    Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: July 30, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Qi Xie, Jan Willem Maes, Xiaoqiang Jiang, Michael Eugene Givens
  • Patent number: 10361201
    Abstract: Semiconductor structures, devices, and methods of forming the structures and device are disclosed. Exemplary structures include multi-gate or FinFET structures that can include both n-channel MOS (NMOS) and p-channel MOS (PMOS) devices to form CMOS structures and devices on a substrate. The devices can be formed using selective epitaxy and shallow trench isolation techniques.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: July 23, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Qi Xie, Vladimir Machkaoutsan, Jan Willem Maes
  • Publication number: 20190163056
    Abstract: The method relates to a method of forming an enhanced unexposed photoresist layer from an unexposed photoresist layer on a substrate by increasing the sensitivity of the unexposed photoresist to exposure radiation. The method comprises: providing the substrate with the unexposed photoresist layer in a reaction chamber; providing a first precursor comprising a portion of a photosensitizer sensitive to exposure radiation in the reaction chamber; and, infiltrating the unexposed photoresist layer on the substrate with the first precursor.
    Type: Application
    Filed: October 22, 2018
    Publication date: May 30, 2019
    Inventors: Jan Willem Maes, Krzysztof Kamil Kachel, David Kurt de Roest