Patents by Inventor Janos Fucsko

Janos Fucsko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7491650
    Abstract: The invention includes an etchant composition containing isopropyl alcohol and one or more of HF, NH4F and tetramethyl ammonium fluoride (TMAF). The invention encompasses a method of processing a substrate. A substrate is provided which has a first material containing at least one of polysilicon, monocrystalline silicon and amorphous silicon, and a second material. The substrate is exposed to an etch composition which comprises isopropyl alcohol and at least one of HF, NH4F and TMAF. The invention includes a method of processing a semiconductor construction including providing a construction which has a capacitor electrode material and an oxide material along at least a portion of the capacitor electrode material. At least some of the oxide material is removed by isotropic etching utilizing an etchant composition comprising isopropyl alcohol.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: February 17, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, Grady S. Waldo, Joseph Wiggins, Prashant Raghu
  • Publication number: 20090017596
    Abstract: Some embodiments include methods of forming isolation regions in which spin-on material (for example, polysilazane) is converted to a silicon dioxide-containing composition. The conversion may utilize one or more oxygen-containing species (such as ozone) and a temperature of less than or equal to 300° C. In some embodiments, the spin-on material is formed within an opening in a semiconductor material to form a trenched isolation region. Other dielectric materials may be formed within the opening in addition to the silicon dioxide-containing composition formed from the spin-on material. Such other dielectric materials may include silicon dioxide formed by chemical vapor deposition and/or silicon dioxide formed by high-density plasma chemical vapor deposition.
    Type: Application
    Filed: July 9, 2007
    Publication date: January 15, 2009
    Inventors: Robert J. Hanson, Janos Fucsko
  • Patent number: 7439157
    Abstract: A method includes removing a portion of a substrate to define an isolation trench; forming a first dielectric layer on exposed surfaces of the substrate in the trench; forming a second dielectric layer on at least the first dielectric layer, the second dielectric layer containing a different dielectric material than the first dielectric layer; depositing a third dielectric layer to fill the trench; removing an upper portion of the third dielectric layer from the trench and leaving a lower portion covering a portion of the second dielectric layer; oxidizing the lower portion of the third dielectric layer after removing the upper portion; removing an exposed portion of the second dielectric layer from the trench, thereby exposing a portion of the first dielectric layer; and forming a fourth dielectric layer in the trench covering the exposed portion of the first dielectric layer.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: October 21, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Zailong Bian, John Smythe, Janos Fucsko, Michael Violette
  • Patent number: 7316981
    Abstract: A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed to an aqueous liquid etching solution comprising a hydroxide and a fluoride, and having a pH of at least 10, under conditions and for a period of time effective to etch the elemental silicon from the substrate. Wet etching can be employed in methods of forming trench isolation, and in other methods. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: January 8, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, Grady S. Waldo
  • Publication number: 20070278183
    Abstract: A single crystal silicon etching method includes providing a single crystal silicon substrate having at least one trench therein. The substrate is exposed to a buffered fluoride etch solution which undercuts the silicon to provide lateral shelves when patterned in the <100> direction. The resulting structure includes an undercut feature when patterned in the <100> direction.
    Type: Application
    Filed: June 2, 2006
    Publication date: December 6, 2007
    Inventors: Whonchee Lee, Janos Fucsko, David H. Wells
  • Publication number: 20070281493
    Abstract: A single crystal silicon etching method includes providing single crystal silicon substrate having at least one trench therein. The substrate is exposed to an anisotropic etchant which undercuts the silicon. By controlling the length of the etch, single crystal silicon islands or smooth vertical walls in the single crystal silicon may be created.
    Type: Application
    Filed: June 2, 2006
    Publication date: December 6, 2007
    Inventors: Janos Fucsko, David H. Wells, Patrick Flynn, Whonchee Lee
  • Patent number: 7273796
    Abstract: A method of fabricating integrated circuitry includes depositing a spin-on-dielectric over a semiconductor substrate. The spin-on-dielectric comprises a polysilazane. Only some of the polysilazane is etched from the semiconductor substrate. Such etching comprises exposure to an etching fluid comprising at least one of a) an aqueous fluid having a pH greater than 7.0, or b) a basic fluid solution. After the etching, remaining spin-on-dielectric comprising polysilazane is annealed effective to form an annealed dielectric which is different in composition from the spin-on-dielectric, and preferably having a dielectric constant k which is different from that of the initially deposited spin-on-dielectric.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: September 25, 2007
    Assignee: Micron Technology, Inc.
    Inventors: John Smythe, Li Li, Janos Fucsko
  • Publication number: 20070145009
    Abstract: The invention includes an etchant composition containing isopropyl alcohol and one or more of HF, NH4F and tetramethyl ammonium fluoride (TMAF). The invention encompasses a method of processing a substrate. A substrate is provided which has a first material containing at least one of polysilicon, monocrystalline silicon and amorphous silicon, and a second material. The substrate is exposed to an etch composition which comprises isopropyl alcohol and at least one of HF, NH4F and TMAF. The invention includes a method of processing a semiconductor construction including providing a construction which has a capacitor electrode material and an oxide material along at least a portion of the capacitor electrode material. At least some of the oxide material is removed by isotropic etching utilizing an etchant composition comprising isopropyl alcohol.
    Type: Application
    Filed: March 1, 2007
    Publication date: June 28, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Janos Fucsko, Grady Waldo, Joseph Wiggins, Prashant Raghu
  • Publication number: 20070117347
    Abstract: The invention includes methods of forming isolation regions. An opening can be formed to extend into a semiconductor material, and an upper periphery of the opening can be protected with a liner while a lower periphery is unlined. The unlined portion can then be etched to form a widened region of the opening. Subsequently, the opening can be filled with insulative material to form an isolation region. Transistor devices can then be formed on opposing sides of the isolation region, and electrically isolated from one another with the isolation region. The invention also includes semiconductor constructions containing an electrically insulative isolation structure extending into a semiconductor material, with the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.
    Type: Application
    Filed: January 17, 2007
    Publication date: May 24, 2007
    Inventors: Hongmei Wang, Fred Fishburn, Janos Fucsko, T. Allen, Richard Lane, Robert Hanson, Kevin Shea
  • Publication number: 20070111534
    Abstract: A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed to an aqueous liquid etching solution comprising a hydroxide and a fluoride, and having a pH of at least 10, under conditions and for a period of time effective to etch the elemental silicon from the substrate. Wet etching can be employed in methods of forming trench isolation, and in other methods. Other aspects and implementations are contemplated.
    Type: Application
    Filed: December 28, 2006
    Publication date: May 17, 2007
    Inventors: Janos Fucsko, Grady Waldo
  • Patent number: 7205245
    Abstract: A method of etching silicon nitride substantially selectively relative to an oxide of aluminum includes providing a substrate comprising silicon nitride and an oxide of aluminum. The silicon nitride and the oxide is exposed to an etching solution comprising HF and an organic HF solvent under conditions effective to etch the silicon nitride substantially selectively relative to the oxide. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: April 17, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, Grady S. Waldo, Kevin J. Torek, Li Li
  • Publication number: 20070045769
    Abstract: The invention includes semiconductor constructions having trenched isolation regions. The trenches of the trenched isolation regions can include narrow bottom portions and upper wide portions over the bottom portions. Electrically insulative material can fill the upper wide portions while leaving voids within the narrow bottom portions. The trenched isolation regions can be incorporated into a memory array, and/or can be incorporated into an electronic system. The invention also includes methods of forming semiconductor constructions.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 1, 2007
    Inventors: Zailong Bian, Janos Fucsko
  • Publication number: 20070042608
    Abstract: A method of substantially uniformly etching oxides from non-homogeneous substrates is provided. The method utilizes a substantially non-aqueous etchant including an organic solvent and a fluorine-containing compound. The fluorine containing compound may include HF, HF:NH4F, (NH4)HF2, or TMAF:HF and mixtures thereof. The etchant may be applied to chemically non-homogeneous layers such as shallow trench isolation fill oxide layers, or to layers having a non-homogeneous composition or density at different depths within the layers, such as spin-on-glass or spin-on-dielectric films.
    Type: Application
    Filed: August 22, 2005
    Publication date: February 22, 2007
    Inventors: Janos Fucsko, Grady Waldo, Bob Carstensen, Satish Bedge
  • Publication number: 20070037401
    Abstract: A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed to an aqueous liquid etching solution comprising a hydroxide and a fluoride, and having a pH of at least 10, under conditions and for a period of time effective to etch the elemental silicon from the substrate. Wet etching can be employed in methods of forming trench isolation, and in other methods. Other aspects and implementations are contemplated.
    Type: Application
    Filed: October 18, 2006
    Publication date: February 15, 2007
    Inventors: Janos Fucsko, Grady Waldo
  • Publication number: 20070023396
    Abstract: The invention includes an etchant composition containing isopropyl alcohol and one or more of HF, NH4F and tetramethyl ammonium fluoride (TMAF). The invention encompasses a method of processing a substrate. A substrate is provided which has a first material containing at least one of polysilicon, monocrystalline silicon and amorphous silicon, and a second material. The substrate is exposed to an etch composition which comprises isopropyl alcohol and at least one of HF, NH4F and TMAF. The invention includes a method of processing a semiconductor construction including providing a construction which has a capacitor electrode material and an oxide material along at least a portion of the capacitor electrode material. At least some of the oxide material is removed by isotropic etching utilizing an etchant composition comprising isopropyl alcohol.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 1, 2007
    Inventors: Janos Fucsko, Grady Waldo, Joseph Wiggins, Prashant Raghu
  • Patent number: 7166539
    Abstract: A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed to an aqueous liquid etching solution comprising a hydroxide and a fluoride, and having a pH of at least 10, under conditions and for a period of time effective to etch the elemental silicon from the substrate. Wet etching can be employed in methods of forming trench isolation, and in other methods. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: January 23, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, Grady S. Waldo
  • Publication number: 20060292787
    Abstract: The invention includes methods of forming isolation regions. An opening can be formed to extend into a semiconductor material, and an upper periphery of the opening can be protected with a liner while a lower periphery is unlined. The unlined portion can then be etched to form a widened region of the opening. Subsequently, the opening can be filled with insulative material to form an isolation region. Transistor devices can then be formed on opposing sides of the isolation region, and electrically isolated from one another with the isolation region. The invention also includes semiconductor constructions containing an electrically insulative isolation structure extending into a semiconductor material, with the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.
    Type: Application
    Filed: June 28, 2005
    Publication date: December 28, 2006
    Inventors: Hongmei Wang, Fred Fishburn, Janos Fucsko, T. Allen, Richard Lane, Robert Hanson, Kevin Shea
  • Publication number: 20060258169
    Abstract: The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10?6 are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.
    Type: Application
    Filed: May 11, 2005
    Publication date: November 16, 2006
    Inventors: Niraj Rana, Kevin Shea, Janos Fucsko
  • Patent number: 7135381
    Abstract: A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed to an aqueous liquid etching solution comprising a hydroxide and a fluoride, and having a pH of at least 10, under conditions and for a period of time effective to etch the elemental silicon from the substrate. Wet etching can be employed in methods of forming trench isolation, and in other methods. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: November 14, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, Grady S. Waldo
  • Publication number: 20060216906
    Abstract: A method of fabricating integrated circuitry includes depositing a spin-on-dielectric over a semiconductor substrate. The spin-on-dielectric comprises a polysilazane. Only some of the polysilazane is etched from the semiconductor substrate. Such etching comprises exposure to an etching fluid comprising at least one of a) an aqueous fluid having a pH greater than 7.0, or b) a basic fluid solution. After the etching, remaining spin-on-dielectric comprising polysilazane is annealed effective to form an annealed dielectric which is different in composition from the spin-on-dielectric, and preferably having a dielectric constant k which is different from that of the initially deposited spin-on-dielectric.
    Type: Application
    Filed: March 23, 2005
    Publication date: September 28, 2006
    Inventors: John Smythe, Li Li, Janos Fucsko