Patents by Inventor Janos Fucsko

Janos Fucsko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060102977
    Abstract: Semiconductor devices, structures and systems that utilize a polysilazane-based silicon oxide layer or fill, and methods of making the oxide layer are disclosed. In one embodiment, a polysilazane solution is deposited on a substrate and processed with ozone in a wet oxidation at low temperature to chemically modify the polysilazane material to a silicon oxide layer.
    Type: Application
    Filed: December 29, 2005
    Publication date: May 18, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Janos Fucsko, John Smythe, Li Li, Grady Waldo
  • Patent number: 7030034
    Abstract: A method of etching silicon nitride substantially selectively relative to an oxide of aluminum includes providing a substrate comprising silicon nitride and an oxide of aluminum. The silicon nitride and the oxide is exposed to an etching solution comprising HF and an organic HF solvent under conditions effective to etch the silicon nitride substantially selectively relative to the oxide. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: April 18, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, Grady S. Waldo, Kevin J. Torek, Li Li
  • Publication number: 20060024914
    Abstract: A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed to an aqueous liquid etching solution comprising a hydroxide and a fluoride, and having a pH of at least 10, under conditions and for a period of time effective to etch the elemental silicon from the substrate. Wet etching can be employed in methods of forming trench isolation, and in other methods. Other aspects and implementations are contemplated.
    Type: Application
    Filed: August 18, 2005
    Publication date: February 2, 2006
    Inventors: Janos Fucsko, Grady Waldo
  • Publication number: 20060009004
    Abstract: A method of etching silicon nitride substantially selectively relative to an oxide of aluminum includes providing a substrate comprising silicon nitride and an oxide of aluminum. The silicon nitride and the oxide is exposed to an etching solution comprising HF and an organic HF solvent under conditions effective to etch the silicon nitride substantially selectively relative to the oxide. Other aspects and implementations are contemplated.
    Type: Application
    Filed: August 10, 2005
    Publication date: January 12, 2006
    Inventors: Janos Fucsko, Grady Waldo, Kevin Torek, Li Li
  • Publication number: 20060003596
    Abstract: Semiconductor devices, structures and systems that utilize a polysilazane-based silicon oxide layer or fill, and methods of making the oxide layer are disclosed. In one embodiment, a polysilazane solution is deposited on a substrate and processed with ozone in a wet oxidation at low temperature to chemically modify the polysilazane material to a silicon oxide layer.
    Type: Application
    Filed: July 1, 2004
    Publication date: January 5, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Janos Fucsko, John Smythe, Li Li, Grady Waldo
  • Publication number: 20050287731
    Abstract: A method includes removing a portion of a substrate to define an isolation trench; forming a first dielectric layer on exposed surfaces of the substrate in the trench; forming a second dielectric layer on at least the first dielectric layer, the second dielectric layer containing a different dielectric material than the first dielectric layer; depositing a third dielectric layer to fill the trench; removing an upper portion of the third dielectric layer from the trench and leaving a lower portion covering a portion of the second dielectric layer; oxidizing the lower portion of the third dielectric layer after removing the upper portion; removing an exposed portion of the second dielectric layer from the trench, thereby exposing a portion of the first dielectric layer; and forming a fourth dielectric layer in the trench covering the exposed portion of the first dielectric layer.
    Type: Application
    Filed: May 16, 2005
    Publication date: December 29, 2005
    Inventors: Zailong Bian, John Smythe, Janos Fucsko, Michael Violette
  • Publication number: 20050061768
    Abstract: A method of etching silicon nitride substantially selectively relative to an oxide of aluminum includes providing a substrate comprising silicon nitride and an oxide of aluminum. The silicon nitride and the oxide is exposed to an etching solution comprising HF and an organic HF solvent under conditions effective to etch the silicon nitride substantially selectively relative to the oxide. Other aspects and implementations are contemplated.
    Type: Application
    Filed: September 18, 2003
    Publication date: March 24, 2005
    Inventors: Janos Fucsko, Grady Waldo, Kevin Torek, Li Li
  • Publication number: 20050020091
    Abstract: A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed to an aqueous liquid etching solution comprising a hydroxide and a fluoride, and having a pH of at least 10, under conditions and for a period of time effective to etch the elemental silicon from the substrate. Wet etching can be employed in methods of forming trench isolation, and in other methods. Other aspects and implementations are contemplated.
    Type: Application
    Filed: July 22, 2003
    Publication date: January 27, 2005
    Inventors: Janos Fucsko, Grady Waldo
  • Patent number: 6790786
    Abstract: The invention includes semiconductor processing methods, including methods of forming capacitors. In one implementation, a semiconductor processing method includes providing a semiconductor substrate comprising a layer comprising at least one metal in elemental or metal alloy form. The metal comprises an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof. At least a portion of the layer is etched in a halogenide, ozone and H2O comprising ambient.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: September 14, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Paul A. Morgan, Patrick M. Flynn, Janos Fucsko
  • Publication number: 20030170961
    Abstract: The invention includes semiconductor processing methods, including methods of forming capacitors. In one implementation, a semiconductor processing method includes providing a semiconductor substrate comprising a layer comprising at least one metal in elemental or metal alloy form. The metal comprises an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof. At least a portion of the layer is etched in a halogenide, ozone and H2O comprising ambient.
    Type: Application
    Filed: March 5, 2002
    Publication date: September 11, 2003
    Inventors: Paul A. Morgan, Patrick M. Flynn, Janos Fucsko