Abstract: A method includes providing a structure having a substrate, a first insulating layer on the substrate, a first semiconductor material layer on the first insulating layer, a second insulating layer on the first semiconductor layer in a first portion of the structure and a second semiconductor layer of a second, different semiconductor material on the second insulating layer in the first portion. The method further includes growing additional first semiconductor material on the first semiconductor layer in a second portion of the structure forming a regrown semiconductor layer; forming first fins in the regrown semiconductor layer and second fins in the second semiconductor layer; and forming gate structures upon the first and second fins. A height difference, relative to a surface of the first insulating layer, of the gate structures formed upon the first fins and the gate structures formed upon the second fins is less than a predetermined value.

Abstract: A method includes providing a structure having a substrate, a first electrically insulating layer overlying the substrate, a first semiconductor layer comprised of a first semiconductor material overlying the first electrically insulating layer, a second electrically insulating layer overlying the first semiconductor layer in a first portion of the structure and a second semiconductor layer comprised of a second, different semiconductor material overlying the second electrically insulating layer in the first portion. The method further includes growing additional first semiconductor material on the first semiconductor layer in a second portion of the structure to form a regrown semiconductor layer; forming fins; forming gate structures orthogonal to the fins and removing at least a portion of the first semiconductor layer in the first portion of the structure to form a void and filling the void with insulating material. Structures formed by the method are also disclosed.

Abstract: A method includes providing a structure having a substrate, a first electrically insulating layer overlying the substrate, a first semiconductor layer comprised of a first semiconductor material overlying the first electrically insulating layer, a second electrically insulating layer overlying the first semiconductor layer in a first portion of the structure and a second semiconductor layer comprised of a second, different semiconductor material overlying the second electrically insulating layer in the first portion. The method further includes growing additional first semiconductor material on the first semiconductor layer in a second portion of the structure to form a regrown semiconductor layer; forming fins; forming gate structures orthogonal to the fins and removing at least a portion of the first semiconductor layer in the first portion of the structure to form a void and filling the void with insulating material. Structures formed by the method are also disclosed.

Abstract: A method includes providing a structure having a substrate, a first electrically insulating layer overlying the substrate, a first semiconductor layer comprised of a first semiconductor material overlying the first electrically insulating layer, a second electrically insulating layer overlying the first semiconductor layer in a first portion of the structure and a second semiconductor layer comprised of a second, different semiconductor material overlying the second electrically insulating layer in the first portion. The method further includes growing additional first semiconductor material on the first semiconductor layer in a second portion of the structure to form a regrown semiconductor layer; forming fins; forming gate structures orthogonal to the fins and removing at least a portion of the first semiconductor layer in the first portion of the structure to form a void and filling the void with insulating material. Structures formed by the method are also disclosed.

Abstract: A method includes providing a structure having a substrate, a first insulating layer on the substrate, a first semiconductor material layer on the first insulating layer, a second insulating layer on the first semiconductor layer in a first portion of the structure and a second semiconductor layer of a second, different semiconductor material on the second insulating layer in the first portion. The method further includes growing additional first semiconductor material on the first semiconductor layer in a second portion of the structure forming a regrown semiconductor layer; forming first fins in the regrown semiconductor layer and second fins in the second semiconductor layer; and forming gate structures upon the first and second fins. A height difference, relative to a surface of the first insulating layer, of the gate structures formed upon the first fins and the gate structures formed upon the second fins is less than a predetermined value.

Abstract: A semiconductor structure comprises a substrate comprising a first crystalline semiconductor material, a dielectric layer, above the substrate, defining an opening, a second crystalline semiconductor material at least partially filling the opening, and a crystalline interlayer between the substrate and the second crystalline semiconductor material. The first crystalline semiconductor material and the second crystalline semiconductor material are lattice mismatched, and the crystalline interlayer comprises an oxygen compound. A method for fabricating semiconductor structure comprises the steps of providing a substrate including a first crystalline semiconductor material, patterning an opening in a dielectric layer above the substrate, the opening having a bottom, forming a crystalline interlayer on the substrate at least partially covering the bottom, and growing a second crystalline semiconductor material on the crystalline interlayer thereby at least partially filling the opening.

Abstract: The invention concerns a material evaporation chamber including a vacuum chamber (10), a first pumping unit (13) to pump said chamber and sources of material. According to the invention, a wall (23) liable to provide total or partial vacuum tightness, delineates within this chamber a first volume (25) and a second volume (22). Certain sources of material (17) having a main axis (18) are placed in the second volume (22). This second volume (22) is pumped by a second pumping unit (24). The wall (23) includes recesses (26) which are each centered on the main axis (18) of one of the sources of material (17). The evaporation chamber also comprises means (27) for plugging or clearing each of said recesses (26), said means (27) being controlled individually to protect the sources of material (17) having a main axis (18) unused.

Abstract: A semiconductor structure (1) comprises a dielectric layer (2) including a dielectric material having a dielectric constant higher than that of silicon oxide; a channel region (3) including a compound semiconductor material; a passivation layer (4) including a passivation material between the channel region (3) and the dielectric layer (2); and a barrier layer (5) including a barrier material between the dielectric layer (2) and the passivation layer (4) for reducing a chemical reaction of the dielectric material of the dielectric layer (2) with the passivation material of the passivation layer (4).

Abstract: A method of forming a high k gate stack on a surface of a III-V compound semiconductor, such GaAs, is provided. The method includes subjecting a III-V compound semiconductor material to a precleaning process which removes native oxides from a surface of the III-V compound semiconductor material; forming a semiconductor, e.g., amorphous Si, layer in-situ on the cleaned surface of the III-V compound semiconductor material; and forming a dielectric material having a dielectric constant that is greater than silicon dioxide on the semiconducting layer. In some embodiments, the semiconducting layer is partially or completely converted into a layer including at least a surface layer that is comprised of AOxNy prior to forming the dielectric material. In accordance with the present invention, A is a semiconducting material, preferably Si, x is 0 to 1, y is 0 to 1 and x and y are both not zero.

Abstract: A method of forming a high k gate stack (dielectric constant of greater than that of silicon dioxide) on a surface of a III-V compound semiconductor, such GaAs, is provided. The method includes subjecting a III-V compound semiconductor material to a precleaning process which removes native oxides from a surface of the III-V compound semiconductor material; forming a semiconductor, e.g., amorphous Si, layer in-situ on the cleaned surface of the III-V compound semiconductor material; and forming a dielectric material having a dielectric constant that is greater than silicon dioxide on the semiconducting layer. In some embodiments, the semiconducting layer is partially or completely converted into a layer including at least a surface layer that is comprised of AOxNy prior to forming the dielectric material. In accordance with the present invention, A is a semiconducting material, preferably Si, x is 0 to 1, y is 0 to 1 and x and y are both not zero.

Abstract: An electrode comprises an inorganic composite layer of a mixture of at least one insulating inorganic material and at least one at least partially conducting inorganic material. In an application of such an electrode, an organic electroluminescent device comprises a first and second conductor layers. An organic layer is disposed between the first and second conductor layers. The aforementioned composite layer is disposed between the organic layer and the first conductor layer. Methods of fabricating such an electrode and such a device are also described.

Abstract: The invention concerns a material evaporation chamber including a vacuum chamber (10), a first pumping unit (13) to pump said chamber and sources of material. According to the invention, a wall (23) liable to provide total or partial vacuum tightness, delineates within this chamber a first volume (25) and a second volume (22). Certain sources of material (17) having a main axis (18) are placed in the second volume (22). This second volume (22) is pumped by a second pumping unit (24). The wall (23) includes recesses (26) which are each centred on the main axis (18) of one of the sources of material (17). The evaporation chamber also comprises means (27) for plugging or clearing each of said recesses (26), said means (27) being controlled individually to protect the sources of material (17) having a main axis (18) unused.

Abstract: The present invention concerns at least an antiferromagnetic layer, which is in direct contact with a ferromagnetic layer for inducing an exchange bias in the ferromagnetic layer. Thus, the ferromagnetic layer is pinned by the antiferromagnetic layer, also referred to as the pinning layer. The antiferromagnetic or pinning layer comprises a compound from the group of orthoferrites, which show a variety of advantages. For example, these antiferromagnets can have a Néel temperature TN ranging from at least 623 K to 740 K depending on the compounds, and they can display a weak ferromagnetic moment. Therefore, a magnetic device comprising the mentioned structure can be used properly in an environment of a high operating temperature. The compound can be described by the formula RFe1−xTMxO3with R a rare earth element or Yttrium, and TM a transition metal which can be one element of the groups IB to VIII.

Abstract: Magnetic characterization of the magnetic field emanating from an RWH device is presented using a magnetostrictive layer as a probe between the device and the scanned SFM tip. The findings suggest a very promising technique to resolve magnetic fields laterally at least in the 100 nm realm. Other magnetosensitive properties such as the magnetoelastic and the piezomagnetic effect can be used in a similar way to infer magnetic characteristics of microstructures or of magnetic multilayers.

Abstract: An electrode comprises an inorganic composite layer of a mixture of at least one insulating inorganic material and at least one at least partially conducting inorganic material. In an application of such an electrode, an organic electroluminescent device comprises a first and second conductor layers. An organic layer is disposed between the first and second conductor layers. The aforementioned composite layer is disposed between the organic layer and the first conductor layer. Methods of fabricating such an electrode and such a device are also described.