Patents by Inventor Jefferson Talledo

Jefferson Talledo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948868
    Abstract: Generally described, one or more embodiments are directed to a leadframe package having a plurality of leads, a die pad, a semiconductor die coupled to the die pad, and encapsulation material. An inner portion of the die pad includes a perimeter portion that includes a plurality of protrusions that are spaced apart from each other. The protrusions aid in locking the die pad in the encapsulation material. The plurality of leads includes upper portions and base portions. The base portion of the plurality of leads are offset (or staggered) relative to the plurality of protrusions of the die pad. In particular, the base portions extend longitudinally toward the die pad and are located between respective protrusions. The upper portions of the leads include lead locks that extend beyond the base portions in a direction of adjacent leads. The lead locks and the protrusion in the die pad aid in locking the leads and the die pad in the encapsulation material.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: April 2, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Jefferson Talledo
  • Patent number: 11848256
    Abstract: Embodiments of the present disclosure are directed to leadframe semiconductor packages having die pads with cooling fins. In at least one embodiment, the leadframe semiconductor package includes leads and a semiconductor die (or chip) coupled to a die pad with cooling fins. The cooling fins are defined by recesses formed in the die pad. The recesses extend into the die pad at a bottom surface of the semiconductor package, such that the bottom surfaces of the cooling fins of the die pad are flush or coplanar with a surface of the package body, such as an encapsulation material. Furthermore, bottom surfaces of the cooling fins of the die pad are flush or coplanar with exposed bottom surfaces of the leads.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: December 19, 2023
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Jefferson Talledo
  • Publication number: 20230275008
    Abstract: The present disclosure is directed to a package having a die on a die pad that has a first portion and a second portion, the second portion being larger than the first portion in a first direction. The package includes a plurality of leads, where at least a first lead has a first surface coplanar with a first, lower surface of the first portion of the die pad. The first lead having a second surface that is transverse to the first surface of the first lead. The second surface being an external surface of the lead and package. The second portion of the die pad being an extension that is overlapping the first lead.
    Type: Application
    Filed: February 14, 2023
    Publication date: August 31, 2023
    Applicant: STMicroelectronics, Inc.
    Inventor: Jefferson TALLEDO
  • Patent number: 11699667
    Abstract: A leadframe having extensions around an outer edge of a die pad are disclosed. More specifically, leadframes are created with a flange formed at the outer edge of the die pad and extending away from the die pad. The flange is bent, such that it is positioned at an angle with respect to the die pad. Leadframes are also created with anchoring posts formed adjacent the outer edge of the die pad and extending away from the die pad. The anchoring posts have a central thickness that is less than a thickness of first and second portions opposite the central portion. When the leadframe is incorporated into a package, molding compound completely surrounds each flange or anchoring post, which increases the bond strength between the leadframe and the molding compound due to increased contact area. The net result is a reduced possibility of delamination at edges of the die pad.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: July 11, 2023
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Jefferson Talledo
  • Patent number: 11664239
    Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: May 30, 2023
    Assignee: STMicroelectronics, Inc.
    Inventors: Rennier Rodriguez, Maiden Grace Maming, Jefferson Talledo
  • Patent number: 11658098
    Abstract: The present disclosure is directed to a leadframe package having a side solder ball contact and methods of manufacturing the same. A plurality of solder balls are coupled to recesses in a leadframe before encapsulation and singulation. After singulation, a portion of each solder ball is exposed on sidewalls of the package. This ensures that the sidewalls of the leads are solder wettable, which allows for the formation of stronger joints when the package is coupled to a substrate. This increased adhesion reduces resistance at the joints and also mitigates the effects of expansion of the components in the package such that delamination is less likely to occur. As a result, packages with a side solder ball contact have increased life cycle expectancies.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: May 23, 2023
    Assignee: STMicroelectronics, Inc.
    Inventors: Jefferson Talledo, Tito Mangaoang
  • Patent number: 11552007
    Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: January 10, 2023
    Assignee: STMicroelectronics, Inc.
    Inventors: Rennier Rodriguez, Aiza Marie Agudon, Jefferson Talledo, Moonlord Manalo, Ela Mia Cadag, Rammil Seguido
  • Patent number: 11542152
    Abstract: A cavity type semiconductor package with a substrate and a cap is disclosed. The semiconductor package includes a first semiconductor die coupled to the substrate and a layer of flexible material on a surface of the cap. A trace is on the layer of flexible material. The cap is coupled to the substrate with the layer of flexible material and the trace between the cap and the substrate. A second semiconductor die is coupled to the layer of flexible material and the trace on the cap. The cap further includes an aperture to expose the second semiconductor die to the ambient environment. The layer of flexible material absorbs stress during operation cycles of the package induced by the different coefficient of thermal expansions of the cap and the substrate to reduce the likelihood of separation of the cap from the substrate.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 3, 2023
    Assignee: STMicroelectronics, Inc.
    Inventor: Jefferson Talledo
  • Patent number: 11398417
    Abstract: Embodiments of the present disclosure are directed to leadframe semiconductor packages having die pads with cooling fins. In at least one embodiment, the leadframe semiconductor package includes leads and a semiconductor die (or chip) coupled to a die pad with cooling fins. The cooling fins are defined by recesses formed in the die pad. The recesses extend into the die pad at a bottom surface of the semiconductor package, such that the bottom surfaces of the cooling fins of the die pad are flush or coplanar with a surface of the package body, such as an encapsulation material. Furthermore, bottom surfaces of the cooling fins of the die pad are flush or coplanar with exposed bottom surfaces of the leads.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: July 26, 2022
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Jefferson Talledo
  • Patent number: 11348863
    Abstract: In various embodiments, the present disclosure provides semiconductor packages, devices, and methods. In one embodiment, a device includes a die pad, leads that are spaced apart from the die pad, and a semiconductor die on the die pad. The semiconductor die has a first surface and a second surface opposite the first surface. The second surface faces the die pad. An encapsulant is provided on the semiconductor die, the die pad and the leads, and the encapsulant has a first surface opposite the die pad and the leads, and a second surface opposite the first surface. The second surface of the encapsulant extends between the die pad and an adjacent lead. The second surface of the encapsulant is spaced apart from the first surface of the encapsulant by a first distance, and an exposed surface of the die pad is spaced apart from the first surface of the encapsulant by a second distance that is greater than the first distance.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: May 31, 2022
    Assignee: STMicroelectronics, Inc.
    Inventor: Jefferson Talledo
  • Publication number: 20220102166
    Abstract: Embodiments of the present disclosure are directed to a leadframe package with recesses formed in outer surface of the leads. The recesses are filled with a filler material, such as solder. The filler material in the recesses provides a wetable surface for filler material, such as solder, to adhere to during mounting of the package to another device, such as a printed circuit board (PCB). This enables strong solder joints between the leads of the package and the PCB. It also enables improved visual inspection of the solder joints after the package has been mounted.
    Type: Application
    Filed: December 9, 2021
    Publication date: March 31, 2022
    Applicant: STMicroelectronics, Inc.
    Inventors: Jefferson Talledo, Frederick Ray Gomez
  • Publication number: 20220084913
    Abstract: Generally described, one or more embodiments are directed to a leadframe package having a plurality of leads, a die pad, a semiconductor die coupled to the die pad, and encapsulation material. An inner portion of the die pad includes a perimeter portion that includes a plurality of protrusions that are spaced apart from each other. The protrusions aid in locking the die pad in the encapsulation material. The plurality of leads includes upper portions and base portions. The base portion of the plurality of leads are offset (or staggered) relative to the plurality of protrusions of the die pad. In particular, the base portions extend longitudinally toward the die pad and are located between respective protrusions. The upper portions of the leads include lead locks that extend beyond the base portions in a direction of adjacent leads. The lead locks and the protrusion in the die pad aid in locking the leads and the die pad in the encapsulation material.
    Type: Application
    Filed: November 29, 2021
    Publication date: March 17, 2022
    Applicant: STMICROELECTRONICS, INC.
    Inventor: Jefferson TALLEDO
  • Patent number: 11270894
    Abstract: One or more embodiments are directed to methods of forming one or more cantilever pads for semiconductor packages. In one embodiment a recess is formed in a substrate of the package facing the cantilever pad. The cantilever pad includes a conductive pad on which a conductive ball is formed. The cantilever pad is configured to absorb stresses acting on the package.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: March 8, 2022
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Jefferson Talledo, Godfrey Dimayuga
  • Publication number: 20220044989
    Abstract: Embodiments of the present disclosure are directed to leadframe semiconductor packages having die pads with cooling fins. In at least one embodiment, the leadframe semiconductor package includes leads and a semiconductor die (or chip) coupled to a die pad with cooling fins. The cooling fins are defined by recesses formed in the die pad. The recesses extend into the die pad at a bottom surface of the semiconductor package, such that the bottom surfaces of the cooling fins of the die pad are flush or coplanar with a surface of the package body, such as an encapsulation material. Furthermore, bottom surfaces of the cooling fins of the die pad are flush or coplanar with exposed bottom surfaces of the leads.
    Type: Application
    Filed: October 25, 2021
    Publication date: February 10, 2022
    Applicant: STMICROELECTRONICS, INC.
    Inventor: Jefferson TALLEDO
  • Patent number: 11227776
    Abstract: Embodiments of the present disclosure are directed to a leadframe package with recesses formed in outer surface of the leads. The recesses are filled with a filler material, such as solder. The filler material in the recesses provides a wetable surface for filler material, such as solder, to adhere to during mounting of the package to another device, such as a printed circuit board (PCB). This enables strong solder joints between the leads of the package and the PCB. It also enables improved visual inspection of the solder joints after the package has been mounted.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: January 18, 2022
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Jefferson Talledo, Frederick Ray Gomez
  • Patent number: 11227817
    Abstract: Generally described, one or more embodiments are directed to a leadframe package having a plurality of leads, a die pad, a semiconductor die coupled to the die pad, and encapsulation material. An inner portion of the die pad includes a perimeter portion that includes a plurality of protrusions that are spaced apart from each other. The protrusions aid in locking the die pad in the encapsulation material. The plurality of leads includes upper portions and base portions. The base portion of the plurality of leads are offset (or staggered) relative to the plurality of protrusions of the die pad. In particular, the base portions extend longitudinally toward the die pad and are located between respective protrusions. The upper portions of the leads include lead locks that extend beyond the base portions in a direction of adjacent leads. The lead locks and the protrusion in the die pad aid in locking the leads and the die pad in the encapsulation material.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: January 18, 2022
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Jefferson Talledo
  • Patent number: 11133241
    Abstract: A semiconductor package having an aperture in a die pad and solder in the aperture coplanar with a surface of the package is disclosed. The package includes a die pad, a plurality of leads, and a semiconductor die coupled to the die pad with a die attach material. A cavity or aperture is formed through the die pad to expose a portion of the die attach material. Multiple solder reflows are performed to reduce the presence of voids in the die attach material. In a first solder reflow, the voids of trapped gas that form when attaching the die to the die pad are released. Then, in a second solder reflow, solder is added to the aperture coplanar with a surface of the die pad. The additional solder can be the same material as the die attach material or a different material.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: September 28, 2021
    Assignee: STMicroelectronics, Inc.
    Inventor: Jefferson Talledo
  • Publication number: 20210265245
    Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.
    Type: Application
    Filed: May 11, 2021
    Publication date: August 26, 2021
    Inventors: Rennier RODRIGUEZ, Maiden Grace MAMING, Jefferson TALLEDO
  • Publication number: 20210257315
    Abstract: A leadframe having extensions around an outer edge of a die pad are disclosed. More specifically, leadframes are created with a flange formed at the outer edge of the die pad and extending away from the die pad. The flange is bent, such that it is positioned at an angle with respect to the die pad. Leadframes are also created with anchoring posts formed adjacent the outer edge of the die pad and extending away from the die pad. The anchoring posts have a central thickness that is less than a thickness of first and second portions opposite the central portion. When the leadframe is incorporated into a package, molding compound completely surrounds each flange or anchoring post, which increases the bond strength between the leadframe and the molding compound due to increased contact area. The net result is a reduced possibility of delamination at edges of the die pad.
    Type: Application
    Filed: May 3, 2021
    Publication date: August 19, 2021
    Applicant: STMICROELECTRONICS, INC.
    Inventor: Jefferson TALLEDO
  • Publication number: 20210183750
    Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
    Type: Application
    Filed: February 25, 2021
    Publication date: June 17, 2021
    Applicant: STMicroelectronics, Inc.
    Inventors: Rennier RODRIGUEZ, Aiza Marie AGUDON, Jefferson TALLEDO, Moonlord MANALO, Ela Mia CADAG, Rammil SEGUIDO